DE69534709D1 - Herstellungsverfahren einer Halbleiteranordnung - Google Patents
Herstellungsverfahren einer HalbleiteranordnungInfo
- Publication number
- DE69534709D1 DE69534709D1 DE69534709T DE69534709T DE69534709D1 DE 69534709 D1 DE69534709 D1 DE 69534709D1 DE 69534709 T DE69534709 T DE 69534709T DE 69534709 T DE69534709 T DE 69534709T DE 69534709 D1 DE69534709 D1 DE 69534709D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73207—Bump and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01055—Cesium [Cs]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24531294 | 1994-10-11 | ||
JP24531294 | 1994-10-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69534709D1 true DE69534709D1 (de) | 2006-01-26 |
DE69534709T2 DE69534709T2 (de) | 2006-08-24 |
Family
ID=17131805
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69534709T Expired - Fee Related DE69534709T2 (de) | 1994-10-11 | 1995-10-09 | Herstellungsverfahren einer Halbleiteranordnung |
DE69525808T Expired - Fee Related DE69525808T2 (de) | 1994-10-11 | 1995-10-09 | Halbleiteranordnung mit Speicherchip und Speicherperipherieschaltungschip und Herstellungsverfahren |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69525808T Expired - Fee Related DE69525808T2 (de) | 1994-10-11 | 1995-10-09 | Halbleiteranordnung mit Speicherchip und Speicherperipherieschaltungschip und Herstellungsverfahren |
Country Status (6)
Country | Link |
---|---|
US (3) | US5838603A (de) |
EP (3) | EP1154434B1 (de) |
KR (1) | KR100268961B1 (de) |
CN (1) | CN1101062C (de) |
DE (2) | DE69534709T2 (de) |
TW (1) | TW362279B (de) |
Families Citing this family (69)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10154803A (ja) * | 1996-11-25 | 1998-06-09 | Toshiba Corp | 不揮発性半導体メモリ |
JP3421530B2 (ja) * | 1997-04-11 | 2003-06-30 | 東芝マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
JP3828249B2 (ja) * | 1997-07-29 | 2006-10-04 | 株式会社東芝 | ダイナミック型半導体記憶装置 |
JPH11168185A (ja) | 1997-12-03 | 1999-06-22 | Rohm Co Ltd | 積層基板体および半導体装置 |
US6622224B1 (en) * | 1997-12-29 | 2003-09-16 | Micron Technology, Inc. | Internal buffered bus for a drum |
US6405335B1 (en) * | 1998-02-25 | 2002-06-11 | Texas Instruments Incorporated | Position independent testing of circuits |
JPH11340421A (ja) * | 1998-05-25 | 1999-12-10 | Fujitsu Ltd | メモリ及びロジック混載のlsiデバイス |
WO2000017759A2 (en) * | 1998-09-18 | 2000-03-30 | Pixelfusion Limited | Computer system comprising latency tolerant and intolerant modules |
US6173342B1 (en) * | 1998-10-19 | 2001-01-09 | Hitachi Semiconductor America, Inc. | High speed bus interface for peripheral devices |
US6249841B1 (en) * | 1998-12-03 | 2001-06-19 | Ramtron International Corporation | Integrated circuit memory device and method incorporating flash and ferroelectric random access memory arrays |
JP4212171B2 (ja) * | 1999-01-28 | 2009-01-21 | 株式会社ルネサステクノロジ | メモリ回路/ロジック回路集積システム |
GB2357602A (en) * | 1999-12-22 | 2001-06-27 | Nokia Mobile Phones Ltd | Memory controller for a memory array comprising different memory types |
US6404660B1 (en) * | 1999-12-23 | 2002-06-11 | Rambus, Inc. | Semiconductor package with a controlled impedance bus and method of forming same |
US7010642B2 (en) * | 2000-01-05 | 2006-03-07 | Rambus Inc. | System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices |
US7363422B2 (en) * | 2000-01-05 | 2008-04-22 | Rambus Inc. | Configurable width buffered module |
US6766456B1 (en) * | 2000-02-23 | 2004-07-20 | Micron Technology, Inc. | Method and system for authenticating a user of a computer system |
US6859399B1 (en) | 2000-05-17 | 2005-02-22 | Marvell International, Ltd. | Memory architecture and system and multiport interface protocol |
DE10047574C2 (de) * | 2000-09-22 | 2003-07-17 | Systemonic Ag | Prozessorbusanordnung |
JP4124557B2 (ja) | 2000-10-05 | 2008-07-23 | 松下電器産業株式会社 | 半導体集積回路装置及びその制御方法 |
JP4635333B2 (ja) * | 2000-12-14 | 2011-02-23 | ソニー株式会社 | 半導体装置の製造方法 |
US6889304B2 (en) | 2001-02-28 | 2005-05-03 | Rambus Inc. | Memory device supporting a dynamically configurable core organization |
US7610447B2 (en) * | 2001-02-28 | 2009-10-27 | Rambus Inc. | Upgradable memory system with reconfigurable interconnect |
US6376358B1 (en) | 2001-03-15 | 2002-04-23 | Micron Technology, Inc. | Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications |
JP2003085127A (ja) * | 2001-09-11 | 2003-03-20 | Seiko Epson Corp | デュアルバスを有する半導体装置、デュアルバスシステム及びメモリ共有デュアルバスシステム並びにそれを用いた電子機器 |
US6901491B2 (en) * | 2001-10-22 | 2005-05-31 | Sun Microsystems, Inc. | Method and apparatus for integration of communication links with a remote direct memory access protocol |
EP1317168A1 (de) * | 2001-11-29 | 2003-06-04 | Thomson Licensing S.A. | Datenbusverbindung für eine Speicheranordnung |
DE10245037B4 (de) * | 2002-09-26 | 2007-08-23 | Infineon Technologies Ag | Verfahren zum Entwurf von DRAM-Halbleiter-Speicherbauelementen |
US7035958B2 (en) * | 2002-10-03 | 2006-04-25 | International Business Machines Corporation | Re-ordering a first request within a FIFO request queue to a different queue position when the first request receives a retry response from the target |
JP5138869B2 (ja) | 2002-11-28 | 2013-02-06 | ルネサスエレクトロニクス株式会社 | メモリモジュール及びメモリシステム |
DE10319271A1 (de) * | 2003-04-29 | 2004-11-25 | Infineon Technologies Ag | Speicher-Schaltungsanordnung und Verfahren zur Herstellung |
EP1671214A4 (de) * | 2003-10-10 | 2010-01-27 | Nokia Corp | Mikrosteuerungs-architektur für ein system auf einem chip (soc) |
JP4406403B2 (ja) * | 2004-01-28 | 2010-01-27 | パナソニック株式会社 | モジュール及びこれを用いた実装構造体 |
JP3918818B2 (ja) * | 2004-02-16 | 2007-05-23 | ソニー株式会社 | 半導体装置 |
US20050273541A1 (en) * | 2004-06-04 | 2005-12-08 | Texas Instruments Incorporated | Circuit and method for adaptively recognizing a data packet in a universal serial bus network device |
JP2006012973A (ja) * | 2004-06-23 | 2006-01-12 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7543091B2 (en) * | 2004-09-22 | 2009-06-02 | Kabushiki Kaisha Toshiba | Self-organized parallel processing system |
US7317630B2 (en) * | 2005-07-15 | 2008-01-08 | Atmel Corporation | Nonvolatile semiconductor memory apparatus |
JP4665677B2 (ja) * | 2005-09-09 | 2011-04-06 | セイコーエプソン株式会社 | 集積回路装置及び電子機器 |
JP4613761B2 (ja) * | 2005-09-09 | 2011-01-19 | セイコーエプソン株式会社 | 集積回路装置及び電子機器 |
US7562271B2 (en) | 2005-09-26 | 2009-07-14 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
US7464225B2 (en) | 2005-09-26 | 2008-12-09 | Rambus Inc. | Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology |
US11328764B2 (en) | 2005-09-26 | 2022-05-10 | Rambus Inc. | Memory system topologies including a memory die stack |
US7629680B2 (en) * | 2006-03-22 | 2009-12-08 | Intel Corporation | Direct power delivery into an electronic package |
US7629675B2 (en) | 2006-05-03 | 2009-12-08 | Marvell International Technology Ltd. | System and method for routing signals between side-by-side die in lead frame type system in a package (SIP) devices |
US7639542B2 (en) * | 2006-05-15 | 2009-12-29 | Apple Inc. | Maintenance operations for multi-level data storage cells |
US7568135B2 (en) | 2006-05-15 | 2009-07-28 | Apple Inc. | Use of alternative value in cell detection |
US7852690B2 (en) * | 2006-05-15 | 2010-12-14 | Apple Inc. | Multi-chip package for a flash memory |
US7701797B2 (en) * | 2006-05-15 | 2010-04-20 | Apple Inc. | Two levels of voltage regulation supplied for logic and data programming voltage of a memory device |
US7613043B2 (en) * | 2006-05-15 | 2009-11-03 | Apple Inc. | Shifting reference values to account for voltage sag |
US8000134B2 (en) | 2006-05-15 | 2011-08-16 | Apple Inc. | Off-die charge pump that supplies multiple flash devices |
US7911834B2 (en) * | 2006-05-15 | 2011-03-22 | Apple Inc. | Analog interface for a flash memory die |
KR101533120B1 (ko) | 2006-12-14 | 2015-07-01 | 램버스 인코포레이티드 | 멀티 다이 메모리 디바이스 |
JP5143413B2 (ja) * | 2006-12-20 | 2013-02-13 | オンセミコンダクター・トレーディング・リミテッド | 半導体集積回路 |
TWI380427B (en) * | 2007-01-16 | 2012-12-21 | Advanced Semiconductor Eng | Substrate and the semiconductor package comprising the same |
JP4492694B2 (ja) * | 2007-12-20 | 2010-06-30 | セイコーエプソン株式会社 | 集積回路装置、電気光学装置及び電子機器 |
US20090160881A1 (en) * | 2007-12-20 | 2009-06-25 | Seiko Epson Corporation | Integrated circuit device, electro-optical device, and electronic instrument |
JP4973482B2 (ja) * | 2007-12-20 | 2012-07-11 | セイコーエプソン株式会社 | 集積回路装置、電気光学装置及び電子機器 |
US20090172434A1 (en) * | 2007-12-31 | 2009-07-02 | Kwa Seh W | Latency based platform coordination |
KR101003116B1 (ko) * | 2008-08-08 | 2010-12-21 | 주식회사 하이닉스반도체 | 패드를 제어하는 반도체 메모리 장치 및 그 장치가 장착된 멀티칩 패키지 |
US7905641B2 (en) * | 2008-08-14 | 2011-03-15 | Peckham Jr Alfred H | Roller skate wheel hub cap with integral illumination system |
US7557439B1 (en) | 2008-09-29 | 2009-07-07 | Tdk Corporation | Layered chip package that implements memory device |
CN102714061A (zh) | 2009-11-20 | 2012-10-03 | 拉姆伯斯公司 | 用于dram故障校正的位替代技术 |
US8674483B2 (en) * | 2011-06-27 | 2014-03-18 | Marvell World Trade Ltd. | Methods and arrangements relating to semiconductor packages including multi-memory dies |
US9177609B2 (en) | 2011-06-30 | 2015-11-03 | Sandisk Technologies Inc. | Smart bridge for memory core |
US9208070B2 (en) | 2011-12-20 | 2015-12-08 | Sandisk Technologies Inc. | Wear leveling of multiple memory devices |
US9411678B1 (en) | 2012-08-01 | 2016-08-09 | Rambus Inc. | DRAM retention monitoring method for dynamic error correction |
WO2014074390A1 (en) | 2012-11-06 | 2014-05-15 | Rambus Inc. | Memory repair using external tags |
JP6543129B2 (ja) * | 2015-07-29 | 2019-07-10 | ルネサスエレクトロニクス株式会社 | 電子装置 |
KR102530321B1 (ko) * | 2018-12-21 | 2023-05-09 | 삼성전자주식회사 | 반도체 패키지 및 이를 포함하는 전자 기기 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4197590A (en) * | 1976-01-19 | 1980-04-08 | Nugraphics, Inc. | Method for dynamically viewing image elements stored in a random access memory array |
JPS58148992A (ja) * | 1982-03-01 | 1983-09-05 | Seiko Instr & Electronics Ltd | 時計用icの構造 |
US4761681A (en) * | 1982-09-08 | 1988-08-02 | Texas Instruments Incorporated | Method for fabricating a semiconductor contact and interconnect structure using orientation dependent etching and thermomigration |
ATE47928T1 (de) * | 1984-05-14 | 1989-11-15 | Ibm | Halbleiterspeicher. |
CA1262969A (en) * | 1985-06-25 | 1989-11-14 | Ascii Corporation | Memory system |
US5053993A (en) * | 1987-06-08 | 1991-10-01 | Fujitsu Limited | Master slice type semiconductor integrated circuit having sea of gates |
KR970003915B1 (ko) * | 1987-06-24 | 1997-03-22 | 미다 가쓰시게 | 반도체 기억장치 및 그것을 사용한 반도체 메모리 모듈 |
JP2695168B2 (ja) * | 1987-12-18 | 1997-12-24 | 株式会社日立製作所 | 半導体集積回路装置 |
FR2625042B1 (fr) * | 1987-12-22 | 1990-04-20 | Thomson Csf | Structure microelectronique hybride modulaire a haute densite d'integration |
US5096852A (en) * | 1988-06-02 | 1992-03-17 | Burr-Brown Corporation | Method of making plastic encapsulated multichip hybrid integrated circuits |
JPH0266965A (ja) * | 1988-08-31 | 1990-03-07 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US5184321A (en) * | 1988-12-06 | 1993-02-02 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device comprising a plurality of memory arrays with improved peripheral circuit location and interconnection arrangement |
US5208782A (en) * | 1989-02-09 | 1993-05-04 | Hitachi, Ltd. | Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement |
JP2778977B2 (ja) * | 1989-03-14 | 1998-07-23 | 株式会社東芝 | 半導体装置及びその製造方法 |
US5033025A (en) * | 1989-12-21 | 1991-07-16 | Padgaonkar Ajay J | On-chip register setting and clearing |
JP2871041B2 (ja) * | 1990-09-06 | 1999-03-17 | 三菱電機株式会社 | 半導体装置 |
JP3242101B2 (ja) * | 1990-10-05 | 2001-12-25 | 三菱電機株式会社 | 半導体集積回路 |
JPH0628846A (ja) * | 1992-07-09 | 1994-02-04 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR0137105B1 (ko) * | 1993-06-17 | 1998-04-29 | 모리시다 요이치 | 데이터 전송회로, 데이터선 구동회로, 증폭회로, 반도체 집적회로 및 반도체 기억장치 |
US5502667A (en) * | 1993-09-13 | 1996-03-26 | International Business Machines Corporation | Integrated multichip memory module structure |
US5375084A (en) * | 1993-11-08 | 1994-12-20 | International Business Machines Corporation | Selectable interface between memory controller and memory simms |
JPH07272398A (ja) * | 1994-03-28 | 1995-10-20 | Hitachi Ltd | ディスク装置の制御装置 |
US5815427A (en) | 1997-04-02 | 1998-09-29 | Micron Technology, Inc. | Modular memory circuit and method for forming same |
-
1995
- 1995-10-06 US US08/549,097 patent/US5838603A/en not_active Expired - Lifetime
- 1995-10-09 EP EP01118887A patent/EP1154434B1/de not_active Expired - Lifetime
- 1995-10-09 EP EP03018786A patent/EP1376593A1/de not_active Ceased
- 1995-10-09 EP EP95115876A patent/EP0707316B1/de not_active Expired - Lifetime
- 1995-10-09 DE DE69534709T patent/DE69534709T2/de not_active Expired - Fee Related
- 1995-10-09 DE DE69525808T patent/DE69525808T2/de not_active Expired - Fee Related
- 1995-10-10 CN CN95117959A patent/CN1101062C/zh not_active Expired - Fee Related
- 1995-10-11 KR KR1019950035504A patent/KR100268961B1/ko not_active IP Right Cessation
- 1995-10-20 TW TW084111111A patent/TW362279B/zh not_active IP Right Cessation
-
1998
- 1998-08-26 US US09/140,968 patent/US6064585A/en not_active Expired - Lifetime
- 1998-08-26 US US09/140,150 patent/US6313493B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69534709T2 (de) | 2006-08-24 |
US6064585A (en) | 2000-05-16 |
EP0707316B1 (de) | 2002-03-13 |
DE69525808T2 (de) | 2002-11-21 |
DE69525808D1 (de) | 2002-04-18 |
US6313493B1 (en) | 2001-11-06 |
EP0707316A3 (de) | 1998-08-26 |
EP1154434A1 (de) | 2001-11-14 |
KR960015921A (ko) | 1996-05-22 |
KR100268961B1 (ko) | 2000-11-01 |
EP1376593A1 (de) | 2004-01-02 |
CN1101062C (zh) | 2003-02-05 |
EP1154434B1 (de) | 2005-12-21 |
US5838603A (en) | 1998-11-17 |
EP0707316A2 (de) | 1996-04-17 |
CN1127428A (zh) | 1996-07-24 |
TW362279B (en) | 1999-06-21 |
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