DE69418522D1 - Nichtflüchtige Halbleiterspeicheranordnung mit Nachprüfungsfunktion - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung mit Nachprüfungsfunktion

Info

Publication number
DE69418522D1
DE69418522D1 DE69418522T DE69418522T DE69418522D1 DE 69418522 D1 DE69418522 D1 DE 69418522D1 DE 69418522 T DE69418522 T DE 69418522T DE 69418522 T DE69418522 T DE 69418522T DE 69418522 D1 DE69418522 D1 DE 69418522D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
verification function
verification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69418522T
Other languages
English (en)
Other versions
DE69418522T2 (de
Inventor
Junichi Miyamoto
Yasuo Itoh
Yoshihisa Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26345439&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69418522(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69418522D1 publication Critical patent/DE69418522D1/de
Application granted granted Critical
Publication of DE69418522T2 publication Critical patent/DE69418522T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
DE69418522T 1993-03-31 1994-03-31 Nichtflüchtige Halbleiterspeicheranordnung mit Nachprüfungsfunktion Expired - Lifetime DE69418522T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7479793 1993-03-31
JP01020994A JP3373632B2 (ja) 1993-03-31 1994-02-01 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69418522D1 true DE69418522D1 (de) 1999-06-24
DE69418522T2 DE69418522T2 (de) 1999-10-28

Family

ID=26345439

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69418522T Expired - Lifetime DE69418522T2 (de) 1993-03-31 1994-03-31 Nichtflüchtige Halbleiterspeicheranordnung mit Nachprüfungsfunktion

Country Status (7)

Country Link
US (5) US5452249A (de)
EP (1) EP0618590B1 (de)
JP (1) JP3373632B2 (de)
KR (1) KR970002069B1 (de)
CN (1) CN1078960C (de)
DE (1) DE69418522T2 (de)
TW (1) TW360872B (de)

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JP3373632B2 (ja) * 1993-03-31 2003-02-04 株式会社東芝 不揮発性半導体記憶装置
JP3737525B2 (ja) * 1994-03-11 2006-01-18 株式会社東芝 半導体記憶装置
JP3739102B2 (ja) * 1994-07-07 2006-01-25 富士通株式会社 不揮発性半導体記憶装置
JPH0844626A (ja) * 1994-07-28 1996-02-16 Nec Niigata Ltd キャッシュシステムのフラッシュサイクル制御方法
JP2755197B2 (ja) * 1995-01-13 1998-05-20 日本電気株式会社 半導体不揮発性記憶装置
US5982738A (en) 1995-02-14 1999-11-09 Hitachi, Ltd. Optical recording medium having at least wobbled synchronous information shared between tracks
JP3739104B2 (ja) * 1995-02-27 2006-01-25 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US5724366A (en) * 1995-05-16 1998-03-03 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
DE19548053A1 (de) * 1995-12-21 1997-07-03 Siemens Ag Verfahren zum Betrieb einer SRAM MOS-Transistor Speicherzelle
KR0182866B1 (ko) * 1995-12-27 1999-04-15 김주용 플래쉬 메모리 장치
JP3200012B2 (ja) * 1996-04-19 2001-08-20 株式会社東芝 記憶システム
JP3404712B2 (ja) * 1996-05-15 2003-05-12 株式会社東芝 不揮発性半導体記憶装置及びその書き込み方法
KR100223868B1 (ko) * 1996-07-12 1999-10-15 구본준 비휘발성 메모리를 프로그램하는 방법
KR100248868B1 (ko) * 1996-12-14 2000-03-15 윤종용 플래시 불휘발성 반도체 메모리 장치 및 그 장치의 동작 모드 제어 방법
JP3489958B2 (ja) * 1997-03-19 2004-01-26 富士通株式会社 不揮発性半導体記憶装置
US6041221A (en) * 1997-05-21 2000-03-21 Motorola, Inc. Circuit and method for verifying data of a wireless communications device
US5754010A (en) * 1997-05-21 1998-05-19 Motorola, Inc. Memory circuit and method for sensing data
US5828607A (en) * 1997-05-21 1998-10-27 Motorola, Inc. Memory programming circuit and method
US5898633A (en) * 1997-05-21 1999-04-27 Motorola, Inc. Circuit and method of limiting leakage current in a memory circuit
US5898617A (en) * 1997-05-21 1999-04-27 Motorola, Inc. Sensing circuit and method
US6146943A (en) * 1997-07-09 2000-11-14 Hyundai Electronics Industries Co., Ltd. Method for fabricating nonvolatile memory device
EP1643507B1 (de) * 1997-08-19 2011-08-31 Altera Corporation Statische RAM-Schaltungen
JP3012589B2 (ja) * 1998-03-24 2000-02-21 日本電気アイシーマイコンシステム株式会社 不揮発性半導体記憶装置
KR100373670B1 (ko) 1999-09-27 2003-02-26 가부시끼가이샤 도시바 불휘발성 반도체 기억 장치
JP4149637B2 (ja) * 2000-05-25 2008-09-10 株式会社東芝 半導体装置
US6853582B1 (en) * 2000-08-30 2005-02-08 Renesas Technology Corp. Nonvolatile memory with controlled voltage boosting speed
JP4663094B2 (ja) * 2000-10-13 2011-03-30 株式会社半導体エネルギー研究所 半導体装置
JP3875570B2 (ja) 2001-02-20 2007-01-31 株式会社東芝 半導体記憶装置のデータ書き込み方法及び半導体記憶装置
US6807073B1 (en) * 2001-05-02 2004-10-19 Oltronics, Inc. Switching type power converter circuit and method for use therein
KR100423894B1 (ko) * 2002-05-09 2004-03-22 삼성전자주식회사 저전압 반도체 메모리 장치
KR100560801B1 (ko) * 2003-11-24 2006-03-13 삼성전자주식회사 플래시 메모리 장치
KR100631765B1 (ko) 2004-10-18 2006-10-09 삼성전자주식회사 플래시 메모리의 데이터 처리 장치 및 방법
KR100643288B1 (ko) 2004-11-16 2006-11-10 삼성전자주식회사 플래시 메모리의 데이터 처리 장치 및 방법
EP2239342A3 (de) * 2005-02-01 2010-11-03 AB Advanced Genetic Analysis Corporation Reagentien, Verfahren und Bibliotheken zur Sequenzierung mit Kügelchen
US20060256623A1 (en) * 2005-05-12 2006-11-16 Micron Technology, Inc. Partial string erase scheme in a flash memory device
KR100694968B1 (ko) * 2005-06-30 2007-03-14 주식회사 하이닉스반도체 비휘발성 메모리 장치와 그것의 멀티-페이지 프로그램,독출 및 카피백 프로그램 방법
JP4846314B2 (ja) * 2005-09-22 2011-12-28 株式会社東芝 半導体記憶装置
CA2649725A1 (en) * 2006-04-19 2007-10-25 Applera Corporation Reagents, methods, and libraries for gel-free bead-based sequencing
EP2212434A1 (de) * 2007-10-01 2010-08-04 Applied Biosystems Inc. Chase-ligation-sequenzierung
JP2015142175A (ja) * 2014-01-27 2015-08-03 株式会社東芝 プログラマブル論理回路および不揮発性ｆｐｇａ
CN104979007A (zh) * 2014-04-03 2015-10-14 晶宏半导体股份有限公司 位线多工器及位线多工系统
US10043578B2 (en) * 2015-11-12 2018-08-07 Mediatek Inc. Sense amplifier circuits
TWI724895B (zh) * 2020-05-11 2021-04-11 力旺電子股份有限公司 具多階型記憶胞陣列之非揮發性記憶體及其相關編程控制方法
FR3122024B1 (fr) * 2021-04-20 2024-03-29 St Microelectronics Grenoble 2 Procédé de gestion de données pour mémoire non volatile programmable bit à bit, et dispositif correspondant

Family Cites Families (11)

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JPS5693363A (en) * 1979-12-04 1981-07-28 Fujitsu Ltd Semiconductor memory
JPS63251999A (ja) * 1987-04-08 1988-10-19 Mitsubishi Electric Corp 半導体記憶装置
JPS6432494A (en) * 1987-07-27 1989-02-02 Mitsubishi Electric Corp Non-volatile semiconductor storage device
JPH0778997B2 (ja) * 1987-10-30 1995-08-23 株式会社東芝 不揮発性半導体メモリ
US5222040A (en) * 1990-12-11 1993-06-22 Nexcom Technology, Inc. Single transistor eeprom memory cell
US5361227A (en) * 1991-12-19 1994-11-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
KR950011965B1 (ko) * 1992-02-19 1995-10-12 삼성전자주식회사 불휘발성 반도체 메모리 장치
KR950000273B1 (ko) * 1992-02-21 1995-01-12 삼성전자 주식회사 불휘발성 반도체 메모리장치 및 그 최적화 기입방법
JP3373632B2 (ja) * 1993-03-31 2003-02-04 株式会社東芝 不揮発性半導体記憶装置
US5343445A (en) * 1993-07-06 1994-08-30 David Stern Athletic shoe with timing device
JP2922116B2 (ja) * 1993-09-02 1999-07-19 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
KR940022571A (ko) 1994-10-21
US5557568A (en) 1996-09-17
EP0618590B1 (de) 1999-05-19
JP3373632B2 (ja) 2003-02-04
KR970002069B1 (ko) 1997-02-21
US5452249A (en) 1995-09-19
EP0618590A3 (en) 1995-11-29
EP0618590A2 (de) 1994-10-05
TW360872B (en) 1999-06-11
DE69418522T2 (de) 1999-10-28
US6023424A (en) 2000-02-08
JPH07182886A (ja) 1995-07-21
CN1098220A (zh) 1995-02-01
CN1078960C (zh) 2002-02-06
US5880994A (en) 1999-03-09
US5726882A (en) 1998-03-10

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Legal Events

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8364 No opposition during term of opposition