DE69317937T2 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung

Info

Publication number
DE69317937T2
DE69317937T2 DE69317937T DE69317937T DE69317937T2 DE 69317937 T2 DE69317937 T2 DE 69317937T2 DE 69317937 T DE69317937 T DE 69317937T DE 69317937 T DE69317937 T DE 69317937T DE 69317937 T2 DE69317937 T2 DE 69317937T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69317937T
Other languages
English (en)
Other versions
DE69317937D1 (de
Inventor
Toshio Yamamura
Hiroto Nakai
Hideo Kato
Kaoru Tokushige
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69317937D1 publication Critical patent/DE69317937D1/de
Publication of DE69317937T2 publication Critical patent/DE69317937T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
DE69317937T 1992-06-02 1993-06-02 Nichtflüchtige Halbleiterspeicheranordnung Expired - Fee Related DE69317937T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14124092 1992-06-02

Publications (2)

Publication Number Publication Date
DE69317937D1 DE69317937D1 (de) 1998-05-20
DE69317937T2 true DE69317937T2 (de) 1998-09-17

Family

ID=15287360

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69317937T Expired - Fee Related DE69317937T2 (de) 1992-06-02 1993-06-02 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (4)

Country Link
US (1) US5436913A (de)
EP (1) EP0573003B1 (de)
KR (1) KR960010960B1 (de)
DE (1) DE69317937T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6781895B1 (en) * 1991-12-19 2004-08-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US5538141A (en) * 1994-09-27 1996-07-23 Intel Corporation Test flow assurance using memory imprinting
JPH08129894A (ja) * 1994-10-28 1996-05-21 Nec Corp 不揮発性半導体記憶装置
US5802268A (en) * 1994-11-22 1998-09-01 Lucent Technologies Inc. Digital processor with embedded eeprom memory
US5677246A (en) * 1994-11-29 1997-10-14 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor devices
JP3740212B2 (ja) * 1996-05-01 2006-02-01 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
JP3895816B2 (ja) * 1996-12-25 2007-03-22 株式会社東芝 不揮発性半導体記憶装置とその制御方法、メモリカード、及び記憶システム
US6052314A (en) * 1997-05-22 2000-04-18 Rohm Co., Ltd. EEPROM device
JP3156636B2 (ja) * 1997-05-30 2001-04-16 日本電気株式会社 不揮発性半導体記憶装置
JP4248269B2 (ja) * 2003-02-21 2009-04-02 パナソニック株式会社 半導体不揮発性記憶装置
US7363556B2 (en) * 2005-12-09 2008-04-22 Advantest Corporation Testing apparatus and testing method
JP4344372B2 (ja) * 2006-08-22 2009-10-14 シャープ株式会社 半導体記憶装置及びその駆動方法
JP5137550B2 (ja) * 2007-12-12 2013-02-06 キヤノン株式会社 情報処理装置及びその制御方法
JP5359570B2 (ja) * 2009-06-03 2013-12-04 富士通株式会社 メモリ試験制御装置およびメモリ試験制御方法
US8004884B2 (en) * 2009-07-31 2011-08-23 International Business Machines Corporation Iterative write pausing techniques to improve read latency of memory systems
JP2011181134A (ja) * 2010-02-26 2011-09-15 Elpida Memory Inc 不揮発性半導体装置の制御方法
US8374040B2 (en) 2011-02-25 2013-02-12 International Business Machines Corporation Write bandwidth in a memory characterized by a variable write time
US9442842B2 (en) * 2013-08-19 2016-09-13 Sandisk Technologies Llc Memory system performance configuration
KR102221752B1 (ko) 2014-03-20 2021-03-02 삼성전자주식회사 메모리 장치의 프로그램 방법 및 이를 포함하는 데이터 독출 방법
JP2016170848A (ja) 2015-03-16 2016-09-23 ルネサスエレクトロニクス株式会社 半導体記憶装置
US10198217B2 (en) 2016-11-04 2019-02-05 Alibaba Group Holding Limited Method and system of enhanced reliability and error immunity in flash storage

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4460982A (en) * 1982-05-20 1984-07-17 Intel Corporation Intelligent electrically programmable and electrically erasable ROM
JPS63255900A (ja) * 1987-04-13 1988-10-24 Nec Corp 書込み可能な読出し専用メモリの書込方法
US5034922A (en) * 1987-12-21 1991-07-23 Motorola, Inc. Intelligent electrically erasable, programmable read-only memory with improved read latency
US5161161A (en) * 1989-01-31 1992-11-03 Unisys Corporation Minimum pulsewidth test module on clocked logic integrated circuit
US4963825A (en) * 1989-12-21 1990-10-16 Intel Corporation Method of screening EPROM-related devices for endurance failure
EP0441510B1 (de) * 1990-02-08 1995-09-20 Altera Corporation Programmierverfahren für programmierbare Elemente in programmierbaren Anordnungen
JP3248928B2 (ja) * 1991-08-23 2002-01-21 富士通株式会社 不揮発性半導体記憶装置およびデータ消去方法

Also Published As

Publication number Publication date
KR940006140A (ko) 1994-03-23
US5436913A (en) 1995-07-25
EP0573003A2 (de) 1993-12-08
DE69317937D1 (de) 1998-05-20
EP0573003A3 (de) 1994-11-23
KR960010960B1 (ko) 1996-08-14
EP0573003B1 (de) 1998-04-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee