DE69123814D1 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents
Nichtflüchtige HalbleiterspeicheranordnungInfo
- Publication number
- DE69123814D1 DE69123814D1 DE69123814T DE69123814T DE69123814D1 DE 69123814 D1 DE69123814 D1 DE 69123814D1 DE 69123814 T DE69123814 T DE 69123814T DE 69123814 T DE69123814 T DE 69123814T DE 69123814 D1 DE69123814 D1 DE 69123814D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- volatile semiconductor
- volatile
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2275942A JP2830447B2 (ja) | 1990-10-15 | 1990-10-15 | 半導体不揮発性記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69123814D1 true DE69123814D1 (de) | 1997-02-06 |
DE69123814T2 DE69123814T2 (de) | 1997-07-10 |
Family
ID=17562580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69123814T Expired - Fee Related DE69123814T2 (de) | 1990-10-15 | 1991-10-14 | Nichtflüchtige Halbleiterspeicheranordnung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5267195A (de) |
EP (1) | EP0481392B1 (de) |
JP (1) | JP2830447B2 (de) |
KR (1) | KR960016835B1 (de) |
DE (1) | DE69123814T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7071060B1 (en) | 1996-02-28 | 2006-07-04 | Sandisk Corporation | EEPROM with split gate source side infection with sidewall spacers |
US5471422A (en) * | 1994-04-11 | 1995-11-28 | Motorola, Inc. | EEPROM cell with isolation transistor and methods for making and operating the same |
US5498560A (en) * | 1994-09-16 | 1996-03-12 | Motorola, Inc. | Process for forming an electrically programmable read-only memory cell |
JP2689921B2 (ja) * | 1994-09-29 | 1997-12-10 | 日本電気株式会社 | 半導体不揮発性記憶装置及びその製造方法 |
US5554551A (en) * | 1994-11-23 | 1996-09-10 | United Microelectronics Corporation | Method of manufacture of an EEPROM cell with self-aligned thin dielectric area |
KR0142603B1 (ko) * | 1995-03-14 | 1998-07-01 | 김주용 | 플래쉬 이이피롬 셀 및 그 제조방법 |
JPH11143379A (ja) | 1997-09-03 | 1999-05-28 | Semiconductor Energy Lab Co Ltd | 半導体表示装置補正システムおよび半導体表示装置の補正方法 |
US6274900B1 (en) | 1998-01-05 | 2001-08-14 | Texas Instruments Incorporated | Semiconductor device architectures including UV transmissive nitride layers |
US6022770A (en) * | 1998-03-24 | 2000-02-08 | International Business Machines Corporation | NVRAM utilizing high voltage TFT device and method for making the same |
KR100298586B1 (ko) * | 1999-07-13 | 2001-11-01 | 윤종용 | 비휘발성 메모리 소자 |
US6087695A (en) * | 1999-08-20 | 2000-07-11 | Worldwide Semiconductor Mfg | Source side injection flash EEPROM memory cell with dielectric pillar and operation |
TW523881B (en) * | 2001-02-08 | 2003-03-11 | Samsung Electronics Co Ltd | Non-volatile memory device and method of manufacturing the same |
KR100399415B1 (ko) * | 2001-02-08 | 2003-09-26 | 삼성전자주식회사 | 비휘발성 메모리소자 및 그의 제조방법 |
CN105633101A (zh) * | 2016-04-01 | 2016-06-01 | 京东方科技集团股份有限公司 | Tft阵列基板及其制造方法、显示装置 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57132365A (en) * | 1981-02-10 | 1982-08-16 | Toshiba Corp | Nonvolatile semiconductor memory storage |
JPS59121880A (ja) * | 1982-12-28 | 1984-07-14 | Toshiba Corp | 不揮発性半導体記憶装置 |
JPS60182162A (ja) * | 1984-02-28 | 1985-09-17 | Nec Corp | 不揮発性半導体メモリ |
JPS6177359A (ja) * | 1984-09-21 | 1986-04-19 | Fujitsu Ltd | 半導体記憶装置 |
JPS6178169A (ja) * | 1984-09-26 | 1986-04-21 | Hitachi Ltd | 半導体記憶装置 |
JPS61134059A (ja) * | 1984-12-05 | 1986-06-21 | Toshiba Corp | 半導体記憶装置 |
JPS61194877A (ja) * | 1985-02-25 | 1986-08-29 | Nec Corp | 絶縁ゲ−ト型不揮発性半導体メモリ |
JPS6271263A (ja) * | 1985-09-25 | 1987-04-01 | Hitachi Ltd | 半導体装置 |
JPS62265768A (ja) * | 1986-05-13 | 1987-11-18 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JPS6370557A (ja) * | 1986-09-12 | 1988-03-30 | Nec Corp | 半導体メモリセル |
JPH01255269A (ja) * | 1988-04-05 | 1989-10-12 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
US5057885A (en) * | 1989-07-28 | 1991-10-15 | Casio Computer Co., Ltd. | Memory cell system with first and second gates |
US4964080A (en) * | 1990-03-09 | 1990-10-16 | Intel Corporation | Three-dimensional memory cell with integral select transistor |
JPH03278580A (ja) * | 1990-03-28 | 1991-12-10 | Casio Comput Co Ltd | 薄膜トランジスタメモリ |
-
1990
- 1990-10-15 JP JP2275942A patent/JP2830447B2/ja not_active Expired - Fee Related
-
1991
- 1991-10-14 DE DE69123814T patent/DE69123814T2/de not_active Expired - Fee Related
- 1991-10-14 EP EP91117461A patent/EP0481392B1/de not_active Expired - Lifetime
- 1991-10-15 KR KR1019910018086A patent/KR960016835B1/ko not_active IP Right Cessation
- 1991-10-15 US US07/775,463 patent/US5267195A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2830447B2 (ja) | 1998-12-02 |
EP0481392A2 (de) | 1992-04-22 |
DE69123814T2 (de) | 1997-07-10 |
EP0481392B1 (de) | 1996-12-27 |
JPH04151877A (ja) | 1992-05-25 |
KR960016835B1 (ko) | 1996-12-21 |
US5267195A (en) | 1993-11-30 |
KR920008927A (ko) | 1992-05-28 |
EP0481392A3 (en) | 1993-01-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |