DE69122192D1 - Halbleiterspeichereinrichtung - Google Patents
HalbleiterspeichereinrichtungInfo
- Publication number
- DE69122192D1 DE69122192D1 DE69122192T DE69122192T DE69122192D1 DE 69122192 D1 DE69122192 D1 DE 69122192D1 DE 69122192 T DE69122192 T DE 69122192T DE 69122192 T DE69122192 T DE 69122192T DE 69122192 D1 DE69122192 D1 DE 69122192D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16879890 | 1990-06-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69122192D1 true DE69122192D1 (de) | 1996-10-24 |
DE69122192T2 DE69122192T2 (de) | 1997-04-24 |
Family
ID=15874675
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69122192T Expired - Fee Related DE69122192T2 (de) | 1990-06-26 | 1991-06-26 | Halbleiterspeichereinrichtung |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0468218B1 (de) |
KR (1) | KR950009892B1 (de) |
DE (1) | DE69122192T2 (de) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6046554B2 (ja) * | 1978-12-14 | 1985-10-16 | 株式会社東芝 | 半導体記憶素子及び記憶回路 |
JPS5728364A (en) * | 1980-07-28 | 1982-02-16 | Fujitsu Ltd | Semiconductor memory device |
US4380057A (en) * | 1980-10-27 | 1983-04-12 | International Business Machines Corporation | Electrically alterable double dense memory |
JPS62120070A (ja) * | 1985-11-20 | 1987-06-01 | Toshiba Corp | 半導体記憶装置 |
JPS6465873A (en) * | 1987-09-07 | 1989-03-13 | Oki Electric Ind Co Ltd | Manufacture of semiconductor element |
JP2723530B2 (ja) * | 1988-04-13 | 1998-03-09 | 日本電気株式会社 | ダイナミック型ランダムアクセスメモリ装置の製造方法 |
-
1991
- 1991-06-26 DE DE69122192T patent/DE69122192T2/de not_active Expired - Fee Related
- 1991-06-26 EP EP91110607A patent/EP0468218B1/de not_active Expired - Lifetime
- 1991-06-26 KR KR1019910010678A patent/KR950009892B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69122192T2 (de) | 1997-04-24 |
EP0468218A1 (de) | 1992-01-29 |
KR920001551A (ko) | 1992-01-30 |
EP0468218B1 (de) | 1996-09-18 |
KR950009892B1 (ko) | 1995-09-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |