DE69614299T2 - Nichtflüchtige Halbleiterspeicheranordnung mit Block-Löschfunktion - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung mit Block-Löschfunktion

Info

Publication number
DE69614299T2
DE69614299T2 DE69614299T DE69614299T DE69614299T2 DE 69614299 T2 DE69614299 T2 DE 69614299T2 DE 69614299 T DE69614299 T DE 69614299T DE 69614299 T DE69614299 T DE 69614299T DE 69614299 T2 DE69614299 T2 DE 69614299T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
block erase
erase function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69614299T
Other languages
English (en)
Other versions
DE69614299D1 (de
Inventor
Koji Sakui
Hiroshi Nakamura
Toshihiko Himeno
Junichi Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69614299D1 publication Critical patent/DE69614299D1/de
Publication of DE69614299T2 publication Critical patent/DE69614299T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
DE69614299T 1995-04-17 1996-04-16 Nichtflüchtige Halbleiterspeicheranordnung mit Block-Löschfunktion Expired - Lifetime DE69614299T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9042095A JP3544743B2 (ja) 1995-04-17 1995-04-17 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69614299D1 DE69614299D1 (de) 2001-09-13
DE69614299T2 true DE69614299T2 (de) 2002-04-18

Family

ID=13998116

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614299T Expired - Lifetime DE69614299T2 (de) 1995-04-17 1996-04-16 Nichtflüchtige Halbleiterspeicheranordnung mit Block-Löschfunktion

Country Status (6)

Country Link
US (2) US5818756A (de)
EP (1) EP0739016B1 (de)
JP (1) JP3544743B2 (de)
KR (1) KR100234609B1 (de)
DE (1) DE69614299T2 (de)
TW (1) TW312014B (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3544743B2 (ja) * 1995-04-17 2004-07-21 株式会社東芝 半導体記憶装置
DE19730116C2 (de) * 1997-07-14 2001-12-06 Infineon Technologies Ag Halbleiterspeicher mit nicht-flüchtigen Zwei-Transistor-Speicherzellen
JP3175665B2 (ja) * 1997-10-24 2001-06-11 日本電気株式会社 不揮発性半導体記憶装置のデータ消去方法
JPH11177071A (ja) * 1997-12-11 1999-07-02 Toshiba Corp 不揮発性半導体記憶装置
US6359810B1 (en) * 1998-03-13 2002-03-19 Atmel Corporation Page mode erase in a flash memory array
US6542909B1 (en) 1998-06-30 2003-04-01 Emc Corporation System for determining mapping of logical objects in a computer system
US6883063B2 (en) * 1998-06-30 2005-04-19 Emc Corporation Method and apparatus for initializing logical objects in a data storage system
US6393540B1 (en) 1998-06-30 2002-05-21 Emc Corporation Moving a logical object from a set of source locations to a set of destination locations using a single command
US7383294B1 (en) 1998-06-30 2008-06-03 Emc Corporation System for determining the mapping of logical objects in a data storage system
JP3853981B2 (ja) * 1998-07-02 2006-12-06 株式会社東芝 半導体記憶装置の製造方法
JP2001028427A (ja) * 1999-07-14 2001-01-30 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3730508B2 (ja) * 2000-11-13 2006-01-05 株式会社東芝 半導体記憶装置およびその動作方法
JP4203372B2 (ja) * 2003-08-26 2008-12-24 富士雄 舛岡 不揮発性半導体記憶装置及びそれを備えてなる液晶表示装置
JP2005191413A (ja) * 2003-12-26 2005-07-14 Toshiba Corp 不揮発性半導体記憶装置
KR100559715B1 (ko) * 2004-02-25 2006-03-10 주식회사 하이닉스반도체 낸드 플래시 메모리 소자의 소거 방법
KR100673170B1 (ko) * 2005-03-10 2007-01-22 주식회사 하이닉스반도체 향상된 소거 기능을 가지는 플래쉬 메모리 장치 및 그 소거동작 제어 방법
JP4903432B2 (ja) * 2005-12-27 2012-03-28 株式会社東芝 不揮発性半導体記憶装置
KR100849212B1 (ko) * 2006-10-12 2008-07-31 삼성전자주식회사 메모리 카드 및 메모리 카드의 구동 프로그램 업데이트방법
KR100781041B1 (ko) * 2006-11-06 2007-11-30 주식회사 하이닉스반도체 플래시 메모리 장치 및 그 소거 동작 제어 방법
KR101330710B1 (ko) * 2007-11-01 2013-11-19 삼성전자주식회사 플래시 메모리 장치
JP2009253144A (ja) * 2008-04-09 2009-10-29 Toshiba Corp 半導体装置およびその製造方法
JP5305856B2 (ja) 2008-11-19 2013-10-02 株式会社東芝 不揮発性半導体メモリ
JP2010123208A (ja) * 2008-11-20 2010-06-03 Toshiba Corp Ｎａｎｄ型フラッシュメモリ
US8860117B2 (en) 2011-04-28 2014-10-14 Micron Technology, Inc. Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods
US8964474B2 (en) 2012-06-15 2015-02-24 Micron Technology, Inc. Architecture for 3-D NAND memory
US8982625B2 (en) * 2012-08-31 2015-03-17 Micron Technology, Inc. Memory program disturb reduction
JP2015053094A (ja) * 2013-09-06 2015-03-19 株式会社東芝 半導体記憶装置
JP6139370B2 (ja) * 2013-10-17 2017-05-31 株式会社東芝 不揮発性半導体記憶装置
US9679650B1 (en) 2016-05-06 2017-06-13 Micron Technology, Inc. 3D NAND memory Z-decoder
US10074430B2 (en) 2016-08-08 2018-09-11 Micron Technology, Inc. Multi-deck memory device with access line and data line segregation between decks and method of operation thereof
US11450381B2 (en) 2019-08-21 2022-09-20 Micron Technology, Inc. Multi-deck memory device including buffer circuitry under array

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357462A (en) * 1991-09-24 1994-10-18 Kabushiki Kaisha Toshiba Electrically erasable and programmable non-volatile semiconductor memory with automatic write-verify controller
KR960000616B1 (ko) * 1993-01-13 1996-01-10 삼성전자주식회사 불휘발성 반도체 메모리 장치
JPH06259977A (ja) * 1993-03-03 1994-09-16 Nec Ic Microcomput Syst Ltd フラッシュ消去型不揮発性メモリ
WO1994028554A1 (en) * 1993-05-28 1994-12-08 Macronix International Co., Ltd. Fast flash eprom programming and pre-programming circuit design
KR960008823B1 (en) * 1993-11-30 1996-07-05 Samsung Electronics Co Ltd Non-volatile semiconductor memory device
JP3192861B2 (ja) * 1994-03-14 2001-07-30 株式会社東芝 不揮発性半導体記憶装置
JP3544743B2 (ja) * 1995-04-17 2004-07-21 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
EP0739016A2 (de) 1996-10-23
KR100234609B1 (ko) 1999-12-15
EP0739016A3 (de) 1998-09-30
US5818756A (en) 1998-10-06
TW312014B (de) 1997-08-01
JPH08287696A (ja) 1996-11-01
DE69614299D1 (de) 2001-09-13
KR960039003A (ko) 1996-11-21
US6240022B1 (en) 2001-05-29
EP0739016B1 (de) 2001-08-08
JP3544743B2 (ja) 2004-07-21

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