DE69128960T2 - Halbleiterspeichereinheit mit einer redundanzstruktur - Google Patents

Halbleiterspeichereinheit mit einer redundanzstruktur

Info

Publication number
DE69128960T2
DE69128960T2 DE69128960T DE69128960T DE69128960T2 DE 69128960 T2 DE69128960 T2 DE 69128960T2 DE 69128960 T DE69128960 T DE 69128960T DE 69128960 T DE69128960 T DE 69128960T DE 69128960 T2 DE69128960 T2 DE 69128960T2
Authority
DE
Germany
Prior art keywords
storage unit
semiconductor storage
redundancy structure
redundancy
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69128960T
Other languages
English (en)
Other versions
DE69128960D1 (de
Inventor
Yoshihiro Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69128960D1 publication Critical patent/DE69128960D1/de
Application granted granted Critical
Publication of DE69128960T2 publication Critical patent/DE69128960T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/81—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a hierarchical redundancy scheme
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G11C29/832—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption with disconnection of faulty elements
DE69128960T 1990-10-16 1991-10-16 Halbleiterspeichereinheit mit einer redundanzstruktur Expired - Fee Related DE69128960T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2276889A JP3019869B2 (ja) 1990-10-16 1990-10-16 半導体メモリ
PCT/JP1991/001406 WO1992007362A1 (en) 1990-10-16 1991-10-16 Semiconductor memory unit having redundant structure

Publications (2)

Publication Number Publication Date
DE69128960D1 DE69128960D1 (de) 1998-04-02
DE69128960T2 true DE69128960T2 (de) 1998-06-18

Family

ID=17575813

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128960T Expired - Fee Related DE69128960T2 (de) 1990-10-16 1991-10-16 Halbleiterspeichereinheit mit einer redundanzstruktur

Country Status (6)

Country Link
US (1) US5307316A (de)
EP (1) EP0504434B1 (de)
JP (1) JP3019869B2 (de)
KR (1) KR960009229B1 (de)
DE (1) DE69128960T2 (de)
WO (1) WO1992007362A1 (de)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0543656B1 (de) * 1991-11-20 1998-09-16 Fujitsu Limited Löschbare Halbleiterspeicheranordnung mit verbesserter Zuverlässigkeit
JP3040625B2 (ja) * 1992-02-07 2000-05-15 松下電器産業株式会社 半導体記憶装置
DE69331061T2 (de) 1992-08-10 2002-06-06 Monolithic System Tech Inc Fehlertolerantes hierarchisiertes Bussystem
US5452251A (en) 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
KR960008788B1 (en) * 1992-12-30 1996-07-03 Hyundai Electronics Ind Row redundancy circuit
JP3265076B2 (ja) * 1993-09-20 2002-03-11 株式会社東芝 半導体記憶装置
US5519657A (en) * 1993-09-30 1996-05-21 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having a redundant memory array and a testing method thereof
US5495447A (en) * 1993-10-08 1996-02-27 Digital Equipment Corporation Method and apparatus using mapped redundancy to perform multiple large block memory array repair
US5473573A (en) * 1994-05-09 1995-12-05 Cirrus Logic, Inc. Single chip controller-memory device and a memory architecture and methods suitable for implementing the same
JPH0817197A (ja) * 1994-06-30 1996-01-19 Fujitsu Ltd 半導体記憶装置
US5655113A (en) * 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5822256A (en) * 1994-09-06 1998-10-13 Intel Corporation Method and circuitry for usage of partially functional nonvolatile memory
JP2742220B2 (ja) * 1994-09-09 1998-04-22 松下電器産業株式会社 半導体記憶装置
JP3425811B2 (ja) * 1994-09-28 2003-07-14 Ｎｅｃエレクトロニクス株式会社 半導体メモリ
JP3263259B2 (ja) * 1994-10-04 2002-03-04 株式会社東芝 半導体記憶装置
JPH08203275A (ja) * 1995-01-28 1996-08-09 Sony Corp 遅延用メモリｉｃ
GB2292236A (en) * 1995-04-04 1996-02-14 Memory Corp Plc Improved partial memory engine
US5621690A (en) * 1995-04-28 1997-04-15 Intel Corporation Nonvolatile memory blocking architecture and redundancy
US5623448A (en) * 1995-05-09 1997-04-22 Texas Instruments Incorporated Apparatus and method for implementing integrated circuit memory device component redundancy using dynamic power distribution switching
US5572470A (en) * 1995-05-10 1996-11-05 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column
EP0758112B1 (de) * 1995-08-09 2002-07-03 Infineon Technologies AG Integrierte Halbleiter-Speichervorrichtung mit Redundanzschaltungsanordnung
US5771195A (en) * 1995-12-29 1998-06-23 Sgs-Thomson Microelectronics, Inc. Circuit and method for replacing a defective memory cell with a redundant memory cell
US5841709A (en) * 1995-12-29 1998-11-24 Stmicroelectronics, Inc. Memory having and method for testing redundant memory cells
US5790462A (en) * 1995-12-29 1998-08-04 Sgs-Thomson Microelectronics, Inc. Redundancy control
US5612918A (en) * 1995-12-29 1997-03-18 Sgs-Thomson Microelectronics, Inc. Redundancy architecture
US6037799A (en) * 1995-12-29 2000-03-14 Stmicroelectronics, Inc. Circuit and method for selecting a signal
US5706292A (en) 1996-04-25 1998-01-06 Micron Technology, Inc. Layout for a semiconductor memory device having redundant elements
US5699307A (en) * 1996-06-28 1997-12-16 Intel Corporation Method and apparatus for providing redundant memory in an integrated circuit utilizing a subarray shuffle replacement scheme
US6172935B1 (en) 1997-04-25 2001-01-09 Micron Technology, Inc. Synchronous dynamic random access memory device
JP3688443B2 (ja) * 1997-08-28 2005-08-31 株式会社東芝 半導体記憶装置
JPH11219598A (ja) * 1998-02-03 1999-08-10 Mitsubishi Electric Corp 半導体記憶装置
JP2000243086A (ja) * 1998-12-24 2000-09-08 Mitsubishi Electric Corp 半導体記憶装置
JP4413306B2 (ja) 1999-03-23 2010-02-10 株式会社東芝 半導体記憶装置
JP2000285694A (ja) 1999-03-30 2000-10-13 Mitsubishi Electric Corp 半導体記憶装置および半導体記憶装置を搭載する半導体集積回路装置
US6745354B2 (en) * 2000-02-02 2004-06-01 Broadcom Corporation Memory redundancy implementation
US8164362B2 (en) * 2000-02-02 2012-04-24 Broadcom Corporation Single-ended sense amplifier with sample-and-hold reference
US7173867B2 (en) * 2001-02-02 2007-02-06 Broadcom Corporation Memory redundancy circuit techniques
JP3457611B2 (ja) * 2000-02-16 2003-10-20 日本電気株式会社 半導体記憶装置
JP4398574B2 (ja) * 2000-07-19 2010-01-13 富士通マイクロエレクトロニクス株式会社 半導体記憶装置とその冗長方法
JP2003187591A (ja) * 2001-12-14 2003-07-04 Toshiba Corp 半導体記憶装置
JP4235122B2 (ja) * 2004-02-06 2009-03-11 シャープ株式会社 半導体記憶装置及び半導体記憶装置のテスト方法
KR100533385B1 (ko) * 2004-04-16 2005-12-06 주식회사 하이닉스반도체 반도체 메모리 테스트 방법
JP4677222B2 (ja) * 2004-11-26 2011-04-27 富士通株式会社 サーバ装置
JP4524636B2 (ja) * 2005-03-24 2010-08-18 エルピーダメモリ株式会社 半導体記憶装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58208998A (ja) * 1982-05-28 1983-12-05 Toshiba Corp 半導体ｃｍｏｓメモリ
JPS59119743A (ja) * 1982-12-25 1984-07-11 Nippon Telegr & Teleph Corp <Ntt> 集積回路の冗長構成方式
JPS60137000A (ja) * 1984-12-06 1985-07-20 Hitachi Ltd 半導体メモリ集積回路
JPS62200599A (ja) * 1986-02-26 1987-09-04 Sharp Corp 半導体記憶素子
JP2700640B2 (ja) * 1986-09-24 1998-01-21 日立超エル・エス・アイ・エンジニアリング 株式会社 半導体記憶装置
NL8900026A (nl) * 1989-01-06 1990-08-01 Philips Nv Matrixgeheugen, bevattende standaardblokken, standaardsubblokken, een redundant blok, en redundante subblokken, alsmede geintegreerde schakeling bevattende meerdere van zulke matrixgeheugens.
JP2664236B2 (ja) * 1989-02-01 1997-10-15 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
EP0504434A1 (de) 1992-09-23
WO1992007362A1 (en) 1992-04-30
DE69128960D1 (de) 1998-04-02
EP0504434A4 (de) 1994-12-14
JPH04152565A (ja) 1992-05-26
US5307316A (en) 1994-04-26
KR960009229B1 (en) 1996-07-16
KR920704304A (ko) 1992-12-19
JP3019869B2 (ja) 2000-03-13
EP0504434B1 (de) 1998-02-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee