DE602004022812D1 - Daten-strobe-synchronisationsschaltung und verfahren für doppeldatenraten-mehrbit-schreiboperationen - Google Patents

Daten-strobe-synchronisationsschaltung und verfahren für doppeldatenraten-mehrbit-schreiboperationen

Info

Publication number
DE602004022812D1
DE602004022812D1 DE602004022812T DE602004022812T DE602004022812D1 DE 602004022812 D1 DE602004022812 D1 DE 602004022812D1 DE 602004022812 T DE602004022812 T DE 602004022812T DE 602004022812 T DE602004022812 T DE 602004022812T DE 602004022812 D1 DE602004022812 D1 DE 602004022812D1
Authority
DE
Germany
Prior art keywords
data strobe
logic circuit
signal
enable signal
write operations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE602004022812T
Other languages
English (en)
Inventor
Christopher K Morzano
Wen Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602004022812D1 publication Critical patent/DE602004022812D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066Output synchronization
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087Data input latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093Input synchronization

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
DE602004022812T 2003-07-09 2004-07-07 Daten-strobe-synchronisationsschaltung und verfahren für doppeldatenraten-mehrbit-schreiboperationen Expired - Fee Related DE602004022812D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/617,246 US6922367B2 (en) 2003-07-09 2003-07-09 Data strobe synchronization circuit and method for double data rate, multi-bit writes
PCT/US2004/021946 WO2005008673A1 (en) 2003-07-09 2004-07-07 Data strobe synchronization circuit and method for double data rate, multi-bit writes

Publications (1)

Publication Number Publication Date
DE602004022812D1 true DE602004022812D1 (de) 2009-10-08

Family

ID=33564930

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004022812T Expired - Fee Related DE602004022812D1 (de) 2003-07-09 2004-07-07 Daten-strobe-synchronisationsschaltung und verfahren für doppeldatenraten-mehrbit-schreiboperationen

Country Status (8)

Country Link
US (3) US6922367B2 (de)
EP (1) EP1642297B1 (de)
JP (1) JP4984129B2 (de)
KR (1) KR100885388B1 (de)
CN (1) CN1820322A (de)
AT (1) ATE441187T1 (de)
DE (1) DE602004022812D1 (de)
WO (1) WO2005008673A1 (de)

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KR20180062511A (ko) * 2016-11-30 2018-06-11 에스케이하이닉스 주식회사 메모리 장치 및 이의 동작 방법, 메모리 시스템의 동작 방법
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US10339998B1 (en) * 2018-03-27 2019-07-02 Micron Technology, Inc. Apparatuses and methods for providing clock signals in a semiconductor device
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CN117095711A (zh) * 2022-05-13 2023-11-21 长鑫存储技术有限公司 命令处理电路及数据处理电路

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Also Published As

Publication number Publication date
WO2005008673A1 (en) 2005-01-27
US20050007836A1 (en) 2005-01-13
US20080181031A1 (en) 2008-07-31
US6922367B2 (en) 2005-07-26
EP1642297A1 (de) 2006-04-05
KR20060030109A (ko) 2006-04-07
EP1642297B1 (de) 2009-08-26
US7362619B2 (en) 2008-04-22
ATE441187T1 (de) 2009-09-15
CN1820322A (zh) 2006-08-16
US7561477B2 (en) 2009-07-14
JP4984129B2 (ja) 2012-07-25
KR100885388B1 (ko) 2009-02-24
JP2007529082A (ja) 2007-10-18
EP1642297A4 (de) 2006-08-30
US20050254336A1 (en) 2005-11-17

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