DE60121720D1 - Halbleiterspeicheranordnung mit einer Vielzahl von Moden für geringen Stromverbrauch - Google Patents

Halbleiterspeicheranordnung mit einer Vielzahl von Moden für geringen Stromverbrauch

Info

Publication number
DE60121720D1
DE60121720D1 DE60121720T DE60121720T DE60121720D1 DE 60121720 D1 DE60121720 D1 DE 60121720D1 DE 60121720 T DE60121720 T DE 60121720T DE 60121720 T DE60121720 T DE 60121720T DE 60121720 D1 DE60121720 D1 DE 60121720D1
Authority
DE
Germany
Prior art keywords
memory device
power consumption
semiconductor memory
low power
consumption modes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60121720T
Other languages
English (en)
Other versions
DE60121720T2 (de
Inventor
Hajime Sato
Kotoku Sato
Satoru Kawamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE60121720D1 publication Critical patent/DE60121720D1/de
Publication of DE60121720T2 publication Critical patent/DE60121720T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045Read-write mode select circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
DE60121720T 2000-11-30 2001-11-29 Halbleiterspeicheranordnung mit einer Vielzahl von Moden für geringen Stromverbrauch Expired - Lifetime DE60121720T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000364583A JP4216457B2 (ja) 2000-11-30 2000-11-30 半導体記憶装置及び半導体装置
JP2000364583 2000-11-30

Publications (2)

Publication Number Publication Date
DE60121720D1 true DE60121720D1 (de) 2006-09-07
DE60121720T2 DE60121720T2 (de) 2006-11-23

Family

ID=18835496

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60121720T Expired - Lifetime DE60121720T2 (de) 2000-11-30 2001-11-29 Halbleiterspeicheranordnung mit einer Vielzahl von Moden für geringen Stromverbrauch

Country Status (7)

Country Link
US (1) US6515928B2 (de)
EP (1) EP1225589B1 (de)
JP (1) JP4216457B2 (de)
KR (1) KR100771059B1 (de)
CN (1) CN1189890C (de)
DE (1) DE60121720T2 (de)
TW (1) TW517234B (de)

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US6515928B2 (en) 2003-02-04
US20020064079A1 (en) 2002-05-30
JP4216457B2 (ja) 2009-01-28
EP1225589A2 (de) 2002-07-24
EP1225589B1 (de) 2006-07-26
DE60121720T2 (de) 2006-11-23
KR20020042408A (ko) 2002-06-05
JP2002170383A (ja) 2002-06-14
CN1355536A (zh) 2002-06-26
KR100771059B1 (ko) 2007-10-30
TW517234B (en) 2003-01-11
EP1225589A3 (de) 2004-01-02

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