DE4132116C2 - - Google Patents

Info

Publication number
DE4132116C2
DE4132116C2 DE4132116A DE4132116A DE4132116C2 DE 4132116 C2 DE4132116 C2 DE 4132116C2 DE 4132116 A DE4132116 A DE 4132116A DE 4132116 A DE4132116 A DE 4132116A DE 4132116 C2 DE4132116 C2 DE 4132116C2
Authority
DE
Germany
Prior art keywords
sub
row
column
lines
main
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE4132116A
Other languages
German (de)
English (en)
Other versions
DE4132116A1 (de
Inventor
Mitsuya Kinoshita
Shigeru Mori
Yoshikazu Morooka
Hiroshi Miyamoto
Shigeru Kikuda
Makoto Itami Hyogo Jp Suwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE4132116A1 publication Critical patent/DE4132116A1/de
Application granted granted Critical
Publication of DE4132116C2 publication Critical patent/DE4132116C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
DE4132116A 1990-09-29 1991-09-26 Redundanzschaltkreis zum reparieren defekter bits in einer halbleiterspeichereinrichtung Granted DE4132116A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2261213A JP2600018B2 (ja) 1990-09-29 1990-09-29 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE4132116A1 DE4132116A1 (de) 1992-04-09
DE4132116C2 true DE4132116C2 (enrdf_load_stackoverflow) 1993-07-22

Family

ID=17358716

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4132116A Granted DE4132116A1 (de) 1990-09-29 1991-09-26 Redundanzschaltkreis zum reparieren defekter bits in einer halbleiterspeichereinrichtung

Country Status (4)

Country Link
US (1) US5574729A (enrdf_load_stackoverflow)
JP (1) JP2600018B2 (enrdf_load_stackoverflow)
KR (1) KR950007456B1 (enrdf_load_stackoverflow)
DE (1) DE4132116A1 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19545743A1 (de) * 1994-12-07 1996-06-13 Toshiba Kawasaki Kk Halbleiterspeichervorrichtung mit Speicherzellenmatrix

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US5291443A (en) * 1991-06-26 1994-03-01 Micron Technology, Inc. Simultaneous read and refresh of different rows in a dram
JPH05334898A (ja) * 1992-06-02 1993-12-17 Mitsubishi Electric Corp 半導体記憶装置
US5465233A (en) * 1993-05-28 1995-11-07 Sgs-Thomson Microelectronics, Inc. Structure for deselecting broken select lines in memory arrays
JPH08227597A (ja) * 1995-02-21 1996-09-03 Mitsubishi Electric Corp 半導体記憶装置
KR100192574B1 (ko) * 1995-10-04 1999-06-15 윤종용 디코디드 퓨즈를 사용한 반도체 메모리 장치의 컬럼 리던던시 회로
JP3501893B2 (ja) * 1996-02-23 2004-03-02 株式会社 沖マイクロデザイン 半導体記憶装置
KR0177406B1 (ko) * 1996-04-12 1999-04-15 문정환 스페어 디코더 회로
US5781486A (en) * 1996-04-16 1998-07-14 Micron Technology Corporation Apparatus for testing redundant elements in a packaged semiconductor memory device
US5706292A (en) * 1996-04-25 1998-01-06 Micron Technology, Inc. Layout for a semiconductor memory device having redundant elements
JP3839869B2 (ja) * 1996-05-30 2006-11-01 株式会社ルネサステクノロジ 半導体記憶装置
DE19630918A1 (de) * 1996-07-31 1997-10-16 Siemens Ag Datenmassenspeicher und Verfahren zur Verarbeitung von in einem solchen Datenmassenspeichermedium gespeicherten Daten
US5734617A (en) * 1996-08-01 1998-03-31 Micron Technology Corporation Shared pull-up and selection circuitry for programmable cells such as antifuse cells
US6104209A (en) 1998-08-27 2000-08-15 Micron Technology, Inc. Low skew differential receiver with disable feature
JP3964491B2 (ja) * 1997-03-25 2007-08-22 株式会社ルネサステクノロジ 半導体記憶装置及び半導体記憶装置の欠陥救済方法
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6551857B2 (en) * 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US6032264A (en) 1997-04-22 2000-02-29 Micron Technology, Inc. Apparatus and method implementing repairs on a memory device
FR2764095B1 (fr) * 1997-05-30 2001-10-12 Sgs Thomson Microelectronics Circuit de memoire avec redondance dynamique
US5848008A (en) * 1997-09-25 1998-12-08 Siemens Aktiengesellschaft Floating bitline test mode with digitally controllable bitline equalizers
US6212482B1 (en) 1998-03-06 2001-04-03 Micron Technology, Inc. Circuit and method for specifying performance parameters in integrated circuits
JP4603111B2 (ja) * 1999-06-17 2010-12-22 富士通セミコンダクター株式会社 半導体記憶装置
US6198675B1 (en) * 1998-12-23 2001-03-06 Cray Inc. RAM configurable redundancy
US6452845B1 (en) 1999-01-07 2002-09-17 Micron Technology, Inc. Apparatus for testing redundant elements in a packaged semiconductor memory device
JP4212171B2 (ja) 1999-01-28 2009-01-21 株式会社ルネサステクノロジ メモリ回路／ロジック回路集積システム
DE10012104C2 (de) * 2000-03-13 2002-05-02 Infineon Technologies Ag Redundanz-Multiplexer für Halbleiterspeicheranordnung
US6262935B1 (en) * 2000-06-17 2001-07-17 United Memories, Inc. Shift redundancy scheme for wordlines in memory circuits
KR20030030165A (ko) * 2001-10-09 2003-04-18 동부전자 주식회사 메모리 디바이스의 전원 불량 테스트 장치
JP4012474B2 (ja) 2003-02-18 2007-11-21 富士通株式会社 シフト冗長回路、シフト冗長回路の制御方法及び半導体記憶装置
US20050050400A1 (en) * 2003-08-30 2005-03-03 Wuu John J. Shift redundancy encoding for use with digital memories
TWI242213B (en) * 2003-09-09 2005-10-21 Winbond Electronics Corp Device and method of leakage current cuter and memory cell and memory device thereof
JP4421446B2 (ja) * 2004-11-01 2010-02-24 株式会社東芝 不揮発性半導体記憶装置
US20060274585A1 (en) * 2005-06-03 2006-12-07 Jung Chang H Memory device with row shifting for defective row repair
JP4703620B2 (ja) * 2007-09-14 2011-06-15 株式会社東芝 半導体記憶装置
US20110134707A1 (en) * 2007-11-02 2011-06-09 Saeng Hwan Kim Block isolation control circuit
US9348694B1 (en) * 2013-10-09 2016-05-24 Avago Technologies General Ip (Singapore) Pte. Ltd. Detecting and managing bad columns
KR20160035836A (ko) * 2014-09-24 2016-04-01 에스케이하이닉스 주식회사 전자 장치
US11221794B2 (en) * 2019-02-20 2022-01-11 International Business Machines Corporation Memory array element sparing
EP3739872B1 (en) * 2019-05-17 2022-02-23 Teledyne Innovaciones Microelectrónicas, SLU Cmos optical sensor with a scalable repairing scheme to repair defective readout channels providing a further function of row noise suppression and corresponding row noise suppression method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928560Y2 (ja) * 1979-11-13 1984-08-17 富士通株式会社 冗長ビットを有する記憶装置
JPS58175196A (ja) * 1982-04-05 1983-10-14 Toshiba Corp 半導体メモリ−
JPS6135636A (ja) * 1984-07-27 1986-02-20 Sony Corp 光信号伝送装置
JPS6161300A (ja) * 1984-09-03 1986-03-29 Hitachi Ltd 欠陥救済回路
JPS62183159A (ja) * 1986-02-06 1987-08-11 Nec Corp 半導体装置
JP2577724B2 (ja) * 1986-07-31 1997-02-05 三菱電機株式会社 半導体記憶装置
JPS6427099A (en) * 1987-07-22 1989-01-30 I O Data Kiki Kk Semiconductor memory device
JPS6442099A (en) * 1987-08-07 1989-02-14 Sharp Kk Semiconductor device
JP2837433B2 (ja) * 1989-06-05 1998-12-16 三菱電機株式会社 半導体記憶装置における不良ビット救済回路
EP0411626B1 (en) * 1989-08-04 1995-10-25 Fujitsu Limited Semiconductor memory device having a redundancy
JPH043399A (ja) * 1990-04-19 1992-01-08 Sharp Corp 半導体記憶装置
NL9201347A (nl) * 1992-07-27 1994-02-16 Oce Nederland Bv Inrichting voor het overdragen van een tonerbeeld van een beeldvormingsmedium naar een ontvangstmateriaal.
JP6135636B2 (ja) * 2014-10-17 2017-05-31 トヨタ自動車株式会社 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19545743A1 (de) * 1994-12-07 1996-06-13 Toshiba Kawasaki Kk Halbleiterspeichervorrichtung mit Speicherzellenmatrix
DE19545743B4 (de) * 1994-12-07 2007-11-29 Kabushiki Kaisha Toshiba, Kawasaki Halbleiterspeichervorrichtung mit Speicherzellenmatrix

Also Published As

Publication number Publication date
KR950007456B1 (ko) 1995-07-11
JPH04139700A (ja) 1992-05-13
DE4132116A1 (de) 1992-04-09
JP2600018B2 (ja) 1997-04-16
KR920006997A (ko) 1992-04-28
US5574729A (en) 1996-11-12

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee