CN1950939B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1950939B
CN1950939B CN2005800145828A CN200580014582A CN1950939B CN 1950939 B CN1950939 B CN 1950939B CN 2005800145828 A CN2005800145828 A CN 2005800145828A CN 200580014582 A CN200580014582 A CN 200580014582A CN 1950939 B CN1950939 B CN 1950939B
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mentioned
semiconductor chip
opening
overlooking
solid unit
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CN1950939A (zh
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谷田一真
宫田修
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Rohm Co Ltd
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Rohm Co Ltd
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Abstract

提供一种半导体装置(1、21)，包括：固体装置(2、22)；半导体芯片(3)，其具有形成了功能元件(4)的功能面(3a)，使该功能面相面对于上述固体装置的表面，在与上述固体装置的表面之间保持规定的间隔而接合；绝缘膜(6)，其设置于上述固体装置的与上述半导体芯片的相对面(2a、22a)，并具有开口(6a)，该开口(6a)在垂直俯视该相对面的俯视中，形成为比上述半导体芯片大的尺寸；以及密封层(7)，其对上述固体装置和上述半导体芯片之间进行密封。

Description

半导体装置
技术领域
本发明涉及具有倒装片连结的半导体芯片的半导体装置。
背景技术
为了半导体装置的小型化以及高密度实际安装，使半导体芯片的形成了功能元件54的功能面与固体装置相对，将半导体芯片连接于固体装置的倒装片连接结构正受到注目。
图4是倒装片连接结构的半导体装置的图解的剖面图。该半导体装置51包括：配线基板52、和使功能面53a相面对于该配线基板52的表面52a而连接的半导体芯片53。
在配线基板52的表面52a形成有矩形状的连接焊盘58，配线基板52和半导体芯片53，通过与该连接焊盘58连接的连接部件55，而以保持规定间隔的方式接合、且相互电连接。另外，在配线基板52的表面52a形成有抗焊剂膜56，该抗焊剂膜56具有比该表面52a和半导体芯片53的功能面53a的间隔小的厚度。
在抗焊剂膜56上形成有用于使连接焊盘58露出的矩形状的开口56a。该开口56a，如图5所示，在俯视观察时形成得比连接焊盘58大，在该开口56a内，在连接焊盘58连接有连接部件55。
另外，在抗焊剂膜56的表面和半导体芯片53的功能面53a之间，形成有微小的间隙，该间隙被下部薄膜(under film)层57密封。该下部薄膜层57是在配线基板52和半导体芯片53的接合后，通过在它们之间注入液状的下部薄膜材而形成的。
具体地说，在配线基板52和半导体芯片53的接合后，如图6A所示，在半导体芯片53的外周部的附近配置分配器(dispenser)60，从该分配器60向抗焊剂膜56的表面和半导体芯片53的功能面53a之间流入液状的下部薄膜材57P。下部薄膜材57P由于毛细管现象，而如图6B所示，进入到抗焊剂膜56的表面和半导体芯片53的功能面53a之间而扩散开。然后，如果抗焊剂膜56的表面和半导体芯片53的功能面53a之间的整个区域都被下部薄膜材57P填满，则停止从分配器60喷出下部薄膜材57P，之后，通过下部薄膜材57P硬化，从而得到下部薄膜层57(参考下述非专利文献1)。
但是，由于在开口56a内和开口56a外的之间产生阶梯差，另外，开口56a的上方被半导体芯片53限制，所以在下部薄膜材流入开口56a内时，在该开口56a的周缘部(阶梯差部分)存在的空气不能很好地排出，而进入下部薄膜材，在下部薄膜层57产生所谓的孔隙61。例如，如果在下部薄膜层57产生孔隙，则在回流(reflow)工序中，在下部薄膜层57产生裂缝，导致半导体装置的可靠性下降。
非专利文献1：Chee Choong Kooi，其他六人，“Capillary Underfill andMold Encapsulati on Materials for Exposed Die Flip Chip Molded MatrixArray Package with Thin Sub strate”，2003 Electronics Packaging TechnologyConference、p.324-330
发明内容
本发明的目的在于，提供能够防止密封层中的孔隙形成的结构的半导体装置。
本发明的半导体装置，包括：固体装置；两个以上的半导体芯片，其具有形成了功能元件的功能面，使该功能面相面对于上述固体装置的表面，在与上述固体装置的表面之间保持规定的间隔而分别被倒装片连接；绝缘膜，其设置于上述固体装置的与上述半导体芯片的相对面，并具有开口，该开口在垂直俯视该相对面的俯视中，形成为比上述半导体芯片大的尺寸，并且所述绝缘膜形成有一个上述开口，在垂直俯视上述相对面的俯视中上述开口完全包含两个以上的上述半导体芯片；以及密封层，其对上述固体装置和上述半导体芯片之间进行密封；上述固体装置和上述半导体芯片由柱状的连接部件连接，上述连接部件是通过接合在上述固定装置上设置的连接焊盘和在上述半导体芯片上设置的突起电极而形成的，上述连接焊盘和上述突起电极具有相同宽度，上述密封层被设置成完全埋住上述开口。
根据该发明，绝缘膜的开口，在垂直俯视固体装置的与半导体芯片的相对面的俯视中，形成为比半导体芯片大的尺寸。换而言之，绝缘膜的开口，在垂直俯视固体装置的相对面的俯视中，形成为完全将半导体芯片包含在其中。由此，能够防止在固体装置和半导体芯片的间隙产生因绝缘膜的开口而引起的阶梯差，并且能够防止该开口周缘部的上方的空间被半导体芯片限制。
因此，在该半导体装置的制造工序中，在绝缘膜的形成以及固体装置和半导体芯片的接合后，为了形成密封层，在将液状的密封树脂材填充于固体装置和半导体芯片的间隙时，能够防止空气进入到液状的密封树脂材而引起的孔隙的形成。其结果是能够提高该半导体装置的可靠性。
在垂直俯视固体装置的与半导体芯片的相对面的俯视中，半导体芯片的外周和绝缘膜的开口缘部的间隔优选在0.1mm以上。
固体装置可以是在绝缘基板上形成配线而构成的配线基板，也可以是半导体基板。
绝缘膜可以是抗焊剂。此时，能够防止被抗焊剂覆盖的区域上的电短路(短路)。
上述密封层可以设置成完全埋住上述开口内。由此，在固体装置中，能够利用密封层保护从绝缘膜的开口露出的露出部。
本发明的上述的、或另外其他的目的、特征以及效果，从参考附图进行的如下述的实施方式的说明可以更加明了。
附图说明
图1是本发明的第一实施方式的半导体装置的图解的剖面图；
图2A是用于说明图1所示的半导体装置的制造方法的图解的剖面图；
图2B是用于说明图1所示的半导体装置的制造方法的图解的剖面图；
图2C是用于说明图1所示的半导体装置的制造方法的图解的剖面图；
图2D是用于说明图1所示的半导体装置的制造方法的图解的剖面图；
图3是本发明的第二实施方式的半导体装置的图解的剖面图；
图4是表示具有倒装片连接的半导体芯片的现有的半导体装置的结构的图解的剖面图；
图5是垂直地俯视图4所示的配线基板的连接面的图解的俯视图；
图6A是用于说明图4所示的半导体装置的制造方法的图解的剖面图；
图6B是用于说明图4所示的半导体装置的制造方法的图解的剖面图；
具体实施方式
图1是本发明的第一实施方式的半导体装置的图解的剖面图。
该半导体装置1包括：配线基板2、和使功能面3a相面对于该配线基板2的表面2a而连接的半导体芯片3。在配线基板2的表面2a形成有矩形状的连接焊盘(参考图2C以及图2D)，配线基板2和半导体芯片3，通过与该连接焊盘连接的连接部件5，而以保持规定间隔的方式接合、且相互电连接。
在配线基板2的表面2a形成有抗焊剂膜6，该抗焊剂膜6具有比该表面2a和半导体芯片3的间隔小的厚度。通过该抗焊剂膜6，防止在配线基板2的表面形成的配线之间的电短路。在抗焊剂膜6上，在垂直俯视表面2a的俯视中，形成有具有比半导体芯片3大的尺寸的开口6a。换而言之，在抗焊剂膜6上，在垂直俯视表面2a的俯视中，形成有在其内部完全包括半导体芯片3的尺寸的开口6a。由此，在配线基板2和半导体芯片3的间隙G(是配线基板2和半导体芯片3之间，在垂直俯视表面2a的俯视中与半导体芯片3重合的区域)，不存在抗焊剂膜6。
在垂直俯视表面2a的俯视中，半导体芯片3的外周和抗焊剂膜6的开口6a的缘部的间隔D，在0.1mm以上。
在配线基板2和半导体芯片3的间隙G以及其周边，设置有下部薄膜层7。下部薄膜层7以完全埋住抗焊剂膜6的开口6a的方式形成，利用下部薄膜层7，对间隙G进行密封，并且保护功能面3a、连接部件5以及表面2a的从开口6a露出的露出部。
在配线基板2的端部，形成有通过没有图示的配线而与连接部件5电连接的端面电极8。端面电极8从配线基板2的表面2a经过端面，而形成到表面2a的相反侧的外部连接面2b。该半导体装置1在端面电极8能够达成与其他配线基板(实际安装基板)的电连接。
图2A至图2D是用于说明图1所示的半导体装置1的制造方法的图解的剖面图。半导体装置1是这样得到的，在使半导体芯片3的功能面3a相面对于配线基板2的表面2a而接合之后，在抗焊剂膜6的开口6a内注入下部薄膜材7P，使该下部薄膜材7P硬化而形成下部薄膜层7。
具体地说，首先，准备制作了多个配线基板2的基板15。
接着，在该基板15的表面15a(与配线基板2的表面2a相对应的面)的整个面上，在涂敷(例如，通过旋转涂胶)或印刷了液状且具有感光性的抗焊剂膜6之后，通过曝光以及显影，形成具有比半导体芯片3大的尺寸的开口6a。
接着，准备与功能元件4的电极连接的具有突起电极(隆起焊盘)18的半导体芯片3。突起电极18包括焊锡材料。
接着，基板15以表面15a朝上的方式被保持在大致水平的姿势。然后，利用在内部具有加热器而能够加热的焊头(bonding tool)19，吸附并保持半导体芯片3的功能面3a的相反侧的面.半导体芯片3的功能面3a朝向下方而面对于基板15的表面15a.该状态如图2A所示.
接着，对半导体芯片3的突起电极18进行对位，以使其抵接于基板15的连接焊盘16，之后，焊头19下降，将半导体芯片3接合于基板15。此时，通过焊头19加热半导体芯片3，利用该热来熔融突起电极18的焊锡材料，接合突起电极18和连接焊盘16。由此，形成机械地接合基板15和半导体芯片3的连接部件5。通过连接部件5，对在基板15的表面15a形成的配线和半导体芯片3的功能元件4进行电连接。
接着，在抗焊剂膜6的开口6a的周缘部上方配置分配器10，从该分配器10向开口6a内注入下部薄膜材7P(参考图2B)。
下部薄膜材7P，根据毛细管现象，进入到基板15和半导体芯片3的间隙G，在该间隙G内沿着表面2a扩散开(参考图2C。下部薄膜材7P扩散的方向如图2C的箭头A所示。)然后，从分配器10喷出适当量的下部薄膜材7P，若间隙G以及抗焊剂膜6的开口6a的内部被下部薄膜材7P埋住，则停止喷出下部薄膜材7P。之后，进行用于使下部薄膜材7P硬化的处理，在开口6a内形成下部薄膜层7。
之后，将基板15切为配线基板2的单片(切断位置如图2A的符号C所示)，在配线基板2的端部形成端面电极8，得到如图1所示的半导体装置1。
如上所述，抗焊剂膜6的开口6a，在垂直俯视表面15a的俯视中，形成为其中完全包含半导体芯片3。由此，能够防止在基板15和半导体芯片3的间隙G产生因抗焊剂膜6的开口6a引起的阶梯差，并且能够防止该开口6a周缘部的上方的空间被半导体芯片3限制。
因此，在将液状的下部薄膜材7P填充到基板15和半导体芯片3的间隙G时，能够防止因空气进入下部薄膜材7P而引起的孔隙的形成。其结果是，能够提高得到的该半导体装置1的可靠性。
由于下部薄膜层7不含有孔隙，所以即使将该半导体装置1，例如通过回流接合于其他的配线基板，也不会因孔隙而产生裂缝。
图3是本发明的第二实施方式的半导体装置的图解的剖面图。在图3中，对于与图1所示的各部相对应的部分标注与图1相同的参考符号。
该半导体装置21包括：配线基板22、和使功能面3a相面对于该配线基板22的表面22a而连接的半导体芯片3。
在配线基板22的表面22a上形成有抗焊剂膜6。在抗焊剂膜6上，在垂直俯视表面22a的俯视中，设置有尺寸比半导体芯片3大的开口6a，即，该开口6a被形成为完全将半导体芯片3包含在其内部。
在配线基板22中，在表面22a和相反侧的外部连接面22b上设置有金属球23。金属球23在配线基板22的内部以及/或者表面被再配线，而与表面22a侧的连接部件5电连接。该半导体装置21经由金属球23而能够与其他的配线基板(实际安装基板)相接合。
在制造该半导体装置21时，也可以使用紧密地形成了与多个配线基板22相当的区域的基板，来代替基板15，实施与上述同样的制造方法(参考图2A至图2D)。金属球23可以在将基板切割成配线基板22的单片之前，与该基板接合，也可以在切割成配线基板22的单片之后，与该配线基板22接合。
本发明的实施方式的说明如上所述，但本发明也能够以其他的方式来实施。例如，可以在配线基板2、22上倒装片连接两个以上的半导体芯片3。此时，在抗焊剂膜6上，在垂直俯视表面2a、22a的俯视中，可以形成完全包含各半导体芯片3的一个或两个以上的开口6a。
对于本发明的实施方式进行了详细的说明，但是这些只不过是为了使本发明的技术内容明确而采用的具体的例子，并不应解释为本发明只限于这些具体的例子，本发明的精神以及范围只由附加的权利要求来限定。
本申请基于在2004年9月28日向日本专利局提出的特愿2004-282017，并根据条约主张优先权，本申请的全部说明是对其进行引用而在此加入的。

Claims (2)

1.一种半导体装置，其中，
所述半导体装置包括：
固体装置；
两个以上的半导体芯片，其具有形成了功能元件的功能面，使该功能面相面对于上述固体装置的表面，在与上述固体装置的表面之间保持规定的间隔而分别被倒装片连接；
绝缘膜，其设置于上述固体装置的与上述半导体芯片的相对面，并具有开口，该开口在垂直俯视该相对面的俯视中，形成为比上述半导体芯片大的尺寸，并且所述绝缘膜形成有一个上述开口，在垂直俯视上述相对面的俯视中上述开口完全包含两个以上的上述半导体芯片；以及
密封层，其对上述固体装置和上述半导体芯片之间进行密封；
上述固体装置和上述半导体芯片由柱状的连接部件连接，
上述连接部件是通过接合在上述固定装置上设置的连接焊盘和在上述半导体芯片上设置的突起电极而形成的，
上述连接焊盘和上述突起电极具有相同宽度，
上述密封层被设置成完全埋住上述开口。
2.根据权利要求1所述的半导体装置，其中，
在垂直俯视上述固体装置的与上述半导体芯片的相对面的俯视中，上述半导体芯片的外周和上述绝缘膜的上述开口的缘部之间的间隔是0.1mm以上。
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