CN1647283A - 半导体设备 - Google Patents

半导体设备 Download PDF

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CN1647283A
CN1647283A CN03808738.3A CN03808738A CN1647283A CN 1647283 A CN1647283 A CN 1647283A CN 03808738 A CN03808738 A CN 03808738A CN 1647283 A CN1647283 A CN 1647283A
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semiconductor layer
effect transistor
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皮埃尔·克里斯托夫·法赞
塞尔格·奥霍宁
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Innovative Silicon ISi SA
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Abstract

公开了一种半导体设备，例如DRAM存储器设备。半导体材料的基底(12)被提供有形式为盒状区域(38)的能带调整装置，且该基底由一绝缘层(14)覆盖。半导体层(16)其中形成有源区(18)和漏区(20)，用以限定各场效应晶体管的体(22)。盒状区域(38)的掺杂浓度高于相邻的体(22)，但低于对应的源区(18)和漏区(20)，且其调整体(22)的价带和/或导带，以提高可存储于体(22)内的电荷的数量。

Description

半导体设备
技术领域
本发明涉及一种半导体设备，具体地但并非排他地涉及例如半导体存储器的半导体存储设备，以及涉及用于制造此设备的基底。
背景技术
国际专利号为PCT/EP02/06495的文献披露了一DRAM设备(动态随机存储器)，其包含一存储单元矩阵，每个单元由一场效应晶体管构成。通过在每个晶体管的栅极和漏极之间，以及源极和漏极之间施加合适的电压脉冲，就能在晶体管的体内产生并存储电荷。电荷的有无分别代表二进制数据位的“1”和“0”状态。采用SOI(硅绝缘)型场效应晶体管的存储器设备在“SOI technology：materials to VLSI”，第二版，Kluwer，波士顿，1997中有详细介绍。
用于这种设备类型的晶体管为为PD-SOI(部分耗尽SOI)晶体管，它形成在一硅层上，而所述硅层形成在一绝缘层上，每个晶体管的源极、体和漏极形成在同一层，穿过该硅层的整个厚度。然后，在该硅层上覆盖一电介质膜，而在该电介质膜上形成每个晶体管的栅极。
为了使电荷存储于这类晶体管的体内，晶体管的体在其中央部分必须有足够厚的硅层，以提供具有非耗尽区域的硅，所述非耗尽区域称为中性区，电荷就被存储在这一区域内或附近。因此，这种晶体管叫做部分耗尽晶体管。
FD-SOI(完全耗尽SOI)晶体管已经被大家所熟知，其中，与部分耗尽SOI晶体管相比，其源、漏区域的硅层厚度都更薄，而且/或者杂质浓度也更低。结果，这种设备无中性区域，这就意味着在此种晶体管中不可能存储电荷。然而，FD-SOI晶体管与PD-SOI晶体管相比，也有一系列优点，比如：极好的短沟道特性，非常快的开关频率。而这些都是由于硅层厚度较薄所致。
从图1和图2中可以看出，体(bulk)晶体管与SOI晶体管的比较。根据图1a和图2a，由基底10构成一SOI晶体管，而基底10包含一硅基底层12，一氧化硅或蓝宝石材料的绝缘层14和硅层16；在采用腔体技术的晶体管的情况下，如图1b和图2b所示，基底10只包含一硅基底层12。
参见图2a和图2b，其中，相同的部分由相同的附图标记示出，包含若干场效应晶体管(在图2a和图2b中各仅示出一个)的集成电路通过连续光刻操作形成在基底10上，在所述光刻操作中，层被部分刻蚀、掺杂，或者又沉积新层。在图2a中示意的场效应晶体管有一源极18和一漏极20，形成于层16内，一体22被限定在源极18和漏极20之间，源极18和漏极20延伸穿过层16的整个厚度。如本领域的技术人员所知，源极18、漏极20和体22都通过掺杂硅层16来形成。体22被一电介质膜24所覆盖，电介质膜24与源极18和漏极20部分重叠，其上提供栅极26。在源极18和漏极20周围的层26被除区，取而代之的是氧化硅材质的绝缘框架28。当在栅极26上施加一合适的电压时，在体22的表面与电介质膜24的界面处形成一连接源极18和漏极20的导电沟道30。
在图2b中，源区18和漏区20形成在基底层12内，以限定位于源极和漏极之间的体22，电介质膜24覆盖体22，且与源极18和漏极20部分重叠。
现在看图3a和图3b，图3b示出电势随图3a所示腔体结构晶体管的区域B的厚度Z(从与电介质膜24的界面处算起)变化的示意图。图3b中的曲线Bc、Bv和Nf分别代表体22内部的价带电势、导带电势、和费米能级。同样，图4a和图4b分别示意了PD-SOI晶体管的相应示图，图5a和图5b分别示出了FD-SOI晶体管的相应示图。
从图3b到图5b可以看到，在每种晶体管的情况下，在体22与电介质膜24的界面处，价带Bv和导带Bc都有最小值。然而，图3b也示意了电势Bv和Bc在第一区域Zd变化，但趋向一极限值，超过该极限值即开始称为中性区的第二区域Zn。该第二区域Zn延伸穿过基底层12的整个厚度。当对栅极26施加一合适的电压时，在体22与电介质膜24的界面处形成一导电沟道30。
现在看图4b，可以看出，PD-SOI晶体管有两个耗尽区Zd1和Zd2，分别邻近电介质膜24和绝缘层14，其间为中性区Zn。本领域的技术人员可知，耗尽区Zd2的形状和宽度取决于后栅级电势和前栅级电势的相对值。有可能在体22内存储电荷，具体地，在两个耗尽区Zd1和Zd2之间的中性区Zn内和附近存储电荷。此晶体管的一个可能的应用是单个存储单元，其能够根据中性区Zn之内和附近电荷的有无来代表两个逻辑状态，用于形成如DRAM的半导体存储器。
现在看图5b，可以看出，在FD-SOI晶体管的情况下，在体22的整个厚度范围内导带Bc和价带Bv的电势持续变化。换句话说，体22具有一延伸穿过其整个厚度的耗尽区Zd，结果就不存在中性区。从而也就不可能在体22中存储电荷，这种类型的晶体管因此不能被用来作为存储元件使用。当然，这种类型的晶体管也具有一些优点，具体来说，其具有极好的短沟道特性，非常快的开关频率，这些都是由于硅层16的厚度较薄所致。
本发明的优选实施例正是为了综合部分耗尽SOI晶体管与完全耗尽SOI晶体管的有优势的特点。
发明内容
根据对本发明的一个方面，提供一半导体设备，包括：
半导体材料的基底；
提供于所述基底上的第一电绝缘层；
提供于所述第一电绝缘层上的第一半导体层，其适于在其中形成至少一个场效应管的相应的源和漏区，以限定所述源区和漏区之间的一个相应的体区；和
能带调整装置，用于调整在至少一个所述场效应晶体管的所述体区内的价带和/或导带的能级来增加电荷数量，所述电荷可至少被暂时存储在所述体区内。
通过提供用于调整在至少一个所述场效应晶体管的所述体区内的价带和/或导带的能级来增加电荷数量的能带调整装置，其中，所述电荷可至少被暂时存储在所述体区内，本发明提供了惊人的优势，即可将第一半导体层制作为远比在现有技术中的薄，这意味着FD-SOI晶体管的第一半导体层的薄层(比如：较快的设备性能)可以和PD-SOI晶体管的电荷存储能力结合起来的优势。例如，本发明可用于构建一特别紧凑的半导体存储设备，其中，数据的各个位可以由存储在各晶体管体内的电荷的存在与否来表示，同时还利用高性能的晶体管。
能带调整装置还适于创建一区，其中，可至少暂时将电荷存储在在至少一个所述场效应晶体管的体区内。
在一优选实施例中，该能带调整装置适于沿基本与所述第一绝缘层垂直的方向增加一区域的长度，在所述区域内，在至少一个所述场效应晶体管的体区内的价带和导带的能量是基本恒定的。
所述能带调整装置可适于将一相应的电压变化施加于至少一个所述场效应晶体管的相应的源极、漏极和至少一个栅极。
通过向至少一个所述场效应晶体管的源极、漏极和至少一个栅极施加电压漂移，使得能够实现本发明的电荷存储能力，而不用显著地改变基底的电势。这例如通过提供可将电荷存储存储器设备与逻辑设备置于相同的基底上的优势，大大改善自该设备形成的集成设备的多样性，后者在向基底施加大的电压漂移时不能其作用，且电压漂移仅施加于基底。还提供可以最少的制造步骤制造该设备的优势。
在一优选实施例中，所述能带调整装置包括至少一个所述场效应晶体管的体区的一掺杂部分，其中，所述掺杂部分的掺杂浓度比相应所述体区的相邻部分的高。
所述掺杂部分可邻近所述第一绝缘层设置。
所述能带调整装置在使用中可包含至少一个第二半导体层，其被邻近至少一个所述场效应晶体管的源和漏区设置，且其位于所述第一绝缘层的一侧，远离所述第一半导体层。
至少一个所述第二半导体层可至少部分覆盖所述基底。
至少一个所述第二半导体层形成部分所述基底。
所述设备进一步包括接触装置，用以使该或每一个所述第二半导体层与一相应的电输入信号源相连。
该设备进一步包括形成于所述第一半导体层上的至少一个所述场效应晶体管的相应的漏和源区，以限定所述源和漏区之间的相应的体区。
所述设备还包含相邻所述场效应晶体管的相应的所述体区设置的至少一个所述场效应晶体管的至少一个相应的栅极。
所述设备进一步包含在所述第一半导体层上形成的第二绝缘层，且至少一个所述场效应晶体管的至少一个相应的栅区设置在所述第二绝缘层上。
在一优选实施例中，所述设备为半导体存储器。
根据本发明的另一方面，提供一种控制半导体设备的方法，包括：半导体材料的基底，提供于所述基底上的第一电绝缘层，以及提供于所述第一绝缘层上的第一半导体层，且其中形成至少一个场效应管的源和漏区，以限定在所述源和漏区之间的一相应的体区；所述方法包括调整在至少一个所述场效应晶体管的一相应体区内的价带和/或导带以提高电荷的数量，所述电荷可至少被暂时存储在所述体区内。
所述调整所述价带和/或导带的步骤包括将一相应的电压改变施加至所述场效应晶体管的相应的源极、漏极和至少一个栅极。
所述调整价带和/或导带的步骤包含将一相应的电压施加至至少一个第二半导体层，所述至少一个半导体层位于所述第一绝缘层的一侧，远离所述第一半导体层。
根据本发明的再一方面，提供一种半导体晶片，包括：
掺杂的半导体材料的基底；
提供于所述基底上的第一电绝缘层；
提供于所述第一电绝缘层上的第一半导体层；和
提供于所述第一电绝缘层的一侧上的至少一个第二掺杂的半导体材料层，远离所述的第一半导体层，其中，该或每个所述第二半导体层的杂质浓度远远高于与其邻近的所述基底的相应区域。
附图说明
以下参考附图，通过例子对本发明的优选实施例进行描述，其中，所述例子并非是限制性的：
图1a示出现有的应用SOI技术制造集成电路的基底的截面示意图；
图1b示出已知的应用腔体技术制造集成电路的基底的截面示意图；
图2a是已知的自图1a所示基底形成的一晶体管的截面图；
图2b是已知的自图1b所示基底形成的一晶体管的截面图；
图3a为图2b的晶体管的示意性的横截面图，示出其中考虑电势变化的区域；
图3b示出在图3a所示晶体管的区域B中的电势变化图；
图4a为应用PD-SOI技术的图2a所示晶体管的截面图；
图4b为示出在图4a所示晶体管的B区域的电势变化图；
图5a是应用FD-SOI技术的图2a所示晶体管的截面图；
图5b为示出图5a所示的晶体管的B区域中的电势变化图；
图6是本设备第一实施例的半导体设备的截面图；
图7a是本设备第二实施例的半导体设备的截面图，其能带未被调整；
图7b是图7a能带被调整的本设备的截面图；以及
图8是本发明第三实施例的半导体设备的截面图；
具体实施方式
参考图6，其中示出体现本发明的半导体设备，图6中所示设备与图5a中设备相同的部分由相同的附图标记表示。形式为硅层16的第一半导体层内形成一NMOS晶体管，并且该半导体层上覆盖一绝缘层32，其被穿孔形成窗，所述窗被填充导电材料从而形成接触区34、35，它们分别与源区18和漏区20相连。接触区34、35也分别与导线36、37相连。
图6所示的NMOS晶体管具有一n型硅层的基底层12，其具有形式为p型硅的盒状区域38的第二半导体层，该层的掺杂浓度高于体22的杂质浓度，但低于相应的源极18和漏极20的杂质浓度。通过穿过绝缘层14、框架28和绝缘层32的接触区41，盒状区域38与导线40相连。可采用0.13um技术对这类晶体管进行布局，使之具有一个400nm厚的绝缘层14和30nm厚的硅层16。应注意，单个接触区41可用于该类型的多个晶体管，且典型地，可用于成百上千个晶体管。
通过对盒状区域38施加负电压，通常在用于厚度为400nm的层14的-20V的区域，由于栅极26和盒状区域38之间的电势差，可能在体22中形成一中性区，与图4所示的PD-SOI晶体管的中性区类似。这样，就可能产生、存储和消耗该中性区内的电荷，如果减小层14的厚度，则创建中性区所需的电压也降低。由此，可使用此种晶体管将代表二进制数据的电荷，存储在例如一半导体DRAM设备或嵌入式存储设备中。在国际专利申请号为PCT/GB02/06495的文献中描述了用于产生或消除此种晶体管中的电荷的处理。在不具有盒状区38的设备的区域中，可能形成传统的PD-SOI晶体管或FD-SOI晶体管。
参考图7a和图7b，其中，与图6的实施例中相同的部件使用类似的附图标记表示，其作为一种选择方案，用以提供盒状区38，通过使体22中的价带和/或导带失真，来增加可存储在体22中的电荷的数量，有可能在栅极26和与体22相邻的基底层12之间有足够大的电势差，以在体12内提供一电荷存储中性区。这可以通过，例如向晶体管的栅极26、源极18和漏极20的每一个施加一相对高的电压偏移(例如，在20V范围内)来实现。
具体地，如图7a和图7b所示，图7a示意的完全耗尽(FD)SOI晶体管，其被偏置的方式使其表现为一标准的完全耗尽设备。在图7a中，对栅极26施加2V的电压、对漏极20施加2V的电压，而源极18保持在0V，使晶体管导通。另一方面，在图7b中示出在电力上表现为部分耗尽型(PD)设备的相同的FD-SOI晶体管。在所有的设备节点上施加20V电压使所述能带失真，造成在晶体管的体22内产生中性区23，通常，在绝缘层14的厚度是400nm时，施加20V电压。当绝缘层14的厚度更薄的情况下，所加的电压相应地成比例地减小。
图7b的布局使得能够在不需要很大程度上改变基底层12的电压的情况下，形成电荷存储中性区，且所需的制造步骤少于图6所示的设备所需的制造步骤。而且，还能提供的优点是，可将存储设备和逻辑设备做在同一基底上，由于尽管如果向基底施加大的移位电压移位(voltage shift)，存储设备一般能正常工作，然而，对如处理器的逻辑设备则通常并非如此。因此，对存储设备而不对逻辑设备施加电压移位。
参见图8，其中，与图6和图7所示实施例相同的部分由相同的附图标记示出，盒状区域38由与绝缘层14、源极18和漏极20邻近的体22的下部的高掺杂区域替代。这一层所其的效果与图6的盒状区域38的效果类似。具体地，通过更重地掺杂体22的区域25来调整该晶体管的体的能带。这在体内产生了掺杂梯度。因此，体22具有一含有底掺杂内容的上部21，和含有高掺杂内容的下部25。这通过适当的离子植入，外延或扩散来实现。体下部25较高的掺杂标准使得所述能带失真，从而产生一所述能带平坦的区域，由此产生一中性区23。
由此可见，本发明能够形成这样的晶体管，其体可在远窄于现有技术的硅层中存储代表二进制数据位的电荷，且具有能够获得FD-SOI晶体管的改进的设备性能的优点。
虽然参考示出的实施例描述了本发明，但此描述不认为是限制性的。在不脱离如权利要求所限定的本发明的范围的情况下，可对本发明进行多种变化和改进。而且本领域的技术人员可知，当中性区厚度不足以达到那些电路的所期望的目的时，上述原理可适用于部分耗尽SOI型电路，且与应用于NMOS晶体管中一样，上述原理同样可应用于PMOS晶体管，在这种情况下，所施加的电压的极性与上述实施例中提出的极性相反。

Claims (18)

1.一种半导体设备，包括：
半导体材料的基底；
提供于所述基底上的第一电绝缘层；
提供于所述第一电绝缘层上的第一半导体层，其适于在其中形成至少一个场效应管的相应的源和漏区，以限定所述源区和漏区之间的一个相应的体区；和
能带调整装置，用于调整在至少一个所述场效应晶体管的所述体区内的价带和/或导带以增加电荷数量，所述电荷可至少被暂时存储在所述体区内。
2.根据权利要求1所述的设备，其中，所述能带调整装置适于创建一区，其中，可至少暂时将电荷存储在至少一个所述场效应晶体管的体区内。
3.根据权利要求1或2所述的设备，其中，所述能带调整装置适于沿基本与所述第一绝缘层垂直的方向增加一区域的长度，在所述区域内，在至少一个所述场效应晶体管的体区内的价带和导带的能量基本是恒定的。
4.根据上述权利要求中任何一项所述的设备，其中，所述能带调整装置适于将一相应的电压变化施加于至少一个所述场效应晶体管的相应的源极、漏极和至少一个栅极。
5.根据上述权利要求中任何一项所述的设备，其中，所述能带调整装置包括至少一个所述场效应晶体管的体区的一掺杂部分，其中，所述掺杂部分的掺杂浓度比相应所述体区的相邻部分的高。
6.根据权利要求5所述的设备，其中，所述掺杂部分邻近所述第一绝缘层设置。
7.根据上述权利要求中任何一项所述的设备，其中，所述能带调整装置包含至少一个第二半导体层，其被邻近至少一个所述场效应晶体管的源和漏区设置，且其位于所述第一绝缘层的一侧，远离所述第一半导体层。
8.根据权利要求7所述的设备，其中，至少一个所述第二半导体层至少部分覆盖所述基底。
9.根据权利要求7或8所述的设备，其中，至少一个第二半导体层形成部分所述基底。
10.根据权利要求7到9中任何一项所述的设备，进一步包括接触装置，用以使该或每一个所述第二半导体层与一相应的电输入信号源相连。
11.根据上述权利要求中任何一项所述的设备，进一步包括形成于所述第一半导体层上的至少一个所述场效应晶体管的相应的漏和源区，以限定所述源和漏区之间的相应的体区。
12.根据权利要求11所述的设备，还包含邻近所述场效应晶体管的相应的所述体区设置的至少一个所述场效应晶体管的至少一个相应的栅极。
13.根据权利要求12所述的设备，进一步包含在所述第一半导体层上形成的第二绝缘层，且至少一个所述场效应晶体管的至少一个相应的栅区设置在所述第二绝缘层上。
14.根据上述权利要求中任何一项所述的设备，其中，所述设备为半导体存储设备。
15.一种控制半导体设备的方法，包括：
半导体材料的基底，提供于所述基底上的第一电绝缘层，以及提供于所述第一绝缘层上的第一半导体层，且其中形成至少一个场效应管的源和漏区，以限定在所述源和漏区之间的一相应的体区，所述方法包括调整在至少一个所述场效应晶体管的一相应体区内的价带和/或导带以提高电荷的数量，所述电荷可至少被暂时存储在所述体区内。
16.根据权利要求15所述的方法，其中，调整所述价带和/或导带的步骤包括将一相应的电压改变施加至所述场效应晶体管的相应的源极、漏极和至少一个栅极。
17.根据权利要求15所述的方法，其中，所述调整价带和/或导带的步骤包含将一相应的电压施加至至少一个第二半导体层，所述至少一个第二半导体层位于所述第一绝缘层的一侧，远离所述第一半导体层。
18.一半导体晶片，包括：
掺杂的半导体材料的基底；
提供于所述基底上的第一电绝缘层；
提供于所述第一电绝缘层上的第一半导体层；和
提供于所述第一电绝缘层的一侧上的至少一个第二掺杂的半导体材料层，其远离所述第一半导体层，其中，该或每个所述第二半导体层的掺杂浓度远远高于与其邻近的所述基底的相应区域的掺杂浓度。
CN03808738.3A 2002-04-18 2003-03-17 半导体设备 Pending CN1647283A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102088028A (zh) * 2009-12-08 2011-06-08 S.O.I.Tec绝缘体上硅技术公司 具有埋置绝缘层下第二控制栅极的SeOI闪存存储单元

Families Citing this family (238)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7710771B2 (en) * 2002-11-20 2010-05-04 The Regents Of The University Of California Method and apparatus for capacitorless double-gate storage
US20040228168A1 (en) 2003-05-13 2004-11-18 Richard Ferrant Semiconductor memory device and method of operating same
US7518189B1 (en) * 2003-07-03 2009-04-14 American Semiconductor, Inc. Independently-double-gated field effect transistor
US7335934B2 (en) 2003-07-22 2008-02-26 Innovative Silicon S.A. Integrated circuit device, and method of fabricating same
JP2005116623A (ja) * 2003-10-03 2005-04-28 Nec Electronics Corp 半導体装置およびその製造方法
JP4511885B2 (ja) * 2004-07-09 2010-07-28 Ｄｏｗａエレクトロニクス株式会社 蛍光体及びｌｅｄ並びに光源
US7517741B2 (en) 2005-06-30 2009-04-14 Freescale Semiconductor, Inc. Single transistor memory cell with reduced recombination rates
US7238555B2 (en) 2005-06-30 2007-07-03 Freescale Semiconductor, Inc. Single transistor memory cell with reduced programming voltages
US7709313B2 (en) * 2005-07-19 2010-05-04 International Business Machines Corporation High performance capacitors in planar back gates CMOS
US7410856B2 (en) 2006-09-14 2008-08-12 Micron Technology, Inc. Methods of forming vertical transistors
US7608898B2 (en) 2006-10-31 2009-10-27 Freescale Semiconductor, Inc. One transistor DRAM cell structure
US7851859B2 (en) * 2006-11-01 2010-12-14 Samsung Electronics Co., Ltd. Single transistor memory device having source and drain insulating regions and method of fabricating the same
KR100801707B1 (ko) * 2006-12-13 2008-02-11 삼성전자주식회사 플로팅 바디 메모리 및 그 제조방법
US7724578B2 (en) * 2006-12-15 2010-05-25 Globalfoundries Inc. Sensing device for floating body cell memory and method thereof
US20080191788A1 (en) * 2007-02-08 2008-08-14 International Business Machines Corporation Soi mosfet device with adjustable threshold voltage
JP5019436B2 (ja) * 2007-02-22 2012-09-05 ルネサスエレクトロニクス株式会社 半導体集積回路
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US20100027355A1 (en) * 2007-07-31 2010-02-04 Dao Thuy B Planar double gate transistor storage cell
US20090078999A1 (en) * 2007-09-20 2009-03-26 Anderson Brent A Semiconductor device structures with floating body charge storage and methods for forming such semiconductor device structures.
US7948008B2 (en) 2007-10-26 2011-05-24 Micron Technology, Inc. Floating body field-effect transistors, and methods of forming floating body field-effect transistors
KR101017809B1 (ko) * 2008-03-13 2011-02-28 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
US7977172B2 (en) * 2008-12-08 2011-07-12 Advanced Micro Devices, Inc. Dynamic random access memory (DRAM) cells and methods for fabricating the same
US8148780B2 (en) 2009-03-24 2012-04-03 Micron Technology, Inc. Devices and systems relating to a memory cell having a floating body
US7929343B2 (en) * 2009-04-07 2011-04-19 Micron Technology, Inc. Methods, devices, and systems relating to memory cells having a floating body
US8362800B2 (en) 2010-10-13 2013-01-29 Monolithic 3D Inc. 3D semiconductor device including field repairable logics
US8427200B2 (en) 2009-04-14 2013-04-23 Monolithic 3D Inc. 3D semiconductor device
US8384426B2 (en) 2009-04-14 2013-02-26 Monolithic 3D Inc. Semiconductor device and structure
US9509313B2 (en) 2009-04-14 2016-11-29 Monolithic 3D Inc. 3D semiconductor device
US8373439B2 (en) 2009-04-14 2013-02-12 Monolithic 3D Inc. 3D semiconductor device
US8362482B2 (en) 2009-04-14 2013-01-29 Monolithic 3D Inc. Semiconductor device and structure
US8754533B2 (en) 2009-04-14 2014-06-17 Monolithic 3D Inc. Monolithic three-dimensional semiconductor device and structure
US9711407B2 (en) 2009-04-14 2017-07-18 Monolithic 3D Inc. Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer
US8258810B2 (en) 2010-09-30 2012-09-04 Monolithic 3D Inc. 3D semiconductor device
US8669778B1 (en) 2009-04-14 2014-03-11 Monolithic 3D Inc. Method for design and manufacturing of a 3D semiconductor device
US8405420B2 (en) 2009-04-14 2013-03-26 Monolithic 3D Inc. System comprising a semiconductor device and structure
US9577642B2 (en) 2009-04-14 2017-02-21 Monolithic 3D Inc. Method to form a 3D semiconductor device
US8058137B1 (en) 2009-04-14 2011-11-15 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8395191B2 (en) 2009-10-12 2013-03-12 Monolithic 3D Inc. Semiconductor device and structure
US8378715B2 (en) 2009-04-14 2013-02-19 Monolithic 3D Inc. Method to construct systems
US7986042B2 (en) 2009-04-14 2011-07-26 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US10157909B2 (en) 2009-10-12 2018-12-18 Monolithic 3D Inc. 3D semiconductor device and structure
US8450804B2 (en) 2011-03-06 2013-05-28 Monolithic 3D Inc. Semiconductor device and structure for heat removal
US10354995B2 (en) 2009-10-12 2019-07-16 Monolithic 3D Inc. Semiconductor memory device and structure
US12027518B1 (en) 2009-10-12 2024-07-02 Monolithic 3D Inc. 3D semiconductor devices and structures with metal layers
US9099424B1 (en) 2012-08-10 2015-08-04 Monolithic 3D Inc. Semiconductor system, device and structure with heat removal
US10366970B2 (en) 2009-10-12 2019-07-30 Monolithic 3D Inc. 3D semiconductor device and structure
US8742476B1 (en) 2012-11-27 2014-06-03 Monolithic 3D Inc. Semiconductor device and structure
US11374118B2 (en) 2009-10-12 2022-06-28 Monolithic 3D Inc. Method to form a 3D integrated circuit
US10910364B2 (en) 2009-10-12 2021-02-02 Monolitaic 3D Inc. 3D semiconductor device
US8536023B2 (en) 2010-11-22 2013-09-17 Monolithic 3D Inc. Method of manufacturing a semiconductor device and structure
US10043781B2 (en) 2009-10-12 2018-08-07 Monolithic 3D Inc. 3D semiconductor device and structure
US8581349B1 (en) 2011-05-02 2013-11-12 Monolithic 3D Inc. 3D memory semiconductor device and structure
US8148728B2 (en) 2009-10-12 2012-04-03 Monolithic 3D, Inc. Method for fabrication of a semiconductor device and structure
US8476145B2 (en) 2010-10-13 2013-07-02 Monolithic 3D Inc. Method of fabricating a semiconductor device and structure
US11984445B2 (en) 2009-10-12 2024-05-14 Monolithic 3D Inc. 3D semiconductor devices and structures with metal layers
US10388863B2 (en) 2009-10-12 2019-08-20 Monolithic 3D Inc. 3D memory device and structure
US11018133B2 (en) 2009-10-12 2021-05-25 Monolithic 3D Inc. 3D integrated circuit
US8492838B2 (en) * 2009-11-16 2013-07-23 International Business Machines Corporation Isolation structures for SOI devices with ultrathin SOI and ultrathin box
US8508289B2 (en) 2009-12-08 2013-08-13 Soitec Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer
FR2953641B1 (fr) 2009-12-08 2012-02-10 S O I Tec Silicon On Insulator Tech Circuit de transistors homogenes sur seoi avec grille de controle arriere enterree sous la couche isolante
FR2957193B1 (fr) 2010-03-03 2012-04-20 Soitec Silicon On Insulator Cellule a chemin de donnees sur substrat seoi avec grille de controle arriere enterree sous la couche isolante
FR2953636B1 (fr) * 2009-12-08 2012-02-10 Soitec Silicon On Insulator Procede de commande d'une cellule memoire dram sur seoi disposant d'une seconde grille de controle enterree sous la couche isolante
FR2955195B1 (fr) 2010-01-14 2012-03-09 Soitec Silicon On Insulator Dispositif de comparaison de donnees dans une memoire adressable par contenu sur seoi
FR2955200B1 (fr) 2010-01-14 2012-07-20 Soitec Silicon On Insulator Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree
FR2955203B1 (fr) 2010-01-14 2012-03-23 Soitec Silicon On Insulator Cellule memoire dont le canal traverse une couche dielectrique enterree
FR2955204B1 (fr) 2010-01-14 2012-07-20 Soitec Silicon On Insulator Cellule memoire dram disposant d'un injecteur bipolaire vertical
US9099526B2 (en) 2010-02-16 2015-08-04 Monolithic 3D Inc. Integrated circuit device and structure
US8298875B1 (en) 2011-03-06 2012-10-30 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8461035B1 (en) 2010-09-30 2013-06-11 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8541819B1 (en) 2010-12-09 2013-09-24 Monolithic 3D Inc. Semiconductor device and structure
US8026521B1 (en) 2010-10-11 2011-09-27 Monolithic 3D Inc. Semiconductor device and structure
US8373230B1 (en) 2010-10-13 2013-02-12 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8492886B2 (en) 2010-02-16 2013-07-23 Monolithic 3D Inc 3D integrated circuit with logic
FR2957186B1 (fr) 2010-03-08 2012-09-28 Soitec Silicon On Insulator Cellule memoire de type sram
FR2957449B1 (fr) 2010-03-11 2022-07-15 S O I Tec Silicon On Insulator Tech Micro-amplificateur de lecture pour memoire
FR2958441B1 (fr) 2010-04-02 2012-07-13 Soitec Silicon On Insulator Circuit pseudo-inverseur sur seoi
EP2375442A1 (en) 2010-04-06 2011-10-12 S.O.I.Tec Silicon on Insulator Technologies Method for manufacturing a semiconductor substrate
EP2381470B1 (en) 2010-04-22 2012-08-22 Soitec Semiconductor device comprising a field-effect transistor in a silicon-on-insulator structure
US9219005B2 (en) 2011-06-28 2015-12-22 Monolithic 3D Inc. Semiconductor system and device
US10217667B2 (en) 2011-06-28 2019-02-26 Monolithic 3D Inc. 3D semiconductor device, fabrication method and system
US8901613B2 (en) 2011-03-06 2014-12-02 Monolithic 3D Inc. Semiconductor device and structure for heat removal
US9953925B2 (en) 2011-06-28 2018-04-24 Monolithic 3D Inc. Semiconductor system and device
US8642416B2 (en) 2010-07-30 2014-02-04 Monolithic 3D Inc. Method of forming three dimensional integrated circuit devices using layer transfer technique
US11482440B2 (en) 2010-12-16 2022-10-25 Monolithic 3D Inc. 3D semiconductor device and structure with a built-in test circuit for repairing faulty circuits
US8273610B2 (en) 2010-11-18 2012-09-25 Monolithic 3D Inc. Method of constructing a semiconductor device and structure
US8163581B1 (en) 2010-10-13 2012-04-24 Monolith IC 3D Semiconductor and optoelectronic devices
US10497713B2 (en) 2010-11-18 2019-12-03 Monolithic 3D Inc. 3D semiconductor memory device and structure
US10896931B1 (en) 2010-10-11 2021-01-19 Monolithic 3D Inc. 3D semiconductor device and structure
US11469271B2 (en) 2010-10-11 2022-10-11 Monolithic 3D Inc. Method to produce 3D semiconductor devices and structures with memory
US11018191B1 (en) 2010-10-11 2021-05-25 Monolithic 3D Inc. 3D semiconductor device and structure
US11257867B1 (en) 2010-10-11 2022-02-22 Monolithic 3D Inc. 3D semiconductor device and structure with oxide bonds
US11227897B2 (en) 2010-10-11 2022-01-18 Monolithic 3D Inc. Method for producing a 3D semiconductor memory device and structure
US8114757B1 (en) 2010-10-11 2012-02-14 Monolithic 3D Inc. Semiconductor device and structure
US11600667B1 (en) 2010-10-11 2023-03-07 Monolithic 3D Inc. Method to produce 3D semiconductor devices and structures with memory
US10290682B2 (en) 2010-10-11 2019-05-14 Monolithic 3D Inc. 3D IC semiconductor device and structure with stacked memory
US11315980B1 (en) 2010-10-11 2022-04-26 Monolithic 3D Inc. 3D semiconductor device and structure with transistors
US11158674B2 (en) 2010-10-11 2021-10-26 Monolithic 3D Inc. Method to produce a 3D semiconductor device and structure
US11024673B1 (en) 2010-10-11 2021-06-01 Monolithic 3D Inc. 3D semiconductor device and structure
US11869915B2 (en) 2010-10-13 2024-01-09 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors and wafer bonding
US11437368B2 (en) 2010-10-13 2022-09-06 Monolithic 3D Inc. Multilevel semiconductor device and structure with oxide bonding
US11043523B1 (en) 2010-10-13 2021-06-22 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors
US8379458B1 (en) 2010-10-13 2013-02-19 Monolithic 3D Inc. Semiconductor device and structure
US11327227B2 (en) 2010-10-13 2022-05-10 Monolithic 3D Inc. Multilevel semiconductor device and structure with electromagnetic modulators
US11855114B2 (en) 2010-10-13 2023-12-26 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors and wafer bonding
US10998374B1 (en) 2010-10-13 2021-05-04 Monolithic 3D Inc. Multilevel semiconductor device and structure
US10833108B2 (en) 2010-10-13 2020-11-10 Monolithic 3D Inc. 3D microdisplay device and structure
US11605663B2 (en) 2010-10-13 2023-03-14 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors and wafer bonding
US11929372B2 (en) 2010-10-13 2024-03-12 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors and wafer bonding
US11694922B2 (en) 2010-10-13 2023-07-04 Monolithic 3D Inc. Multilevel semiconductor device and structure with oxide bonding
US9197804B1 (en) 2011-10-14 2015-11-24 Monolithic 3D Inc. Semiconductor and optoelectronic devices
US10943934B2 (en) 2010-10-13 2021-03-09 Monolithic 3D Inc. Multilevel semiconductor device and structure
US11063071B1 (en) 2010-10-13 2021-07-13 Monolithic 3D Inc. Multilevel semiconductor device and structure with waveguides
US11163112B2 (en) 2010-10-13 2021-11-02 Monolithic 3D Inc. Multilevel semiconductor device and structure with electromagnetic modulators
US8283215B2 (en) 2010-10-13 2012-10-09 Monolithic 3D Inc. Semiconductor and optoelectronic devices
US10679977B2 (en) 2010-10-13 2020-06-09 Monolithic 3D Inc. 3D microdisplay device and structure
US11855100B2 (en) 2010-10-13 2023-12-26 Monolithic 3D Inc. Multilevel semiconductor device and structure with oxide bonding
US11133344B2 (en) 2010-10-13 2021-09-28 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors
US10978501B1 (en) 2010-10-13 2021-04-13 Monolithic 3D Inc. Multilevel semiconductor device and structure with waveguides
US11164898B2 (en) 2010-10-13 2021-11-02 Monolithic 3D Inc. Multilevel semiconductor device and structure
US11404466B2 (en) 2010-10-13 2022-08-02 Monolithic 3D Inc. Multilevel semiconductor device and structure with image sensors
US11984438B2 (en) 2010-10-13 2024-05-14 Monolithic 3D Inc. Multilevel semiconductor device and structure with oxide bonding
US11094576B1 (en) 2010-11-18 2021-08-17 Monolithic 3D Inc. Methods for producing a 3D semiconductor memory device and structure
US11121021B2 (en) 2010-11-18 2021-09-14 Monolithic 3D Inc. 3D semiconductor device and structure
US11862503B2 (en) 2010-11-18 2024-01-02 Monolithic 3D Inc. Method for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
US11569117B2 (en) 2010-11-18 2023-01-31 Monolithic 3D Inc. 3D semiconductor device and structure with single-crystal layers
US11164770B1 (en) 2010-11-18 2021-11-02 Monolithic 3D Inc. Method for producing a 3D semiconductor memory device and structure
US11482439B2 (en) 2010-11-18 2022-10-25 Monolithic 3D Inc. Methods for producing a 3D semiconductor memory device comprising charge trap junction-less transistors
US11508605B2 (en) 2010-11-18 2022-11-22 Monolithic 3D Inc. 3D semiconductor memory device and structure
US12033884B2 (en) 2010-11-18 2024-07-09 Monolithic 3D Inc. Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
US11610802B2 (en) 2010-11-18 2023-03-21 Monolithic 3D Inc. Method for producing a 3D semiconductor device and structure with single crystal transistors and metal gate electrodes
US11854857B1 (en) 2010-11-18 2023-12-26 Monolithic 3D Inc. Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
US11482438B2 (en) 2010-11-18 2022-10-25 Monolithic 3D Inc. Methods for producing a 3D semiconductor memory device and structure
US11923230B1 (en) 2010-11-18 2024-03-05 Monolithic 3D Inc. 3D semiconductor device and structure with bonding
US11495484B2 (en) 2010-11-18 2022-11-08 Monolithic 3D Inc. 3D semiconductor devices and structures with at least two single-crystal layers
US11735462B2 (en) 2010-11-18 2023-08-22 Monolithic 3D Inc. 3D semiconductor device and structure with single-crystal layers
US11018042B1 (en) 2010-11-18 2021-05-25 Monolithic 3D Inc. 3D semiconductor memory device and structure
US11784082B2 (en) 2010-11-18 2023-10-10 Monolithic 3D Inc. 3D semiconductor device and structure with bonding
US11901210B2 (en) 2010-11-18 2024-02-13 Monolithic 3D Inc. 3D semiconductor device and structure with memory
US11443971B2 (en) 2010-11-18 2022-09-13 Monolithic 3D Inc. 3D semiconductor device and structure with memory
US11211279B2 (en) 2010-11-18 2021-12-28 Monolithic 3D Inc. Method for processing a 3D integrated circuit and structure
US11355380B2 (en) 2010-11-18 2022-06-07 Monolithic 3D Inc. Methods for producing 3D semiconductor memory device and structure utilizing alignment marks
US11615977B2 (en) 2010-11-18 2023-03-28 Monolithic 3D Inc. 3D semiconductor memory device and structure
US11031275B2 (en) 2010-11-18 2021-06-08 Monolithic 3D Inc. 3D semiconductor device and structure with memory
US11521888B2 (en) 2010-11-18 2022-12-06 Monolithic 3D Inc. 3D semiconductor device and structure with high-k metal gate transistors
US11107721B2 (en) 2010-11-18 2021-08-31 Monolithic 3D Inc. 3D semiconductor device and structure with NAND logic
US11804396B2 (en) 2010-11-18 2023-10-31 Monolithic 3D Inc. Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
US11355381B2 (en) 2010-11-18 2022-06-07 Monolithic 3D Inc. 3D semiconductor memory device and structure
US11004719B1 (en) 2010-11-18 2021-05-11 Monolithic 3D Inc. Methods for producing a 3D semiconductor memory device and structure
US8975670B2 (en) 2011-03-06 2015-03-10 Monolithic 3D Inc. Semiconductor device and structure for heat removal
US10388568B2 (en) 2011-06-28 2019-08-20 Monolithic 3D Inc. 3D semiconductor device and system
US8687399B2 (en) 2011-10-02 2014-04-01 Monolithic 3D Inc. Semiconductor device and structure
US9029173B2 (en) 2011-10-18 2015-05-12 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US9000557B2 (en) 2012-03-17 2015-04-07 Zvi Or-Bach Semiconductor device and structure
US11088050B2 (en) 2012-04-09 2021-08-10 Monolithic 3D Inc. 3D semiconductor device with isolation layers
US11881443B2 (en) 2012-04-09 2024-01-23 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and a connective path
US11616004B1 (en) 2012-04-09 2023-03-28 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and a connective path
US10600888B2 (en) 2012-04-09 2020-03-24 Monolithic 3D Inc. 3D semiconductor device
US11694944B1 (en) 2012-04-09 2023-07-04 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and a connective path
US11476181B1 (en) 2012-04-09 2022-10-18 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US8557632B1 (en) 2012-04-09 2013-10-15 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US11164811B2 (en) 2012-04-09 2021-11-02 Monolithic 3D Inc. 3D semiconductor device with isolation layers and oxide-to-oxide bonding
US11735501B1 (en) 2012-04-09 2023-08-22 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and a connective path
US11410912B2 (en) 2012-04-09 2022-08-09 Monolithic 3D Inc. 3D semiconductor device with vias and isolation layers
US11594473B2 (en) 2012-04-09 2023-02-28 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and a connective path
US8574929B1 (en) 2012-11-16 2013-11-05 Monolithic 3D Inc. Method to form a 3D semiconductor device and structure
US8686428B1 (en) 2012-11-16 2014-04-01 Monolithic 3D Inc. Semiconductor device and structure
US11961827B1 (en) 2012-12-22 2024-04-16 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US8674470B1 (en) 2012-12-22 2014-03-18 Monolithic 3D Inc. Semiconductor device and structure
US11967583B2 (en) 2012-12-22 2024-04-23 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US11784169B2 (en) 2012-12-22 2023-10-10 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US11309292B2 (en) 2012-12-22 2022-04-19 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US11063024B1 (en) 2012-12-22 2021-07-13 Monlithic 3D Inc. Method to form a 3D semiconductor device and structure
US11018116B2 (en) 2012-12-22 2021-05-25 Monolithic 3D Inc. Method to form a 3D semiconductor device and structure
US11916045B2 (en) 2012-12-22 2024-02-27 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US11217565B2 (en) 2012-12-22 2022-01-04 Monolithic 3D Inc. Method to form a 3D semiconductor device and structure
US11087995B1 (en) 2012-12-29 2021-08-10 Monolithic 3D Inc. 3D semiconductor device and structure
US11004694B1 (en) 2012-12-29 2021-05-11 Monolithic 3D Inc. 3D semiconductor device and structure
US10600657B2 (en) 2012-12-29 2020-03-24 Monolithic 3D Inc 3D semiconductor device and structure
US10651054B2 (en) 2012-12-29 2020-05-12 Monolithic 3D Inc. 3D semiconductor device and structure
US10892169B2 (en) 2012-12-29 2021-01-12 Monolithic 3D Inc. 3D semiconductor device and structure
US9871034B1 (en) 2012-12-29 2018-01-16 Monolithic 3D Inc. Semiconductor device and structure
US9385058B1 (en) 2012-12-29 2016-07-05 Monolithic 3D Inc. Semiconductor device and structure
US11177140B2 (en) 2012-12-29 2021-11-16 Monolithic 3D Inc. 3D semiconductor device and structure
US11430667B2 (en) 2012-12-29 2022-08-30 Monolithic 3D Inc. 3D semiconductor device and structure with bonding
US11430668B2 (en) 2012-12-29 2022-08-30 Monolithic 3D Inc. 3D semiconductor device and structure with bonding
US10903089B1 (en) 2012-12-29 2021-01-26 Monolithic 3D Inc. 3D semiconductor device and structure
US10115663B2 (en) 2012-12-29 2018-10-30 Monolithic 3D Inc. 3D semiconductor device and structure
US8902663B1 (en) 2013-03-11 2014-12-02 Monolithic 3D Inc. Method of maintaining a memory state
US10325651B2 (en) 2013-03-11 2019-06-18 Monolithic 3D Inc. 3D semiconductor device with stacked memory
US11869965B2 (en) 2013-03-11 2024-01-09 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and memory cells
US11935949B1 (en) 2013-03-11 2024-03-19 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers and memory cells
US10840239B2 (en) 2014-08-26 2020-11-17 Monolithic 3D Inc. 3D semiconductor device and structure
US11398569B2 (en) 2013-03-12 2022-07-26 Monolithic 3D Inc. 3D semiconductor device and structure
US8994404B1 (en) 2013-03-12 2015-03-31 Monolithic 3D Inc. Semiconductor device and structure
US11923374B2 (en) 2013-03-12 2024-03-05 Monolithic 3D Inc. 3D semiconductor device and structure with metal layers
US11088130B2 (en) 2014-01-28 2021-08-10 Monolithic 3D Inc. 3D semiconductor device and structure
US10224279B2 (en) 2013-03-15 2019-03-05 Monolithic 3D Inc. Semiconductor device and structure
US9117749B1 (en) 2013-03-15 2015-08-25 Monolithic 3D Inc. Semiconductor device and structure
US11574109B1 (en) 2013-04-15 2023-02-07 Monolithic 3D Inc Automation methods for 3D integrated circuits and devices
US11720736B2 (en) 2013-04-15 2023-08-08 Monolithic 3D Inc. Automation methods for 3D integrated circuits and devices
US11270055B1 (en) 2013-04-15 2022-03-08 Monolithic 3D Inc. Automation for monolithic 3D devices
US11030371B2 (en) 2013-04-15 2021-06-08 Monolithic 3D Inc. Automation for monolithic 3D devices
US9021414B1 (en) 2013-04-15 2015-04-28 Monolithic 3D Inc. Automation for monolithic 3D devices
US11341309B1 (en) 2013-04-15 2022-05-24 Monolithic 3D Inc. Automation for monolithic 3D devices
US11487928B2 (en) 2013-04-15 2022-11-01 Monolithic 3D Inc. Automation for monolithic 3D devices
US20150129967A1 (en) 2013-11-12 2015-05-14 Stmicroelectronics International N.V. Dual gate fd-soi transistor
US10297586B2 (en) 2015-03-09 2019-05-21 Monolithic 3D Inc. Methods for processing a 3D semiconductor device
US11031394B1 (en) 2014-01-28 2021-06-08 Monolithic 3D Inc. 3D semiconductor device and structure
US11107808B1 (en) 2014-01-28 2021-08-31 Monolithic 3D Inc. 3D semiconductor device and structure
US9800204B2 (en) 2014-03-19 2017-10-24 Stmicroelectronics International N.V. Integrated circuit capacitor including dual gate silicon-on-insulator transistor
US10381328B2 (en) 2015-04-19 2019-08-13 Monolithic 3D Inc. Semiconductor device and structure
US11011507B1 (en) 2015-04-19 2021-05-18 Monolithic 3D Inc. 3D semiconductor device and structure
US10825779B2 (en) 2015-04-19 2020-11-03 Monolithic 3D Inc. 3D semiconductor device and structure
US11056468B1 (en) 2015-04-19 2021-07-06 Monolithic 3D Inc. 3D semiconductor device and structure
US11956952B2 (en) 2015-08-23 2024-04-09 Monolithic 3D Inc. Semiconductor memory device and structure
US11937422B2 (en) 2015-11-07 2024-03-19 Monolithic 3D Inc. Semiconductor memory device and structure
US11978731B2 (en) 2015-09-21 2024-05-07 Monolithic 3D Inc. Method to produce a multi-level semiconductor memory device and structure
US11114427B2 (en) 2015-11-07 2021-09-07 Monolithic 3D Inc. 3D semiconductor processor and memory device and structure
CN115942752A (zh) 2015-09-21 2023-04-07 莫诺利特斯3D有限公司 3d半导体器件和结构
US10522225B1 (en) 2015-10-02 2019-12-31 Monolithic 3D Inc. Semiconductor device with non-volatile memory
US10418369B2 (en) 2015-10-24 2019-09-17 Monolithic 3D Inc. Multi-level semiconductor memory device and structure
US11991884B1 (en) 2015-10-24 2024-05-21 Monolithic 3D Inc. 3D semiconductor device and structure with logic and memory
US10847540B2 (en) 2015-10-24 2020-11-24 Monolithic 3D Inc. 3D semiconductor memory device and structure
US11296115B1 (en) 2015-10-24 2022-04-05 Monolithic 3D Inc. 3D semiconductor device and structure
US12035531B2 (en) 2015-10-24 2024-07-09 Monolithic 3D Inc. 3D semiconductor device and structure with logic and memory
US11114464B2 (en) 2015-10-24 2021-09-07 Monolithic 3D Inc. 3D semiconductor device and structure
US12016181B2 (en) 2015-10-24 2024-06-18 Monolithic 3D Inc. 3D semiconductor device and structure with logic and memory
US11869591B2 (en) 2016-10-10 2024-01-09 Monolithic 3D Inc. 3D memory devices and structures with control circuits
US11812620B2 (en) 2016-10-10 2023-11-07 Monolithic 3D Inc. 3D DRAM memory devices and structures with control circuits
US11251149B2 (en) 2016-10-10 2022-02-15 Monolithic 3D Inc. 3D memory device and structure
US11930648B1 (en) 2016-10-10 2024-03-12 Monolithic 3D Inc. 3D memory devices and structures with metal layers
US11711928B2 (en) 2016-10-10 2023-07-25 Monolithic 3D Inc. 3D memory devices and structures with control circuits
US11329059B1 (en) 2016-10-10 2022-05-10 Monolithic 3D Inc. 3D memory devices and structures with thinned single crystal substrates
US11763864B2 (en) 2019-04-08 2023-09-19 Monolithic 3D Inc. 3D memory semiconductor devices and structures with bit-line pillars
US10892016B1 (en) 2019-04-08 2021-01-12 Monolithic 3D Inc. 3D memory semiconductor devices and structures
US11018156B2 (en) 2019-04-08 2021-05-25 Monolithic 3D Inc. 3D memory semiconductor devices and structures
US11158652B1 (en) 2019-04-08 2021-10-26 Monolithic 3D Inc. 3D memory semiconductor devices and structures
US11296106B2 (en) 2019-04-08 2022-04-05 Monolithic 3D Inc. 3D memory semiconductor devices and structures

Family Cites Families (108)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3439214A (en) * 1968-03-04 1969-04-15 Fairchild Camera Instr Co Beam-junction scan converter
US4032947A (en) * 1971-10-20 1977-06-28 Siemens Aktiengesellschaft Controllable charge-coupled semiconductor device
US3997799A (en) 1975-09-15 1976-12-14 Baker Roger T Semiconductor-device for the storage of binary data
EP0014388B1 (en) 1979-01-25 1983-12-21 Nec Corporation Semiconductor memory device
JPS61280651A (ja) 1985-05-24 1986-12-11 Fujitsu Ltd 半導体記憶装置
JP2582794B2 (ja) 1987-08-10 1997-02-19 株式会社東芝 半導体装置及びその製造方法
US5164805A (en) 1988-08-22 1992-11-17 Massachusetts Institute Of Technology Near-intrinsic thin-film SOI FETS
US5144390A (en) * 1988-09-02 1992-09-01 Texas Instruments Incorporated Silicon-on insulator transistor with internal body node to source node connection
US5258635A (en) 1988-09-06 1993-11-02 Kabushiki Kaisha Toshiba MOS-type semiconductor integrated circuit device
US5024993A (en) * 1990-05-02 1991-06-18 Microelectronics & Computer Technology Corporation Superconducting-semiconducting circuits, devices and systems
US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
US5528062A (en) * 1992-06-17 1996-06-18 International Business Machines Corporation High-density DRAM structure on soi
DE69329376T2 (de) * 1992-12-30 2001-01-04 Samsung Electronics Co., Ltd. Verfahren zur Herstellung einer SOI-Transistor-DRAM
EP0655788B1 (en) * 1993-11-29 1998-01-21 STMicroelectronics S.A. A volatile memory cell
US5448513A (en) * 1993-12-02 1995-09-05 Regents Of The University Of California Capacitorless DRAM device on silicon-on-insulator substrate
US5489792A (en) * 1994-04-07 1996-02-06 Regents Of The University Of California Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility
US5446299A (en) * 1994-04-29 1995-08-29 International Business Machines Corporation Semiconductor random access memory cell on silicon-on-insulator with dual control gates
US5627092A (en) * 1994-09-26 1997-05-06 Siemens Aktiengesellschaft Deep trench dram process on SOI for low leakage DRAM cell
JP3304635B2 (ja) * 1994-09-26 2002-07-22 三菱電機株式会社 半導体記憶装置
US5593912A (en) * 1994-10-06 1997-01-14 International Business Machines Corporation SOI trench DRAM cell for 256 MB DRAM and beyond
FR2726935B1 (fr) * 1994-11-10 1996-12-13 Commissariat Energie Atomique Dispositif a memoire non-volatile electriquement effacable et procede de realisation d'un tel dispositif
JP3274306B2 (ja) * 1995-01-20 2002-04-15 株式会社東芝 半導体集積回路装置
US6292424B1 (en) * 1995-01-20 2001-09-18 Kabushiki Kaisha Toshiba DRAM having a power supply voltage lowering circuit
JP2806286B2 (ja) * 1995-02-07 1998-09-30 日本電気株式会社 半導体装置
JP3600335B2 (ja) * 1995-03-27 2004-12-15 株式会社東芝 半導体装置
US5568356A (en) 1995-04-18 1996-10-22 Hughes Aircraft Company Stacked module assembly including electrically interconnected switching module and plural electronic modules
US5606188A (en) * 1995-04-26 1997-02-25 International Business Machines Corporation Fabrication process and structure for a contacted-body silicon-on-insulator dynamic random access memory
US5629546A (en) * 1995-06-21 1997-05-13 Micron Technology, Inc. Static memory cell and method of manufacturing a static memory cell
US5585285A (en) 1995-12-06 1996-12-17 Micron Technology, Inc. Method of forming dynamic random access memory circuitry using SOI and isolation trenches
JP3759648B2 (ja) * 1996-03-04 2006-03-29 株式会社ルネサステクノロジ 半導体記憶装置
US5936265A (en) * 1996-03-25 1999-08-10 Kabushiki Kaisha Toshiba Semiconductor device including a tunnel effect element
EP0801427A3 (en) * 1996-04-11 1999-05-06 Matsushita Electric Industrial Co., Ltd. Field effect transistor, semiconductor storage device, method of manufacturing the same and method of driving semiconductor storage device
US6424016B1 (en) * 1996-05-24 2002-07-23 Texas Instruments Incorporated SOI DRAM having P-doped polysilicon gate for a memory pass transistor
US5886376A (en) * 1996-07-01 1999-03-23 International Business Machines Corporation EEPROM having coplanar on-insulator FET and control gate
US5778243A (en) * 1996-07-03 1998-07-07 International Business Machines Corporation Multi-threaded cell for a memory
US5811283A (en) * 1996-08-13 1998-09-22 United Microelectronics Corporation Silicon on insulator (SOI) dram cell structure and process
JP3260660B2 (ja) * 1996-08-22 2002-02-25 株式会社東芝 半導体装置およびその製造方法
JP2877103B2 (ja) * 1996-10-21 1999-03-31 日本電気株式会社 不揮発性半導体記憶装置およびその製造方法
KR19980057003A (ko) * 1996-12-30 1998-09-25 김영환 반도체 메모리 디바이스 및 그 제조방법
US5732014A (en) * 1997-02-20 1998-03-24 Micron Technology, Inc. Merged transistor structure for gain memory cell
JP3441330B2 (ja) * 1997-02-28 2003-09-02 株式会社東芝 半導体装置及びその製造方法
US6424011B1 (en) * 1997-04-14 2002-07-23 International Business Machines Corporation Mixed memory integration with NVRAM, dram and sram cell structures on same substrate
US5784311A (en) * 1997-06-13 1998-07-21 International Business Machines Corporation Two-device memory cell on SOI for merged logic and memory applications
US5943581A (en) * 1997-11-05 1999-08-24 Vanguard International Semiconductor Corporation Method of fabricating a buried reservoir capacitor structure for high-density dynamic random access memory (DRAM) circuits
US5976945A (en) * 1997-11-20 1999-11-02 Vanguard International Semiconductor Corporation Method for fabricating a DRAM cell structure on an SOI wafer incorporating a two dimensional trench capacitor
US5943258A (en) * 1997-12-24 1999-08-24 Texas Instruments Incorporated Memory with storage cells having SOI drive and access transistors with tied floating body connections
US6097056A (en) * 1998-04-28 2000-08-01 International Business Machines Corporation Field effect transistor having a floating gate
US6225158B1 (en) * 1998-05-28 2001-05-01 International Business Machines Corporation Trench storage dynamic random access memory cell with vertical transfer device
TW432545B (en) * 1998-08-07 2001-05-01 Ibm Method and improved SOI body contact structure for transistors
KR100268419B1 (ko) 1998-08-14 2000-10-16 윤종용 고집적 반도체 메모리 장치 및 그의 제조 방법
US6096598A (en) * 1998-10-29 2000-08-01 International Business Machines Corporation Method for forming pillar memory cells and device formed thereby
US6214694B1 (en) * 1998-11-17 2001-04-10 International Business Machines Corporation Process of making densely patterned silicon-on-insulator (SOI) region on a wafer
KR100290787B1 (ko) 1998-12-26 2001-07-12 박종섭 반도체 메모리 소자의 제조방법
US6157216A (en) 1999-04-22 2000-12-05 International Business Machines Corporation Circuit driver on SOI for merged logic and memory circuits
US6111778A (en) * 1999-05-10 2000-08-29 International Business Machines Corporation Body contacted dynamic memory
US6333532B1 (en) 1999-07-16 2001-12-25 International Business Machines Corporation Patterned SOI regions in semiconductor chips
US6566177B1 (en) * 1999-10-25 2003-05-20 International Business Machines Corporation Silicon-on-insulator vertical array device trench capacitor DRAM
US6391658B1 (en) * 1999-10-26 2002-05-21 International Business Machines Corporation Formation of arrays of microelectronic elements
US6544837B1 (en) * 2000-03-17 2003-04-08 International Business Machines Corporation SOI stacked DRAM logic
US6479862B1 (en) 2000-06-22 2002-11-12 Progressant Technologies, Inc. Charge trapping device and method for implementing a transistor having a negative differential resistance mode
JP2002009081A (ja) 2000-06-26 2002-01-11 Toshiba Corp 半導体装置及びその製造方法
JP4011833B2 (ja) 2000-06-30 2007-11-21 株式会社東芝 半導体メモリ
KR100339425B1 (ko) * 2000-07-21 2002-06-03 박종섭 리세스된 소이 구조를 갖는 반도체 소자 및 그의 제조 방법
US6621725B2 (en) * 2000-08-17 2003-09-16 Kabushiki Kaisha Toshiba Semiconductor memory device with floating storage bulk region and method of manufacturing the same
US6537891B1 (en) * 2000-08-29 2003-03-25 Micron Technology, Inc. Silicon on insulator DRAM process utilizing both fully and partially depleted devices
US6492211B1 (en) 2000-09-07 2002-12-10 International Business Machines Corporation Method for novel SOI DRAM BICMOS NPN
US20020070411A1 (en) * 2000-09-08 2002-06-13 Alcatel Method of processing a high voltage p++/n-well junction and a device manufactured by the method
JP4064607B2 (ja) * 2000-09-08 2008-03-19 株式会社東芝 半導体メモリ装置
JP2002094027A (ja) * 2000-09-11 2002-03-29 Toshiba Corp 半導体記憶装置とその製造方法
US6350653B1 (en) * 2000-10-12 2002-02-26 International Business Machines Corporation Embedded DRAM on silicon-on-insulator substrate
US6849871B2 (en) * 2000-10-20 2005-02-01 International Business Machines Corporation Fully-depleted-collector silicon-on-insulator (SOI) bipolar transistor useful alone or in SOI BiCMOS
US6429477B1 (en) * 2000-10-31 2002-08-06 International Business Machines Corporation Shared body and diffusion contact structure and method for fabricating same
US6440872B1 (en) * 2000-11-03 2002-08-27 International Business Machines Corporation Method for hybrid DRAM cell utilizing confined strap isolation
US6549450B1 (en) * 2000-11-08 2003-04-15 Ibm Corporation Method and system for improving the performance on SOI memory arrays in an SRAM architecture system
US6441436B1 (en) * 2000-11-29 2002-08-27 United Microelectronics Corp. SOI device and method of fabrication
JP3808700B2 (ja) * 2000-12-06 2006-08-16 株式会社東芝 半導体装置及びその製造方法
US20020072155A1 (en) * 2000-12-08 2002-06-13 Chih-Cheng Liu Method of fabricating a DRAM unit
US7101772B2 (en) * 2000-12-30 2006-09-05 Texas Instruments Incorporated Means for forming SOI
US6552398B2 (en) * 2001-01-16 2003-04-22 Ibm Corporation T-Ram array having a planar cell structure and method for fabricating the same
US6441435B1 (en) * 2001-01-31 2002-08-27 Advanced Micro Devices, Inc. SOI device with wrap-around contact to underside of body, and method of making
JP4216483B2 (ja) * 2001-02-15 2009-01-28 株式会社東芝 半導体メモリ装置
JP3884266B2 (ja) * 2001-02-19 2007-02-21 株式会社東芝 半導体メモリ装置及びその製造方法
US6548848B2 (en) * 2001-03-15 2003-04-15 Kabushiki Kaisha Toshiba Semiconductor memory device
JP4071476B2 (ja) * 2001-03-21 2008-04-02 株式会社東芝 半導体ウェーハ及び半導体ウェーハの製造方法
EP1253634A3 (en) 2001-04-26 2005-08-31 Kabushiki Kaisha Toshiba Semiconductor device
US6556477B2 (en) 2001-05-21 2003-04-29 Ibm Corporation Integrated chip having SRAM, DRAM and flash memory and method for fabricating the same
JP2003031693A (ja) * 2001-07-19 2003-01-31 Toshiba Corp 半導体メモリ装置
US6770546B2 (en) * 2001-07-30 2004-08-03 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
US6567330B2 (en) * 2001-08-17 2003-05-20 Kabushiki Kaisha Toshiba Semiconductor memory device
JP3984014B2 (ja) * 2001-09-26 2007-09-26 株式会社東芝 半導体装置用基板を製造する方法および半導体装置用基板
JP4322453B2 (ja) * 2001-09-27 2009-09-02 株式会社東芝 半導体装置およびその製造方法
JP2003124345A (ja) * 2001-10-11 2003-04-25 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US6657259B2 (en) * 2001-12-04 2003-12-02 International Business Machines Corporation Multiple-plane FinFET CMOS
US6518105B1 (en) * 2001-12-10 2003-02-11 Taiwan Semiconductor Manufacturing Company High performance PD SOI tunneling-biased MOSFET
JP3825688B2 (ja) * 2001-12-25 2006-09-27 株式会社東芝 半導体装置の製造方法
JP2003203967A (ja) * 2001-12-28 2003-07-18 Toshiba Corp 部分ｓｏｉウェーハの製造方法、半導体装置及びその製造方法
US20030123279A1 (en) * 2002-01-03 2003-07-03 International Business Machines Corporation Silicon-on-insulator SRAM cells with increased stability and yield
JP2003243528A (ja) * 2002-02-13 2003-08-29 Toshiba Corp 半導体装置
US6661042B2 (en) * 2002-03-11 2003-12-09 Monolithic System Technology, Inc. One-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region
US7189606B2 (en) * 2002-06-05 2007-03-13 Micron Technology, Inc. Method of forming fully-depleted (FD) SOI MOSFET access transistor
US6888200B2 (en) * 2002-08-30 2005-05-03 Micron Technology Inc. One transistor SOI non-volatile random access memory cell
US6917078B2 (en) * 2002-08-30 2005-07-12 Micron Technology Inc. One transistor SOI non-volatile random access memory cell
US6903969B2 (en) * 2002-08-30 2005-06-07 Micron Technology Inc. One-device non-volatile random access memory cell
JP4044401B2 (ja) 2002-09-11 2008-02-06 株式会社東芝 半導体記憶装置
JP2004111643A (ja) 2002-09-18 2004-04-08 Toshiba Corp 半導体記憶装置、及び、その制御方法
US6861689B2 (en) * 2002-11-08 2005-03-01 Freescale Semiconductor, Inc. One transistor DRAM cell structure and method for forming
US7030436B2 (en) * 2002-12-04 2006-04-18 Micron Technology, Inc. Embedded DRAM gain memory cell having MOS transistor body provided with a bi-polar transistor charge injecting means
US6714436B1 (en) * 2003-03-20 2004-03-30 Motorola, Inc. Write operation for capacitorless RAM

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102088028A (zh) * 2009-12-08 2011-06-08 S.O.I.Tec绝缘体上硅技术公司 具有埋置绝缘层下第二控制栅极的SeOI闪存存储单元
CN102088028B (zh) * 2009-12-08 2014-10-08 S.O.I.Tec绝缘体上硅技术公司 闪存存储器单元及其控制方法，存储器阵列及其构造方法

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