CN1574263A - 半导体封装及其制造方法 - Google Patents

半导体封装及其制造方法 Download PDF

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Publication number
CN1574263A
CN1574263A CNA2004100475454A CN200410047545A CN1574263A CN 1574263 A CN1574263 A CN 1574263A CN A2004100475454 A CNA2004100475454 A CN A2004100475454A CN 200410047545 A CN200410047545 A CN 200410047545A CN 1574263 A CN1574263 A CN 1574263A
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mentioned
semiconductor packages
wiring
dielectric film
electrode
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CNA2004100475454A
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CN1298034C (zh
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若林猛
胁坂伸治
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Zhao Tan Jing Co ltd
Aoi Electronics Co Ltd
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Casio Computer Co Ltd
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    • B01F23/231—Mixing gases with liquids by introducing gases into liquid media, e.g. for producing aerated liquids by bubbling
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Abstract

本发明提供一种能提高外部连接用的电极和布线的电连接的可靠性的半导体封装及其制造方法。所谓CSP的半导体结构体(2)通过粘接层(3)而粘接在基片(1)的上面中央部上。在基片(1)的上面由树脂构成的矩形框状的绝缘层(14)被设置成其上面与半导体结构体(2)的上面大致在同一面上。在半导体结构体(2)和绝缘膜(14)的上面，使预浸材料完全固化而形成的绝缘膜(15)设置成使其上面形成平坦状态。在绝缘膜(15)的上面，设置了把金属片制作成图形而构成的上层再布线(16)。在此情况下，与上层再布线(16)的下面形成一体的尖头向下圆锥形状的凸起电极(17)，在进入到绝缘膜(15)内的状态下与柱状电极(12)的上面中央部相连接。

Description

半导体封装及其制造方法
技术领域
本发明涉及半导体封装及其制造方法。
背景技术
过去的半导体封装具有所谓CSP(chip size package：芯片尺寸封装)方式。该CSP是在形成了多个外部连接用的连接焊盘(pad)的半导体基片的上面设置绝缘膜，在绝缘膜与各连接焊盘相对应的部分设置开口部，从通过开口部而露出的连接焊盘上面开始，到绝缘膜上面的规定部位处设置布线(例如参见专利文献1)。在此情况下，在包括通过开口部而露出的连接焊盘上面在内的绝缘膜的整个上面，形成基底金属层，利用以基底金属层为电镀电流路的电解镀铜方式，在基底金属层上面的规定部位上形成布线，以布线为掩模把基底金属层的不需要的部分腐蚀掉，在布线下面仅剩下基底金属层。
[专利文献1]
特开200-195890号公报(图8～图10)。
但是，上述过去的半导体封装(外壳)，是在绝缘膜的与各连接焊盘相对应的部分上形成开口部，利用溅射法或非电解镀法来形成作为电镀电流路的基底金属层，用电解镀法来形成布线。所以，绝缘膜和基底金属层的粘接强度低，尤其在开口部的侧壁上也还容易产生断线等，从而使连接焊盘和布线的电连接的可靠性降低。
发明内容
因此，本发明的目的在于提供一种能提高外部连接用的电极和布线的电连接的可靠性的半导体封装及其制造方法。
若采用本发明，则能提供这样的半导体封装，其特征在于具有：
至少一个半导体结构体2，具有设置在半导体基片4上的多个外部连接用的电极12；
绝缘膜15，用于覆盖上述半导体结构体2；以及
布线16，它形成在上述绝缘膜15上，
上述布线16的凸起电极17进入到与上述外部连接用的电极12相对应的上述绝缘膜15的部分内，与上述外部连接用的电极12相连接。
并且，若采用本发明，则能提供这样的半导体封装的制造方法，其特征在于具有以下工序：
利用绝缘膜15来覆盖具有多个外部连接用电极12的半导体结构体2的上面；
在上述绝缘膜15上布置金属片16a，该金属片具有与上述各外部连接用电极12相对应的凸起电极17；
把上述金属片16a的各凸起电极17插入到上述绝缘膜15内，使其与上述各外部连接用电极12相连接；
把上述金属片16a制作成图形，形成布线16。
若采用本发明，则在由金属片构成的布线上设置凸起电极，使该突起电极插入到外部连接电极上所形成的绝缘膜内，在此状态下与外部连接电极相连接，所以，提高了凸出电极和绝缘膜的结合强度，提高了布线和外部连接电极的电气接触可靠性。
附图说明
图1是作为本发明的第1实施方式的半导体封装的放大断面图。
图2是在图1所示的半导体封装的制造方法的一例中最初准备的结构的放大断面图。
图3是图2后续的工序的放大断面图。
图4是图3后续的工序的放大断面图。
图5是图4后续的工序的放大断面图。
图6是图5后续的工序的放大断面图。
图7是图6后续的工序的放大断面图。
图8是图7后续的工序的放大断面图。
图9是图8后续的工序的放大断面图。
图10是图9后续的工序的放大断面图。
图11是图10后续的工序的放大断面图。
图12是图11后续的工序的放大断面图。
图13是图12后续的工序的放大断面图。
图14是图13后续的工序的放大断面图。
图15是图14后续的工序的放大断面图。
图16是图15后续的工序的放大断面图。
图17是图16后续的工序的放大断面图。
图18是在形成具有凸起电极的铜板时，最初的工序的放大断面图。
图19是图18后续的工序放大断面图。
图20是图19后续的工序放大断面图。
图21是作为本发明的变形例的半导体封装的放大断面图。
图22是作为本发明的其他变形例的半导体封装的放大断面图。
具体实施方式
图1表示作为本发明的实施方式的半导体封装的断面图。该半导体封装具有由硅、玻璃、陶瓷、树脂、金属等构成的平面矩形形状的基板1。
在基板1的上面中央部，通过由小片接合(die pond)材料构成的粘接层3来粘接比基板1的尺寸小一些的平面矩形形状的半导体结构体2的下面。在此情况下，半导体结构体2，具有下述的布线、柱状电极、封装膜，一般是所谓CSP结构，其制作方法是：如下所述，在硅晶片上形成布线、柱状电极、封装膜之后，通过切割而获得单个的半导体结构体2。所以，也可特别称为晶片阶段CSP(W-CSP)。以下说明半导体结构体2的构成。
半导体结构体2具有硅半导体基片4。硅基片4通过粘接层3粘接在基板1上。在硅基片4的上面中央部设置了集成电路(无图示)。在硅基片4的上面的集成电路周围部上，由铝类金属等构成的多个连接焊盘5分别设置成与构成集成电路的集成电路元件相连接。在连接焊盘5的中央部除外的硅基片4的上面，设置了由氧化硅等无机材料构成的绝缘膜膜6，连接焊盘5的中央部通过设置在绝缘膜6上的开口部7而露出。
在绝缘膜6的上面，设置了由环氧树脂或聚酰亚胺类树脂等有机树脂材料构成的保护膜(绝缘膜)8。在此情况下，在绝缘膜6的与开口部7相对应的部分上的保护膜8上设置开口部9。从通过两个开口部7、9而露出的连接焊盘5的上面到保护膜8的上面，设置了向硅基片4的中央侧延伸的基底金属层10。在整个基底金属层10的上面设置了由铜构成的布线11。
在布线11的连接焊盘部上面设置了由铜构成的柱状电极(外部连接用的电极)12。在包括布线11在内的保护膜8的上面设置了由环氧类树脂或聚酰亚胺类树脂等热固性树脂材料构成的封装膜(绝缘膜)13，其上面形成与柱状电极12的上面在同一面上。这样，所谓W-CSP的半导体结构体2，包括硅基片4、连接焊盘5、绝缘膜6，另外，还包括保护膜8，布线11、柱状电极12、封装膜13。
在半导体结构体2周围的基片1的上面，由环氧类树脂或聚酰亚胺类树脂等构成的矩形框状的绝缘膜14设置成和半导体结构体2的上面大致在同一个面上。在半导体结构体2和绝缘膜14的上面，绝缘膜15设置成其上面呈平坦状态。绝缘膜15，由热固性树脂材料构成，例如将向玻璃纤维中浸渍环氧类树脂的预浸材料经过加热固化而制成。
在绝缘膜15的上面，设置了上层布线16，这是把由铜类金属材料构成的金属片制作成图形而制成的。在此情况下，在上层布线16的下面，与柱状电极12的上面中央部相对应的部分，与尖头向下圆锥形状的凸起电极17形成一个整体。凸起电极17在插入到绝缘膜15内的状态下压接到柱状电极12的上面中央部上。
在包括上层布线16在内的绝缘膜15的上面，设置了由阻焊剂等构成的上层绝缘膜18。在与上层布线16的连接焊盘部相对应的部分的上层绝缘膜18上设置了开口部19。在开口部19内及其上方，焊锡球20设置成与上层布线16的连接焊盘部相连接。多个焊锡球20在上层绝缘膜18上布置成矩阵状。
使基片1的尺寸稍大于半导体结构体2的尺寸，是为了根据硅基片4上的连接焊盘5的数量增加，使焊银球20的布置区域稍大于半导体结构体2的尺寸，这样，使上层布线16的连接焊盘部(上层绝缘膜18的开口部19内的部分)的尺寸和间距大于柱状电极12的尺寸和间距。
因此，布置成矩阵状的上层布线16的连接焊盘部，不仅布置在与半导体结构体2相对应的区域内，而且也布置在与半导体结构体2的周侧面的外侧所设置的绝缘膜14相对应的区域。也就是说，布置成矩阵状的焊锡球20中，至少最外周的焊锡球20布置在比半导体结构体2靠外侧的周围。
这样，该半导体封装，其特征在于：在硅基片4上不仅有连接焊盘5、绝缘膜6，而且在形成了保护膜8、布线11、柱状电极12、封装膜13等的半导体结构体2的周围及其上面，设置了绝缘膜14和绝缘膜15，在绝缘膜15的上面，设置了上层布线16，该上层布线16，通过形成在该绝缘膜15上的开口部16而与柱状电极12相连接，把金属片加工成图形作为布线。
在此情况下，由于绝缘膜15的上面是平坦的，所以，如后所述，能使在以后的工序中形成的上层布线16和焊锡球20上面的高度位置达到均匀，提高键接时的可靠性。并且，如后所述，能使在金属片上制作图形而构成的上层布线16的厚度均匀，而且能使上层布线16不产生阶差。再者，半导体结构体2，用保护膜8来覆盖集成电路，所以，包括形成在该保护膜8上的上层布线，而形成了柱状电极12的部分除外，对整个保护膜8均用封装膜13进行包封。因此，形成了KGD(KnownGood Die：信得过芯片)，在保管时和搬运时能防止内部损伤，绝对确保可靠性。因此，如以下说明的那样，把这种KGD的半导体结构体2埋入所形成的半导体封装，半导体结构体2几乎完全不会出现故障，能获得可靠性极高的半导体封装。
以下为了说明该半导体封装的制造方法的一例，首先说明半导体结构体2的制造方法的一例。在此情况下，首先，如图2所示，在晶片状态的硅基片(半导体基片)4上，设置了由铝类金属等构成的连接焊盘5、由氧化硅等构成的绝缘膜6、以及环氧类树脂或聚酰亚胺类树脂等构成的保护膜8，连接焊盘5的中央部通过形成在绝缘膜6和保护膜8上的开口部7、9而露出。以上，在晶片状态的硅基片4上，在形成各半导体结构体的区域内，形成规定功能的集成电路，连接焊盘5分别与形成在相应区域内的集成电路进行电连接。
以下，如图3所示，在包括通过两开口部7、9而露出的连接焊盘5上面在内的保护膜8的整个上面形成基底金属层10。在此情况下，基底金属层10既可以仅仅是用无电解镀法形成的铜层，也可以仅仅是用溅射法形成的铜层，另外，也可以是在利用溅射法形成的钛等薄膜层上再用溅射法形成铜层。
下面，在基底金属层10的上面，形成阻镀膜21图形。在此情况下，在与布线11形成区相对应的部分内的阻镀膜21上形成了开口部22。然后，以基底金属层10为电镀电流路进行电解镀铜，这样，在阻镀膜21的开口部22内的基底金属层10的上面，形成布线11。之后剥离阻镀膜21。
然后，如图4所示，在包括布线11在内的基底金属层10的上面，形成阻镀膜23的图形。在此情况下，在与柱状电极12形成区相对应的部分中的阻镀膜23上形成开口部24。接着以基底金属层10为电镀电流路进行电解镀铜，在阻镀膜23的开口部24内的布线11的连接焊盘部上面形成柱状电极12。
然后，剥离阻镀膜23，接着用柱状电极12和布线11作为掩模，对基底金属层10的不需要部分进行腐蚀加以清除，于是如图5所示，仅在布线11下留下基底金属层10。
然后，如图6所示，用丝网印刷法、旋转涂敷法、芯片涂敷法，在柱状电极12和布线11包括在内的保护膜8的整个上面，形成环氧类树脂或聚酰亚胺类树脂等热固性树脂材料的薄膜，并使其厚度大于柱状电极12的高度，通过加热使其固化，形成封装膜13。所以，在此状态下，柱状电极12的上面由封装膜13覆盖。
然后，对封装膜13和柱状电极12的上面侧进行适当研磨，如图7所示，使柱状电极的上面露出，而且，使包括该露出的柱状电极12的上面在内的封装膜13的上面平坦。这里，对柱状电极12的上面侧进行适当研磨，是因为电解镀所形成的柱状电极12的高度有不均匀，研磨是为了消除该不均匀，使柱状电极12的高度达到均匀一致。
之后，如图8所示，在硅基片4的整个下面，粘结粘接层3。粘接层3由环氧类树脂或聚酰亚胺类树脂等芯片接合材料构成，通过加热和加压，在半固化状态下固定到硅基片4上。然后，把固定到硅基片4上的粘接层3粘接到切割带(无图示)上，经过图9所示的切割工序后，从切割带上剥离下来。于是如图1所示，获得在硅基片4的下面有粘接层3的多个半导体结构体2。
这样，获得的半导体结构体2，因为在硅基片4的下面有粘接层，所以在切割工序后不必进行在各半导体结构体2的硅基片4的下面分别设置粘接层这样非常麻烦的作业。而且，在切割工序后从切割带上剥离的作业，与切割工序后在各半导体结构体2的硅基片4的下面分别设置粘接层的作业相比较，剥离作业要简单得多。
以下，说明利用这样获得的半导体结构体2，制造图1所示半导体封装的情况的一例。首先，如图10所示，按照能够取得多个图1所示的基片1的大小(大小并不限定)，准备好平面形状为矩形的基片1。然后，在基片1的上面的规定的多个部位上分别粘接那种已粘接在半导体结构体2的硅基片4的下面的粘接层3。这里的粘接是通过加热加压来使粘接层3完全固化。
然后，如图11所示，用丝网印刷法、旋转涂敷法、芯片涂敷法，在包括半导体结构体2在内的基片1的整个上面，形成环氧类树脂或聚酰亚胺类树脂等热固性树脂材料的构成的绝缘膜14，并使其厚度大于半导体结构体2的高度，通过加热使其固化，所以，在此状态下，半导体结构体2的上面由绝缘层14覆盖。
然后，至少对绝缘层14的上面侧进行适当研磨，如图12所示，使柱状电极的上面露出，而且，使包括该露出的柱状电极12的上面在内的封装膜13的上面(即半导体结构体2的上面)和绝缘层14的上面达到平坦状态。
然后，如图13所示，在半导体结构体2和绝缘层14的上面安装薄片装的绝缘材料15a。在此情况下，绝缘膜15a希望是预浸材料(pre-preg)，该预浸材料，例如是在由玻璃等无机材料构成的纤维中浸渍环氧类树脂等热固性树脂材料，使该热固性树脂材料形成半固化状态。而且，绝缘材料15a，为了达到平坦，希望是薄片状，但不一定仅限于预浸材料，也可以是不含纤维的热固性树脂材料。
然后，在绝缘材料15a的上面、下面，至少与柱状电极12相对应的位置上，使具有尖圆锥形状的凸起电极17的金属片16a对准位置进行布置。也就是说，在绝缘材料15a的上面进行布置，使凸起电极17的前端部位于对应的柱状电极14的上面中央部上。在此情况下可以利用带有真空吸附机构的热压接板来吸附金属片16a的上面，使该热压接片在X方向、Y方向和Z方向(根据需要在θ方向)上进行移动，调整决定位置。此外，具有凸起电极17的金属片16a的形成方法待以后说明。
然后，当利用带有真空吸附机构的热压接板来对金属片16a进行加热加压时尖头向下圆锥形状的凸起电极17侵入到绝缘材料15a内，如图14所示，进入到绝缘材料15a内，而且，金属片16a的下面在从绝缘材料15a的上面多少进入到内面的状态下，相接到柱状电极12的上面中央部上。并且，这时，通过金属片16a对绝缘材料15a加热，使该绝缘材料15a中的热固性树脂材料完全固化。这样一来，金属片16a的凸起电极17从粘接层14的上面侧到下面侧在其厚度方向上整个进入，而且，在金属片16a的下面与绝缘材料15a的上面紧密接合的状态下使绝缘材料15a固化，所以，金属片16a和绝缘材料15a粘接强度提高，这样，金属片16a的各凸起电极17和柱状电极12的电连接的可靠性提高。
然后，当用光刻法把金属片16a制作成图形时，如图15所示，在绝缘膜15a的上面，形成上层布线16，如上所述，在此状态下，上层布线16通过进入到绝缘膜15内的凸起电极17，与柱状电极12的上面可靠地进行电连接。
然后，如图16所示利用丝网印刷法或旋转涂敷法等，在包括上层布线16在内的绝缘膜15的整个面上形成由阻焊剂构成的上层绝缘膜18。在此情况下，在与上层布线16的连接焊盘部相对应的部分中的上层绝缘膜18上，形成开口部19。然后，在开口部19内及其上方形成焊锡球20，并使焊锡球20与上层布线16的连接焊盘部相连接。
以下如图17所示，在互相邻接的半导体结构体2之间，若对上层绝缘膜18、绝缘膜15、粘接层14和基片1进行切断，则获得多个图1所示的半导体封装。
如以上那样，用上述制造方法，使形成在金属片16a上的凸起电极17进入到绝缘膜15内，与半导体结构体2的柱状电极12相连接，然后，把金属片16a制作成图形，形成上层布线16，所以，不必在绝缘膜15上形成层间连接用的开口部，并且，因为不是电解电镀，所以，也不需要把基底金属层制成膜，除去其不必要的部分，所以，能减少工序数，提高生产效率。
并且，由于绝缘膜15的上面是平坦的，所以能使在以后的工序中形成的上层布线16和焊锡球20的上面的高度位置达到均匀一致，能提高键合时的可靠性。并且，把金属片制作成图形而制成的上层布线16的厚度达到均匀一致，因此，在上层布线16中不会产生阶差。
再者，在基片1上通过粘接层3来布置多个半导体结构体2，对多个半导体结构体2，统一来形成绝缘膜14、绝缘膜15、上层布线16、上层绝缘膜18和焊锡球20。然后，进行切断，获得多个半导体封装，所以能简化制造工序。并且，图12所示的制造工序以后，可以与基片1一起来搬运多个半导体结构体2，由此也能简化制造工序。
以下说明具有凸起电极17的金属片16a的形成方法。在此情况下，首先，如图18所示，在厚度一样的金属片16b的整个上面，形成上面抗蚀剂(resist)膜31，同时在下面的规定部位(即凸起电极17形成区)上形成平面圆形状的下面抗蚀剂膜32。以下如图19所示，若进行半湿腐蚀，则腐蚀按各方向同等地进行，所以在没有下面抗蚀剂膜32的区域内，形成较薄的金属片16a，而且在该较薄的金属片16a的下面具有下面抗蚀剂膜42的区域内，形成尖头向下圆锥形状的凸起电极17。然后，若除去两抗蚀剂膜41、42，则如图20所示，获得具有凸起电极17的金属片16a。
以下说明具有凸起电极17的金属片16a的尺寸的一例。假定最初的金属片16b的厚度约为100μm，凸起电极17的高度约为80μm，那么具有凸起电极17的金属片16a的厚度约为20μm。并且，凸起电极17的根部直径约为50μm，头部直径约为20μm。
在这种情况下，图13所示的绝缘材料15a采用在玻璃纤维中浸渍环氧类树脂的、例如FR-4级的预浸渍材料，同时，若使其厚度与凸起电极17的高度相对应约为80μm，则在加热温度95~115℃范围内，能使凸起电极17很好地进入到该绝缘材料15a内。
凸起电极17的另一形成方法是：也可以在金属片的一个面上，印刷由银膏等构成的导电膏，使其固化，形成凸起电极。无论是那种方法的情况下，都希望金属片的厚度(布线部分厚度)为10~50μm，凸起电极17的高度(从金属片面上突出的高度)为20~150μm。并且，虽然没有限定的意思，但希望凸起电极的根部直径为50~400μm，头部直径为10~200μm(但要小于根部直径)。
以上，绝缘材料15a的厚度，与凸起电极17的高度相同，或者稍小即可。并且，金属片16a不限于由铜单层构成，例如也可以是二层积层结构，例如由镍等基片和铜等凸起电极形成片构成。
并且，在上述实施方式中，把焊锡球20设置成与半导体结构体2上及其周围的绝缘层14上的整个面相对应，排列成矩阵状。但也可以把焊锡球20只设置在与半导体结构体2的周围的粘接层14相对应的区域上。在此情况下，也可以把焊锡球20不是设置在半导体结构体2的全周围，而是仅设置在半导体结构体2的4边之中的1~3边的侧部。并且，在此情况下，不必使绝缘膜4为矩形框状，也可以仅布置在设置焊锡球20的边的侧面。
<变形例>
在上述实施方式中，例如图1所示，说明了在绝缘膜15上，上层布线16和上层绝缘膜18分别各形成一层的情况。但并非仅限于此，例如也可以分别形成2层以上，也可以如图21所示的变形例那样，分别各形成2层。
也就是说，在半导体结构体2和绝缘膜14的上面设置由预浸材料构成的第1上层绝缘膜41。在第1上层绝缘膜41的上面，第1上层布线42设置成通过进入到第1上层绝缘膜41内的凸起电极43而与柱状电极12的上面相连接。在包括第1上层布线42在内的第1上层绝缘膜41的上面，设置了由预浸材料等构成的第2上层绝缘膜44。在第2上层绝缘膜44的上面，第2上层布线45设置成通过进入到第2上层绝缘膜44内的凸起电极46而与第1上层布线42的连接焊盘部上面相连接。
在包括第2上层布线45在内的第2上层绝缘膜44的上面，设置了由阻焊剂等构成的第3上层绝缘膜47。在与第2上层布线45的连接焊盘部相对应的部分的第3上层绝缘膜47上设置了开口部48。在开口部48内及其上方，焊锡球49设置成与第2上层布线45的连接焊盘部相连接。
<其他变形例>
并且，如图17所示的情况下，在互相邻接的半导体结构体2之间进行切断，但并非仅限于此，也可以把2个或更多的半导体结构体2作为一组进行切断，例如图22所示的其他变形例那样，把2个半导体结构体2作为一组进行切断，制成多芯片模块型半导体封装。在此情况下，2个一组的半导体结构体2既可以是同种类的，也可以是不同种类的。
<其他实施方式>
而且，在上述各实施方式中，半导体结构体2作为外部连接用的电极，除了连接焊盘5外，还有布线11、柱状电极12。本发明能适用于半导体结构体2的外部连接用的电极仅具有连接焊盘5，或者具有连接焊盘5和连接焊盘部的布线11。
发明的效果
如以上说明的那样，若采用本发明，则在由金属片构成的布线上设置凸起电极，在使该凸起电极进入到外部连接用的电极上所形成的绝缘膜内的状态下，与外部连接用的电极相连接，所以凸起电极和绝缘膜的粘接强度提高，布线和外部连接用的电极的电连接可靠性提高。

Claims (32)

1、一种半导体封装，其特征在于具有：
至少一个半导体结构体(2)，具有设置在半导体基片(4)上的多个外部连接用电极(12)；
绝缘膜(15)，用于覆盖上述半导体结构体(2)；以及
布线(16)，它形成在上述绝缘膜(15)上，
上述布线(16)的凸起电极(17)进入到与上述外部连接用电极(12)相对应的上述绝缘膜(15)的部分内，与上述外部连接用电极(12)相连接。
2、如权利要求1所述的半导体封装，其特征在于：所述半导体封装具有多个上述半导体结构体(2)。
3、如权利要求1所述的半导体封装，其特征在于：上述半导体结构体(2)包括：连接焊盘(5)、与该连接焊盘(5)相连接的柱状的外部连接用电极(12)、以及设置在该外部连接用电极(12)周围的封装膜(13)。
4、如权利要求3所述的半导体封装，其特征在于：上述半导体结构体(2)包括对上述连接焊盘(5)、以及上述外部连接用电极(12)进行连接的布线(11)。
5、如权利要求1所述的半导体封装，其特征在于：上述绝缘膜(15)是薄片。
6、如权利要求5所述的半导体封装，其特征在于：上述绝缘膜(15)的上面是平坦的。
7、如权利要求1所述的半导体封装，其特征在于：上述凸起电极(17)由和上述布线(16)形成一体的凸起电极(17)构成。
8、如权利要求1所述的半导体封装，其特征在于：上述凸起电极(17)是利用固定在上述布线(16)上的金属膏形成的凸起电极(17)。
9、如权利要求1所述的半导体封装，其特征在于：上述凸起电极(17)是尖头向下圆锥形状。
10、如权利要求1所述的半导体封装，其特征在于：上述布线(16)具有连接焊盘部，并具有对上述连接焊盘部除外的部分进行覆盖的上层绝缘膜(18)。
11、如权利要求1所述的半导体封装，其特征在于：在上述绝缘膜(15)和上述布线(16)上具有1层以上的上层绝缘膜(44)、以及形成在上述各上层绝缘膜(44)上并与下层布线(42)的连接焊盘部相连接的上层布线(45)。
12、如权利要求11所述的半导体封装，其特征在于：具有对上述最上层的布线(45)的连接焊盘部除外的部分进行覆盖的上层绝缘膜(47)。
13、如权利要求11所述的半导体封装，其特征在于：上述上层布线(45)的至少一部分具有凸起电极(46)，该凸起电极(46)进入到上述下层绝缘膜(44)内，与上述下层布线(42)的连接焊盘部相连接。
14、如权利要求11所述的半导体封装，其特征在于：在上述最上层布线(45)的连接焊盘部上设置了焊锡球(49)。
15、如权利要求1所述的半导体封装，其特征在于：在上述半导体结构体的周侧面上设置了绝缘膜(14)。
16、如权利要求15所述的半导体封装，其特征在于：在上述半导体结构体(2)和上述绝缘膜(14)的下面，设置了基片(1)。
17、一种半导体封装的制造方法，其特征在于具有以下工序：
利用绝缘膜(15)来覆盖具有多个外部连接用电极(12)的半导体结构体(2)的上面；
在上述绝缘膜(15)上布置金属片(16a)，该金属片具有与上述各外部连接用电极(12)相对应的凸起电极(17)；
把上述金属片(16a)的各凸起电极(17)插入到上述绝缘膜(15)内，使其与上述各外部连接用电极(12)相连接；
把上述金属片(16a)制成图形，形成布线(16)。
18、如权利要求17所述的半导体封装的制造方法，其特征在于：上述半导体结构体(2)包括：连接焊盘(5)、与该连接焊盘(5)相连接的柱状的外部连接用电极(12)、以及设置在该外部连接用电极(12)周围的封装膜(13)。
19、如权利要求18所述的半导体封装的制造方法，其特征在于：上述半导体结构体(2)包括对上述连接焊盘(5)和上述外部连接用电极(12)进行连接的布线(11)。
20、如权利要求17所述的半导体封装的制造方法，其特征在于：上述绝缘膜(15)是薄片。
21、如权利要求20所述的半导体封装的制造方法，其特征在于：上述绝缘膜(15)的上面是平坦的。
22、如权利要求17所述的半导体封装的制造方法，其特征在于：使上述金属片(16a)的凸起电极(17)进入到上述绝缘膜(15)内的工序是：上述绝缘膜(15)在半固化状态下进行，然后通过加热使上述绝缘膜(17)完全固化，并使上述金属片(16a)紧密粘合到上述绝缘膜(15)上。
23、如权利要求17所述的半导体封装的制造方法，其特征在于：通过对上述金属片(16a)的下面进行半腐蚀，使上述凸起电极(17)与上述金属片(16a)下形成一体而且形成尖头向下圆锥形状。
24、如权利要求17所述的半导体封装的制造方法，其特征在于：在上述金属片(16a)下面印刷金属膏，使上述凸起电极(17)形成尖头向下圆锥形状。
25、如权利要求17所述的半导体封装的制造方法，其特征在于：在用上述绝缘膜(15)来覆盖上述半导体结构体(2)的上面的工序之前，具有以下2个工序：
1.在基片(1)上分别把设置在半导体基片(4)上的具有多个外部连接用电极(12)的多个半导体结构体(2)布置成互相离开的状态；
2.在上述各半导体结构体(2)的周侧面上形成绝缘膜(14)；
然后，用上述绝缘膜(15)来覆盖上述半导体结构体(2)和上述粘接层(14)的上面。
26、如权利要求25所述的半导体封装的制造方法，其特征在于：在将上述金属片(16a)加工成图形，形成上述布线(16)的工序之后，对上述半导体结构体(2)之间的上述绝缘膜(15)和上述粘接层(14)进行切断，分离成至少包括一个上述半导体结构体(2)的半导体封装。
27、如权利要求26所述的半导体封装的制造方法，其特征在于：上述切断使上述半导体结构体(2)在半导体封装中包括多个。
28、如权利要求26所述的半导体封装的制造方法，其特征在于：在上述切断工序中，对上述绝缘膜(15)和粘接层(14)进行切断，并对上述基片(1)进行切断，使上述半导体封装具有上述基片(1)。
29、如权利要求17所述的半导体封装的制造方法，其特征在于：在把上述金属片(16a)制作成图形，形成布线(16)的工序之后，还具有以下工序：在上述绝缘膜(15)和上述布线(16)上形成1层以上的上层绝缘膜(44)，以及形成上层布线(45)，该上层布线(45)形成在上述上层绝缘膜(44)上，与下层布线(42)的连接焊盘部相连接。
30、如权利要求29所述的半导体封装的制造方法，其特征在于：具有形成上层绝缘膜(47)的工序，该绝缘膜(47)用于覆盖上述最上层布线(45)的连接焊盘部除外的部分。
31、如权利要求29所述的半导体封装的制造方法，其特征在于具有以下工序：上述上层布线(45)的至少一部分具有凸起电极(46)，使该凸起电极(46)进入到上述下层绝缘膜(44)内，与上述下层布线(41)的连接焊盘部相连接。
32、如权利要求29所述的半导体封装的制造方法，其特征在于：还具有以下工序：在上述最上层的布线(45)的连接焊盘部上形成焊锡球(49)。
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