CN1290963A - 引线框架及其电镀方法 - Google Patents

引线框架及其电镀方法 Download PDF

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CN1290963A
CN1290963A CN00101997A CN00101997A CN1290963A CN 1290963 A CN1290963 A CN 1290963A CN 00101997 A CN00101997 A CN 00101997A CN 00101997 A CN00101997 A CN 00101997A CN 1290963 A CN1290963 A CN 1290963A
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lead frame
alloy
layer
intermediate layer
coating
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CN1305132C (zh
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李圭汉
李尚勋
姜圣日
朴世哲
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Hanwha Aerospace Co Ltd
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Abstract

一种半导体封装的引线框架及其制造方法。引线框架的制造中,在金属衬底上用镍(Ni)或Ni合金形成保护层。之后,在保护层上用钯(Pd)或Pd合金形成中间层。之后,在中间层表面上交替电镀Pd和Au(金),形成含Pd和Au颗粒的最外层。

Description

引线框架及其电镀方法
本发明涉及用于半导体封装的引线框架和引线框架的电镀方法，特别涉及在金属衬底上有改进的最外镀层的预镀引线框架和引线框架的电镀方法。
引线框架与半导体芯片一起构成半导体封装，在封装中，除用于把芯片连接到外部电路之外、还用于支承半导体芯片。
图1示出引线框架的一个实例。如图1所示，引线框架10包括焊盘11，内引线12和外引线13。引线框架10通常用冲压或腐蚀法制成。
图2示出半导体封装的一个实例。如图2所示，安装在焊盘11上的半导体芯片15用焊线连接到内引线12。外引线13电连接到外部电路。用树脂14模塑芯片15和内引线12，以完成半导体封装16。
这种半导体封装的制造中，为了改进芯片15与内引线12之间的焊线连接性能和改善焊盘11的特性，用例如银(Ag)电镀焊盘11的边缘和内引线12。而且，为了改善半导体封装安装到印刷电路板(PCB)上的可焊性，在外引线13的预定区域上淀积含锡(Sn)和铅(Pb)的焊料。但是，在用树脂模塑后用湿式方法进行电镀和焊接，使可靠性问题增多。
为解决该问题，已提出用预电镀的引线框架。按预电镀法，在半导体封装工序之前，在引线框架上用具有良好焊料浸润性的材料形成电镀层。
图3示出用常规预电镀方法制成的引线框架的实例。图3所示常规引线框架20是日本专利1501732公开的，它包括依次形成在用铜(Cu)或铜合金制成的金属衬底21上的用作中间层的镍(Ni)镀层22和用作最外层的钯(Pd)镀层23。
引线框架20中，Ni镀层22防止金属衬底21的Cu或Fe向上扩散到引线框架的表面，而在框架表面上产生铜氧化物或铜硫化物。而且，可焊性好的材料Pd构成的最外镀层23对镍镀层22的表面有保护功能。
引线框架20的制造中，电镀前进行预处理。但是，在金属衬底21的表面的缺陷处，由于缺陷区域的能级比无缺陷的其它区域的能级高，因此，用于形成Ni镀层的Ni电镀速度在缺陷区中比其它无缺陷区中要快，由于与其它区域的粘接性降低而造成镀层表面粗糙。特别是，在缺陷区上形成的Ni镀层表面上电镀Pd时，在镀Pd过程中电解液中产生的大量氢气泡引入Pd镀层中。这是因为Pd的淀积势能与氢的淀积势能相同。而且，由于存在氢气泡引起的穿孔使Pd镀层更容易产生缺陷。Pd镀层中的这些缺陷使Ni镀层氧化，因而损坏了焊线和可焊性。除这些缺陷之外，半导体制造中用的热处理也会造成引线框架中的层间扩散，从而造成焊接缺陷。而且，热处理会使Pd最外镀层表面氧化，使钯固有的良好可焊性损坏。
为克服上述缺陷，已提出了如图4所示的用预电镀法制造的引线框架的其它实例。与图2所示的引线框架20相比，图4所示引线框架20＇还包括在Pd镀层23上形成的金(Au)薄膜24。据说，用抗氧化性好的金(Au)镀覆Pd镀层，以防止有更高可焊性的Pd镀层23氧化。
如上所述，在Pd镀层上镀Au以防止由半导体制造中用的热处理造成的Pd镀层氧化。由此提高在PCB上完成半导体封装用的安装中的可焊性。除镀Au之外，金镀层的外形对提高镀Au的效果致关重要。但是，现有的镀Au方法不足以在Pd镀层上形成均匀的Au镀层。通常Au镀层的厚度为0．3毫英寸，以防止Pd氧化。遗憾的是，这种厚的Au镀层对半导体组件用的EMC树脂模塑会带来负面影响，特别是，应考虑前引线框架的Au最外镀层与树塑树脂之间的粘接性时。用EMC树脂模塑中，EMC树脂对纯金属或合金的亲合力很小。而且，由于Au比Pd的抗氧化能力强。因此，EMC模塑壳对Au镀层的粘接力进一步减小，造成模塑壳脱落损坏。而且，这种Au镀层与树脂之间的差的粘接力造成产品可靠性降低。
另一方面这种厚的Au镀层对于制造成本也是不利的。而且作为Pd的抗氧化层而形成的Au镀层使芯片与模具之间的粘接力也相应地降低。与常规的引线框架相比，Au镀层在焊接时能提高焊料的浸润性。但是，在焊接工艺中由于Au镀层与锡(Sn)之间相互反应，在PCB上安装之后由于外部冲击而使Au镀层容易破损。
为解决这些问题，已提出进行局部电镀。也就是说，只在引线外部镀Au。但是，局部电镀需要电镀用的附加掩模，这就使生产成品增加，明显降低了生产率。为此，在钯(Pd)中间镀层上形成Au镀层以防止Pd镀层氧化而又不会增加成本。
美国专利5767574号披露了一种能克服上述缺陷的引线框架，它包括依次在金属衬底上形成的Ni合金镀层，Pd电解沉积镀层和Pd合金层。这里最外层的Pd合金镀层由Pd和Au构成。用含Au的最外镀层能克服Pd氧化和用Au而造成的高成本缺陷。限制在最外层中用Au能提高半导体封装中与树脂的粘接力，并使PCB上安装后的破损可能性降至最小。但是，在以Pd为基的最外镀层中镀Au不能有效地防止氢气泡渗入最外层。由于最外层中存在因氢气泡造成的穿孔，因而损坏了对位于下面的Pd镀层的保护功能。而且，由于存在穿孔，在热处理中还会使焊线连接强度和引线框架的可焊性降低。
为克服上述缺陷，本发明的目的是提供一种引线框架及其制造方法。以提高可焊性，焊线连接强度，半导体封装中与树脂的粘接力和对Pd镀层的保护作用。
用按本发明的引线框架制造方法能实现上述目的，方法包括：金属衬底上用镍(Ni)或Ni合金形成保护层；保护层上用钯(Pd)或Pd合金形成中间层；中间层表面上用Pd和(Au)交替电镀至少一次，形成含Pd和Au颗粒的最外层。
最好是交替电镀形成最外层，无论Pd或Au均能首先镀在电间层上。
最外镀层的形成中，用脉冲电流在中间层的核心位置上首先大致地镀Pd，之后再聚积金以填充聚积的Pd颗粒之间的空隙。由于Au的淀积势能小于Pd的淀积势能。因此，在Pd颗粒之间容易聚积Au颗粒。
按本发明的另一方案，提供一种用于半导体封装的引线框架，包括：金属衬底上用Ni或Ni合金形成的保护层；保护层上用Pd形成的中间层；Pd中间层上用Pd和Au的形成的最外层。
另一实施例中，本发明提供用于半导体封装的引线框架，包括：金属衬底上用Ni或Ni合金形成的保护层；保护层上用钯(Pd)和金(Au)形成的最外层。
Pd或Pd合金的中间层和Au或Au合金的电镀区的形成中，加高脉冲电流，用溅射或气相淀积法。
通过结合附图对最佳实施例的详细说明，便能更好理解本发明的上述发明目的和优点。
图1是普通引线框架的平面图；
图2是半导体封装的部分分解透视图；
图3和4是常规引线框架的实例的截面图；
图5是按本发明的引线框架的实施例的截面图；
图6是按本发明的引线框架的另一实施例的截面图；
图7是按本发明的引线框架的另一实施例的截面图；
图8是图7所示引线框架的局部放大的透视图；
图9A至9C是说明按本发明的引线框架制造的截面图；
图10是表示按本发明的引线框架的与树脂的粘接力和对比例的与树脂粘接力的曲线图；
图11是表示按本发明的引线框架的可焊性和对比例的引线框架的可焊性曲线图。
如图5所示的用于半导体封装的引线框架实施例，引线框架包括用铜(Cu)，铜合金或铁-镍(Fe-Ni)合金构成的金属衬底31，金属衬底31上用Ni或Ni合金形成的保护层32。保护层32上用钯(Pd)或Pd合金形成的中间层33和在中间层33上形成的包含Pd和Au颗粒的最外层34。
图6示出按本发明的引线框架的另一实施例。图6中的引线框架40包括依次叠置于金属衬底上41上用Ni或Ni合金形成的保护层42和最外层43。最外层43中存在如图5所示引线框架中存在的Pd和Au颗粒。
上述实施例中，最外层的金属不限于Pd和Au。例如，可用银(Ag)代替Au。
图7示出按本发明的引线框架的另一实施例。如图7所示，引线框架50有在金属衬底51上用Ni或Ni合金形成的保护层52。保护层52上用Pd或Pd合金形成的中间层53；中间层53上用Au或Au合金局部形成的厚度薄的电镀层54。从图8中能看到中间层53上的电镀区54的位置。这里，电镀区的厚度为12个分子的高度。因此，如图8所示，电镀区54使中间层53局部露出或占据。电镀区54用的Au合金最好是Au-Pd或Au-Ag合金。
图9A至9C说明了按本发明的引线框架制造的一个实施例。首先，制备用Cu、Cu合金或Fe合金制成的金属衬底31，如图9A所示。在金属衬底31用Ni或Ni合金形成保护层32。之后，如图9B所示，在保护层32上用Pd或Pu合金形成中间层33。保护层32和中间层33可用加脉冲电流电镀制成、或用溅射或真空淀积制成。之后，在中间层33上同时存在Pd和Au颗粒处形成最外层34，制成引线框架30(见图9C)。用加脉冲电流电镀形成最外层34。换句话说，调节电流密度和电镀时间，只在保护层32上的核心位置聚积钯在中间层33表面上生成钯点。
接着Au聚积，以填充在中间层33上淀积的Pd颗粒之间的空隙中。由于Au淀积势能低于Pd淀积势能，因而在Pd颗粒之间容易电镀Au。完成镀Au之后，再聚积的Pd再填充Au和Pd之间可能存在的孔位置或微小裂缝，造成引线框架不稳定，在中间层33上生成最外层34。
如图8所示，电镀Au或Au合金而在中间层53上形成分散的“电镀区”54，以此来代替在中间层上形成最外“层”。
如上所述，用电镀法交替聚积Pd和Au，能形成按本发明的引线框架的最外层34。形成最外层的电镀过程中加脉冲电压。脉冲电流的矩形波可以是由预定间隔隔开的一串正脉冲。电流波形也可以在正负脉冲之间交替。也可以是正负脉冲之间的预定间隔。而且，电流波形可以在正负脉冲之间交替，其中，用小脉冲串来调制每个正负脉冲。
而且，为改善用Pd或Pd合金制成的中间层53的均匀性。用加高脉冲制成图8所示的引线框架50。而且，用加高脉冲，溅射或淀积法也能在中间层53表面上用Au或Au合金形成电镀区54。
用按本发明的引线框架的半导体封装制造中，用中间层33能防止从用Ni或Ni合金制成的保护层32中扩散出的Ni，在热处理过程中向引线框架的最外层34扩散。因此能避免引线框架被氧化或腐蚀。
最外层34在中间层33上或在具有包含Pd和Au颗粒的电镀区54和有良好焊线连接特性的中间层53的表面上。Au的存在还使经氧化的Pd占据的最外层的面积减小。由此能消除常有的缺陷。此外，由于Pd氧化出现在焊线连接之后，因此使最外层34与模塑树脂之间的粘接力提高。用Pd和Au交替电镀也使中间层33的保护功能提高，消除了由氢气泡造成的穿孔。与只含Au的最外层相比，最外层34由Pd和Au的相互作用提高了可焊性和焊线的连接性能。而且，由于Au或Au合金能形成尽可能的薄。因此，而减少Au的消耗量，降低了制造成本。
通过以下实例能更详细的完整地了解按本发明的引线框架的作用。
例1
按本发明的引线框架，形成厚0．2微英寸的Pd中间层，在Pd中间层上形成含Pd和Au颗粒的最外层。而且，制成在Pd中间层上有Au最外层的引线框架作为对比例1，制成Pd镀层上无最外层的引线框架作为对比例2，制成在Pd中间层上有Pd-Au镀层的引线框架作为对比例3。
引线框架在250℃烘烤5分钟并在270℃处理1小时，进行可焊性试验。引线框架的引线折弯之后，引线框架放在175℃下处理1小时，随后在95℃的蒸汽中老化8小时。用直径为1mil的金丝进行焊线连接试验。给安装在焊盘上的芯片和给内引线加焊接功率90毫瓦(mW)和焊接力100毫牛顿(mN)。给焊盘上的芯片和内引线分别用的焊接时间为15毫秒(msec)和20毫秒(msec)。之后，测试跨接在芯片和内引线上的金丝的张力。
可焊性和焊线连接试验的结果列于表1中。
表1
项目 对比例1 对比例2 对比例3 本发明
层号 3L 2L 3L 2．5L
可焊性(％) 20-30 20-30 20-30 90-95
焊线连接强度(gf) 3．36 2．38 3．75 5．83
从表1可看出，按本发明的引线框架的可焊性和焊线连接强度均提高了。
例2
按本发明的引线框架，形成厚度为0．2亳英寸的Pd中间层。在厚0．2毫英寸的Pd中间层上形成含Pd和Au的最外层。制成有在厚0．8毫英寸的Pd中间层上有Au最外层的引线框架作为对比例1，制成有在厚0．2毫英寸的Pd镀层上无最外层的引线框架作为对比例2。
引线框架在360℃烘烤1分钟，进行可焊性试验。用直径为1mil(密耳)的金丝进行焊线连接试验。给安装在焊盘上的芯片和给内引线加焊接功率90mW和焊接力100mN。焊盘上的芯片和内引线的焊接时间分别为15msec和20msec。之后，测试跨接在芯片和内引线上的Au丝的张力。
可焊性和焊线连接试验的结果列于表2中。
表2
项目 对比例1 对比例2 本发明
层号 3L 2L 2.5L
可焊性(％) 85-95 60-80 100
焊线最小连接强度(gf) 2.65 0.91 7.03
焊线最大连接强度(gf) 7.58 6.86 9.64
焊线平均连接强度(gf) 4.73 3.55 8.81
从表2能看出，按本发明的引线框架的可焊性和焊线的连接强度均提高了。
例3
对例1中制成的引线框架测试最外层与树脂之间的粘接力。用两种市售的可热固化的树脂(SL7300和T16BC)模塑引线框架。结果如图10所示。
如图10所示，Pd中间层上有Pd-Au最外层的引线框架，对两种树脂而言，其最外层与树脂之间的粘接力最大。
例4
按本发明的引线框架，在Cu制成的金属衬底上形成30微英寸厚的Ni保护层。并在Ni保护层上形成0．8微英寸厚的Pd中间层。接着，形成0．03微英寸厚的分散在Pd中间层上的用Au或Au合金形成的电镀区。
在普通的PPF引线框架上用Au或Au合金形成厚0．3微英寸的电镀区作对比例1。制成有30微英寸厚的Ni保护层和1．0微英寸厚的Pd中间层而没有电镀区的引线框架作对比例2。
引线框架在炉内在275℃下处理1小时，而进行可焊性试验。引线框架的引线折弯之后，引线框架放在175℃的温度下处理2小时，之后，在蒸汽中在95℃下老化8小时。用直径为1mil的金丝进行焊线连接试验。给安装在焊盘上的芯片和引线框架的内引线加焊接功率90mW和焊接力100mN。焊盘上的芯片和内引线的焊接时间分别是15msec和20msec，焊接温度是215℃。之后，测试跨接在芯片和内引线上的金丝的张力。
可焊性试验中，引线架的外引线浸入R焊剂中，在245℃下保持5秒钟，然后，从焊剂中取出。用百分数表示带有焊剂的外引线面积占外引线总面积之量。
可焊性和焊线连接试验的结果示于图11中。
图11中，剖面线表示可焊性试验结果，曲线表示焊线连接试验结果。对比例1的可焊性和焊线连接强度分别是60％和2．69gf。对比例2的可焊性和焊线连接强度分别是80％和2．69gf。与对比例1和2的可焊性和焊线连接强度相比，按本发明的引线框架的可焊性和焊线连接强度均有提高，分别为100％和5．91gf。
例5
随着引线框架的引线节距和芯片尺寸的减小，焊线用的细丝(capillary)尺寸也减小，为与该趋势保持一致，测试按本发明的引线框架的焊线连接强度所用的焊接功率和焊接力也减小了。
测试具有1．0微英寸厚的在Pd中间层上的电镀区的按本发明的引线框架。测试具有1．2微英寸厚的pd层作散列层的对比例的引线框架。用直径为80微米的细丝和直径为0．8mil的金丝进行焊线连接试验。
用60mW的焊接功率，60mN的焊接力在200℃下经过15msec焊接装在引线框架的焊盘上的芯片，应用80mW焊接功率。80mN的焊接力在220℃下经20msec进行引线框架的内引线上的焊接。
焊线连接试验的结果列于表3中。
表3
项目 本发明 对比例
焊线最小连接强度(gf) 3.38 1.75
焊线平均连接强度(gf) 4.57 3.59
焊线最大连接强度(gf) 6.75 5.01
如表3所示，与焊线连接强度是1．75gf的对比例相比，按本发明的引线框架的最小连接强度提高到约3gf。
从焊线连接强度、可焊性和与树脂粘接性等方面看，按本发明的有多个电镀层的引线框架具有Au和Pd镀层的优点。而且提高了这些性能，按本发明的引线框架的制造成本也能降低。
尽管用本发明的优选实施例具体展示和说明了本发明。但是，本行业的普通技术人员应了解，对本发明的形式和细节上的各种改变并不能脱离由权利要求书所确定的本发明的精神和范围。

Claims (7)

1．一种半导体封装的引线框架的制造方法，包括：
在金属衬底上用镍(Ni)或Ni合金形成保护层；
在保护层上用钯(Pd)或Pd合金形成中间层；
用Pd和金(Au)交替电镀中间层表面至少一次，形成包含Pd和Au颗粒的最外层。
2．按权利要求1的方法，其中，在交替电镀形成最外层的步骤中，可以首先在中间层上电镀Pd或Au。
3．一种半导体封装的引线框架，包括：
在金属衬底上用镍(Ni)或Ni合金形成的保护层；
保护层上用钯(Pd)形成的中间层；
在Pd中间层上用Pd和Au形成的最外层。
4．一种半导体封装的引线框架，包括：
在金属衬底上用镍(Ni)或Ni合金形成的保护层；和
在保护层上用Pd和Au形成的最外层。
5．一种半导体封装的引线框架，包括：
在金属衬底上用Ni或Ni合金形成的保护层；
在保护层上用钯(Pd)形成的中间层；和
在中间层上用金(Au)或金合金形成的电镀区，中间层的表面部分露出。
6．按权利要求5的引线框架，其中，电镀区的厚度在0．03微英寸之下。
7．按权利要求5的引线框架，其中，Au合金是Au-Pd合金或Au-Ag(银)合金。
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