CN1260817C - 含有绝缘栅场效应晶体管的半导体器件及其制造方法 - Google Patents

含有绝缘栅场效应晶体管的半导体器件及其制造方法 Download PDF

Info

Publication number
CN1260817C
CN1260817C CNB2003101038258A CN200310103825A CN1260817C CN 1260817 C CN1260817 C CN 1260817C CN B2003101038258 A CNB2003101038258 A CN B2003101038258A CN 200310103825 A CN200310103825 A CN 200310103825A CN 1260817 C CN1260817 C CN 1260817C
Authority
CN
China
Prior art keywords
effect transistor
film
metal
metal silicide
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2003101038258A
Other languages
English (en)
Chinese (zh)
Other versions
CN1499635A (zh
Inventor
松尾浩司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CN1499635A publication Critical patent/CN1499635A/zh
Application granted granted Critical
Publication of CN1260817C publication Critical patent/CN1260817C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
CNB2003101038258A 2002-11-06 2003-11-06 含有绝缘栅场效应晶体管的半导体器件及其制造方法 Expired - Fee Related CN1260817C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002322094A JP4197607B2 (ja) 2002-11-06 2002-11-06 絶縁ゲート型電界効果トランジスタを含む半導体装置の製造方法
JP322094/2002 2002-11-06

Publications (2)

Publication Number Publication Date
CN1499635A CN1499635A (zh) 2004-05-26
CN1260817C true CN1260817C (zh) 2006-06-21

Family

ID=32171327

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2003101038258A Expired - Fee Related CN1260817C (zh) 2002-11-06 2003-11-06 含有绝缘栅场效应晶体管的半导体器件及其制造方法

Country Status (4)

Country Link
US (2) US6967379B2 (enExample)
JP (1) JP4197607B2 (enExample)
CN (1) CN1260817C (enExample)
TW (1) TWI241689B (enExample)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3974507B2 (ja) * 2001-12-27 2007-09-12 株式会社東芝 半導体装置の製造方法
US6849509B2 (en) * 2002-12-09 2005-02-01 Intel Corporation Methods of forming a multilayer stack alloy for work function engineering
DE10335101B4 (de) * 2003-07-31 2010-02-04 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer Polysiliziumleitung mit einem Metallsilizidgebiet, das eine Linienbreitenreduzierung ermöglicht
KR100597462B1 (ko) * 2003-12-31 2006-07-05 동부일렉트로닉스 주식회사 반도체 소자의 트랜지스터 제조방법
US7528024B2 (en) * 2004-05-24 2009-05-05 Texas Instruments Incorporated Dual work function metal gate integration in semiconductor devices
US20050272191A1 (en) * 2004-06-03 2005-12-08 Uday Shah Replacement gate process for making a semiconductor device that includes a metal gate electrode
WO2006001271A1 (ja) * 2004-06-23 2006-01-05 Nec Corporation 半導体装置及びその製造方法
JP2006013270A (ja) * 2004-06-29 2006-01-12 Renesas Technology Corp 半導体装置およびその製造方法
US7179700B2 (en) * 2004-07-21 2007-02-20 Freescale Semiconductor, Inc. Semiconductor device with low resistance contacts
US7138323B2 (en) * 2004-07-28 2006-11-21 Intel Corporation Planarizing a semiconductor structure to form replacement metal gates
JP4163164B2 (ja) 2004-09-07 2008-10-08 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2006108602A (ja) * 2004-09-10 2006-04-20 Toshiba Corp 半導体装置及びその製造方法
KR100568451B1 (ko) * 2004-09-14 2006-04-07 삼성전자주식회사 듀얼 게이트를 갖는 시모스 반도체소자의 제조방법
US7126199B2 (en) * 2004-09-27 2006-10-24 Intel Corporation Multilayer metal gate electrode
US7122472B2 (en) * 2004-12-02 2006-10-17 International Business Machines Corporation Method for forming self-aligned dual fully silicided gates in CMOS devices
JP2006165068A (ja) * 2004-12-02 2006-06-22 Sony Corp 半導体装置およびその製造方法
US7064025B1 (en) * 2004-12-02 2006-06-20 International Business Machines Corporation Method for forming self-aligned dual salicide in CMOS technologies
US7381608B2 (en) * 2004-12-07 2008-06-03 Intel Corporation Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode
US20060163670A1 (en) * 2005-01-27 2006-07-27 International Business Machines Corporation Dual silicide process to improve device performance
KR100719342B1 (ko) 2005-02-01 2007-05-17 삼성전자주식회사 듀얼 게이트 전극을 갖는 반도체 소자 및 그 형성 방법
JP2006245417A (ja) * 2005-03-04 2006-09-14 Toshiba Corp 半導体装置およびその製造方法
JP2006245461A (ja) * 2005-03-07 2006-09-14 Sony Corp 半導体装置およびその製造方法
US7176537B2 (en) * 2005-05-23 2007-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. High performance CMOS with metal-gate and Schottky source/drain
JP2006344836A (ja) * 2005-06-09 2006-12-21 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2007005721A (ja) * 2005-06-27 2007-01-11 Toshiba Corp 半導体装置およびその製造方法
CN100446184C (zh) * 2005-06-30 2008-12-24 中芯国际集成电路制造(上海)有限公司 多晶硅栅极掺杂方法
JP2007048926A (ja) * 2005-08-10 2007-02-22 Tokyo Electron Ltd Ｗ系膜の成膜方法、ゲート電極の形成方法、半導体装置の製造方法およびコンピュータ読取可能な記憶媒体
US7531404B2 (en) * 2005-08-30 2009-05-12 Intel Corporation Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layer
JP4784734B2 (ja) * 2005-09-12 2011-10-05 日本電気株式会社 半導体装置及びその製造方法
JP2007123527A (ja) * 2005-10-27 2007-05-17 Toshiba Corp 半導体装置の製造方法
JP2007157744A (ja) * 2005-11-30 2007-06-21 Toshiba Corp 半導体装置および半導体装置の製造方法
JP4557879B2 (ja) * 2005-12-09 2010-10-06 株式会社東芝 半導体装置及びその製造方法
JP2007251030A (ja) * 2006-03-17 2007-09-27 Renesas Technology Corp 半導体装置の製造方法および半導体装置
WO2007138692A1 (ja) * 2006-05-31 2007-12-06 Fujitsu Limited 半導体装置及びその製造方法
JP2008060538A (ja) * 2006-07-31 2008-03-13 Toshiba Corp 半導体装置およびその製造方法
JP2008066562A (ja) * 2006-09-08 2008-03-21 Toshiba Corp 半導体装置およびその製造方法
JP5086665B2 (ja) * 2007-03-02 2012-11-28 株式会社東芝 半導体装置およびその製造方法
JP4458129B2 (ja) * 2007-08-09 2010-04-28 ソニー株式会社 半導体装置およびその製造方法
JP5280670B2 (ja) * 2007-12-07 2013-09-04 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2009152394A (ja) * 2007-12-20 2009-07-09 Toshiba Corp 半導体装置及びその製造方法
JP5410059B2 (ja) * 2008-10-02 2014-02-05 ルネサスエレクトロニクス株式会社 半導体装置ならびに半導体装置の製造方法
US8283734B2 (en) * 2010-04-09 2012-10-09 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-threshold voltage device and method of making same
CN101937918A (zh) * 2010-07-08 2011-01-05 芯巧科技股份有限公司 半导体结构及其制作方法
US8669155B2 (en) * 2010-09-03 2014-03-11 Institute of Microelectronics, Chinese Academy of Sciences Hybrid channel semiconductor device and method for forming the same
US8610280B2 (en) * 2011-09-16 2013-12-17 Micron Technology, Inc. Platinum-containing constructions, and methods of forming platinum-containing constructions
JP6169222B2 (ja) * 2012-01-23 2017-07-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9105497B2 (en) * 2013-09-04 2015-08-11 Globalfoundries Inc. Methods of forming gate structures for transistor devices for CMOS applications
JP6257525B2 (ja) * 2014-01-27 2018-01-10 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3285934B2 (ja) * 1991-07-16 2002-05-27 株式会社東芝 半導体装置の製造方法
JPH08153804A (ja) 1994-09-28 1996-06-11 Sony Corp ゲート電極の形成方法
JPH08130216A (ja) 1994-10-31 1996-05-21 Sony Corp 半導体装置およびその製造方法
US6261887B1 (en) 1997-08-28 2001-07-17 Texas Instruments Incorporated Transistors with independently formed gate structures and method
US6130123A (en) * 1998-06-30 2000-10-10 Intel Corporation Method for making a complementary metal gate electrode technology
US6737716B1 (en) 1999-01-29 2004-05-18 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
JP3264264B2 (ja) 1999-03-01 2002-03-11 日本電気株式会社 相補型集積回路とその製造方法
JP4237332B2 (ja) 1999-04-30 2009-03-11 株式会社東芝 半導体装置の製造方法
JP3613113B2 (ja) 2000-01-21 2005-01-26 日本電気株式会社 半導体装置およびその製造方法
JP3906020B2 (ja) 2000-09-27 2007-04-18 株式会社東芝 半導体装置及びその製造方法
US6475908B1 (en) * 2001-10-18 2002-11-05 Chartered Semiconductor Manufacturing Ltd. Dual metal gate process: metals and their silicides
JP3974507B2 (ja) 2001-12-27 2007-09-12 株式会社東芝 半導体装置の製造方法
JP2003282875A (ja) 2002-03-27 2003-10-03 Toshiba Corp 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
US20060011989A1 (en) 2006-01-19
US6967379B2 (en) 2005-11-22
US7179702B2 (en) 2007-02-20
TWI241689B (en) 2005-10-11
TW200416960A (en) 2004-09-01
CN1499635A (zh) 2004-05-26
JP4197607B2 (ja) 2008-12-17
JP2004158593A (ja) 2004-06-03
US20040084734A1 (en) 2004-05-06

Similar Documents

Publication Publication Date Title
CN1260817C (zh) 含有绝缘栅场效应晶体管的半导体器件及其制造方法
CN1160773C (zh) 半导体器件的制造方法
TWI419264B (zh) 製造半導體裝置的方法
CN1294648C (zh) 制造多重阈值的方法和工艺
CN1270380C (zh) 半导体器件及其制造方法
CN1190851C (zh) 半导体器件及其制造方法
CN1306587C (zh) 具有浅沟槽隔离的半导体器件及其制造方法
CN1107344C (zh) 利用有选择的外延生长方法的半导体器件制造方法
CN1282230C (zh) 半导体装置的制造方法及半导体装置
CN1992206A (zh) 形成半导体元件的方法
CN1943027A (zh) Cmos硅化物金属栅集成
CN1649112A (zh) 镍－自对准硅化物工艺和利用该工艺制造半导体器件的方法
CN1870295A (zh) 半导体器件及其制造方法
TW201011817A (en) A novel solution for polymer and capping layer removing with wet dipping in hk metal gate etching process
CN1805153A (zh) 半导体器件及其制造方法
CN1627502A (zh) 制造具有硅化电极的半导体器件的方法
CN1499646A (zh) 半导体器件和半导体器件的制造方法
CN1797769A (zh) 具有多栅电介质层的半导体器件及其制造方法
CN1875475A (zh) 形成具有不同高度的升高的漏极与源极区域的晶体管的先进方法
CN1613151A (zh) 半导体器件及其制造方法
CN1716607A (zh) 半导体器件及其制造方法
CN1790740A (zh) 半导体器件及用于形成栅极结构的方法
CN1738049A (zh) 微电子元件及其制造方法
CN1301556C (zh) Cmos组件及其制造方法
CN1770450A (zh) 半导体装置及其制造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20060621

Termination date: 20131106