CN1154170C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN1154170C
CN1154170C CNB961203277A CN96120327A CN1154170C CN 1154170 C CN1154170 C CN 1154170C CN B961203277 A CNB961203277 A CN B961203277A CN 96120327 A CN96120327 A CN 96120327A CN 1154170 C CN1154170 C CN 1154170C
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CN
China
Prior art keywords
film
barrier film
contact hole
barrier
trench
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB961203277A
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English (en)
Chinese (zh)
Other versions
CN1152191A (zh
Inventor
猪原正弘
柴田英毅
松能正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CN1152191A publication Critical patent/CN1152191A/zh
Application granted granted Critical
Publication of CN1154170C publication Critical patent/CN1154170C/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/086—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving buried masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
CNB961203277A 1995-09-29 1996-09-28 半导体器件及其制造方法 Expired - Fee Related CN1154170C (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP253736/95 1995-09-29
JP25373695 1995-09-29
JP253736/1995 1995-09-29
JP212332/1996 1996-08-12
JP212332/96 1996-08-12
JP8212332A JPH09153545A (ja) 1995-09-29 1996-08-12 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CNB2003101143767A Division CN1266760C (zh) 1995-09-29 1996-09-28 半导体器件及其制造方法

Publications (2)

Publication Number Publication Date
CN1152191A CN1152191A (zh) 1997-06-18
CN1154170C true CN1154170C (zh) 2004-06-16

Family

ID=26519157

Family Applications (2)

Application Number Title Priority Date Filing Date
CNB961203277A Expired - Fee Related CN1154170C (zh) 1995-09-29 1996-09-28 半导体器件及其制造方法
CNB2003101143767A Expired - Fee Related CN1266760C (zh) 1995-09-29 1996-09-28 半导体器件及其制造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CNB2003101143767A Expired - Fee Related CN1266760C (zh) 1995-09-29 1996-09-28 半导体器件及其制造方法

Country Status (8)

Country Link
US (2) US5976972A (enExample)
EP (1) EP0766303B1 (enExample)
JP (1) JPH09153545A (enExample)
KR (1) KR100253852B1 (enExample)
CN (2) CN1154170C (enExample)
DE (1) DE69625975T2 (enExample)
MY (1) MY113878A (enExample)
TW (1) TW349262B (enExample)

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JP3305251B2 (ja) * 1998-02-26 2002-07-22 松下電器産業株式会社 配線構造体の形成方法
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US6057230A (en) * 1998-09-17 2000-05-02 Taiwan Semiconductor Manufacturing Company, Ltd. Dry etching procedure and recipe for patterning of thin film copper layers
JP4074014B2 (ja) * 1998-10-27 2008-04-09 株式会社東芝 半導体装置及びその製造方法
JP3312604B2 (ja) * 1998-11-06 2002-08-12 日本電気株式会社 半導体装置の製造方法
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US6703710B1 (en) * 2002-08-15 2004-03-09 National Semiconductor Corporation Dual damascene metal trace with reduced RF impedance resulting from the skin effect
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JP5192779B2 (ja) * 2007-11-02 2013-05-08 株式会社コナミデジタルエンタテインメント ゲーム装置、ゲーム装置の制御方法及びプログラム
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CN112820711A (zh) * 2019-11-15 2021-05-18 胡迪群 集成基板结构、重布线结构及其制造方法
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Also Published As

Publication number Publication date
EP0766303A3 (enExample) 1997-04-23
EP0766303B1 (en) 2003-01-29
US5976972A (en) 1999-11-02
US6163067A (en) 2000-12-19
KR970018091A (ko) 1997-04-30
EP0766303A2 (en) 1997-04-02
KR100253852B1 (ko) 2000-05-01
JPH09153545A (ja) 1997-06-10
DE69625975T2 (de) 2003-08-28
DE69625975D1 (de) 2003-03-06
TW349262B (en) 1999-01-01
CN1501472A (zh) 2004-06-02
CN1152191A (zh) 1997-06-18
CN1266760C (zh) 2006-07-26
MY113878A (en) 2002-06-29

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