CN111817693B - 电源开关电路及电压选择电路 - Google Patents

电源开关电路及电压选择电路 Download PDF

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CN111817693B
CN111817693B CN202010270671.5A CN202010270671A CN111817693B CN 111817693 B CN111817693 B CN 111817693B CN 202010270671 A CN202010270671 A CN 202010270671A CN 111817693 B CN111817693 B CN 111817693B
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selection unit
main selection
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CN111817693A (zh
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张家福
黄智扬
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eMemory Technology Inc
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    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
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    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
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    • G11C11/165—Auxiliary circuits
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    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
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    • G11C11/165—Auxiliary circuits
    • G11C11/1673—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1697—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
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    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
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    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
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    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
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    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H03K19/018528—Interface arrangements of complementary type, e.g. CMOS with at least one differential stage
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    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
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    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
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    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
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    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
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Abstract

本发明公开了一种电压选择电路，电压选择电路包括主选择单元、第一再比较单元及第二再比较单元。主选择单元的第一电压端接收第一可变电压，主选择单元的第二电压端接收第二可变电压，主选择单元的输出端输出第一可变电压及第二可变电压中较大之一者以作为操作电压。第一再比较单元根据操作电压及第一可变电压中较大的一者调整操作电压。第二再比较单元根据操作电压及第二可变电压中较大的一者调整操作电压。

Description

电源开关电路及电压选择电路
技术领域
本发明是有关于一种电源开关电路，特别是一种能够减少漏电流的电源开关电路。
背景技术
由于电子电路的功能日益复杂，电子电路常需要不同的电压来执行不同的操作。举例来说，非挥发性内存电路除了需要使用系统电压来执行读取操作，也需要使用较高的电压来执行写入操作。在此情况下，常会利用电源开关电路来及时切换操作所需的电压。
在现有技术中，电源开关电路常设计成能够将最高的输入电压作为输出电压来输出。然而，用来执行写入操作的高电压常是由电荷泵所产生，而电荷泵在将电压提升至目标电位的过程则需要花费不少时间。因此，倘若在电荷泵的升压过程中，电源开关电路所接收到的输入电压刚好处在接近的电位，电源开关电路就会陷入不稳定的状态，并产生可观的漏电流。
发明内容
本发明的一实施例提供一种电源开关电路。电源开关电路包括输出端、电压选择电路、电压移位电路及晶体管。
输出端输出输出电压。电压选择电路包括主选择单元、第一再比较单元及第二再比较单元。主选择单元具有第一电压端、第二电压端及输出端，主选择单元的第一电压端接收第一可变电压，主选择单元的第二电压端接收第二可变电压，而主选择单元的输出端输出第一可变电压及第二可变电压中较大之一者以作为操作电压。第一再比较单元根据操作电压及第一可变电压中较大的一者调整操作电压。第二再比较单元根据操作电压及第二可变电压中较大的一者调整操作电压。
电压移位电路耦接于电压选择电路，电压移位电路根据第一输入信号输出控制信号。晶体管具有第一端、第二端及控制端，晶体管的第一端接收第一可变电压或第二可变电压，晶体管的第二端耦接于电源开关电路的输出端，而晶体管的控制端耦接于电压移位电路以接收控制信号。
本发明的另实施例提供一种电压选择电路。电压选择电路包括主选择单元、第一再比较单元及第二再比较单元。
主选择单元具有第一电压端、第二电压端及输出端，主选择单元的第一电压端接收第一可变电压，主选择单元的第二电压端接收第二可变电压，而主选择单元的输出端输出第一可变电压及第二可变电压中较大之一者以作为操作电压。第一再比较单元根据操作电压及第一可变电压中较大的一者调整操作电压。第二再比较单元根据操作电压及第二可变电压中较大的一者调整操作电压。
附图说明
图1是本发明一实施例的电源开关电路的示意图。
图2是本发明另一实施例的电源开关电路的示意图。
其中，附图标记说明如下：
100:电源开关电路
110、210:电压选择电路
120:电压移位电路
112、212:主选择单元
114、214:第一再比较单元
116、216:第二再比较单元
M1A:晶体管
OUT:输出端
P1A、P2A、P3A、P4A、P5A、P6A、P3B、P5B:P型晶体管
VV1:第一可变电压
VV2:第二可变电压
VOP:操作电压
Vout:输出电压
SIGIN1:输入信号
SIGctrl1:控制信号
具体实施方式
图1是本发明一实施例的电源开关电路100的示意图。电源开关电路100包括输出端OUT、电压选择电路110、电压移位电路120及晶体管M1A。
电压选择电路110可接收第一可变电压VV1及第二可变电压VV2，并且可以输出第一可变电压VV1及第二可变电压VV2中较大的一者以作为操作电压VOP。
电压选择电路110包括主选择单元112、第一再比较单元114及第二再比较单元116。主选择单元112具有第一电压端、第二电压端及输出端，主选择单元112的第一电压端可接收第一可变电压VV1，主选择单元112的第二电压端可接收第二可变电压VV2，而主选择单元112的输出端可输出第一可变电压VV1及第二可变电压VV2中较大的一者以作为操作电压VOP。
电压移位电路120可耦接至电压选择电路110，并可根据输入信号SIGIN1输出控制信号SIGctrl1。
在有些实施例中，晶体管M1A可以是P型晶体管。晶体管M1A具有第一端、第二端及控制端，晶体管M1A的第一端可接收第一可变电压VV1，晶体管M1A的第二端可耦接至电源开关电路100的输出端OUT，而晶体管M1A的控制端可耦接至电压移位电路120以接收控制信号SIGctrl1。在此情况下，电源开关电路100可以根据输入信号SIGIN1并透过其输出端OUT输出第一可变电压VV1以作为输出电压Vout。
举例来说，当欲利用电源开关电路100输出第一可变电压VV1以作为输出电压Vout时，输入信号SIGIN1可以处在第一参考电压VSS。在有些实施例中，第一参考电压VSS可以是系统中的地电压。在此情况下，电压移位电路120将会使控制信号SIGctrl1保持在第一参考电压VSS，使得晶体管M1A被导通以输出第一可变电压VV1以作为输出电压Vout。然而，当输入信号SIGIN1处在系统中的第二参考电压VDD时，电压移位电路120则会将控制信号SIG-ctrl1提升至操作电压VOP，使得晶体管M1A被截止。如此一来，电源开关电路100就不会将第一可变电压VV1输出以作为输出电压Vout。
再者，在有些实施例中，虽然主选择单元112可用以选择第一可变电压VV1及第二可变电压VV2中较大的一者来作为操作电压VOP输出，然而当第一可变电压VV1及第二可变电压VV2实质上相等时，主选择单元112就可能会变得不稳定。举例来说，第一可变电压VV1可以是由电荷泵产生的，而第二可变电压VV2可以是系统中既有的电压，例如但不限于相同于第二参考电压VDD。在此情况下，第二可变电压VV2在电荷泵开始产生第一可变电压VV1之前就会先达到稳态，此时第一可变电压VV1会小于第二可变电压VV2。然而，在电荷泵被致能后，第一可变电压VV1会逐渐升高而从小于第二可变电压VV2变成大于第二可变电压VV2。
在此情况下，在第一可变电压VV1的电压变化过程中，当第一可变电压VV1变成与第二可变电压VV2实质上相等时，操作电压VOP会比第一可变电压VV1还要小一个晶体管P1A的临界电压。因此，电压移位电路120将无法使控制信号SIGctrl1提升到足以将晶体管M1A有效截止的电压，进而产生漏电流。
为减少因操作电压VOP不稳定而造成的漏电流，第一再比较单元114及第二再比较单元116可用来调整操作电压VOP。第一再比较单元114可以根据操作电压VOP及第一可变电压VV1中较大的一者来调整操作电压VOP，而第二再比较单元116可以根据操作电压VOP及第二可变电压VV2中较大的一者来调整操作电压VOP。在此情况下，每当操作电压VOP在不稳定的状况下变成比第一可变电压VV1小或者比第二可变电压VV2小的时候，第一再比较单元114及第二再比较单元116便将可操作电压VOP调整至第一可变电压VV1或第二可变电压VV2，使得晶体管M1A能够被确实截止以减少漏电流产生。
在图1中，主选择单元112可包括P型晶体管P1A及P2A。P型晶体管P1A具有第一端、第二端及控制端，P型晶体管P1A的第一端可耦接至主选择单元112的第一电压端，P型晶体管P1A的第二端可耦接至主选择单元112的输出端，而P型晶体管P1A的控制端可耦接至主选择单元112的第二电压端。P型晶体管P2A具有第一端、第二端及控制端，P型晶体管P2A的第一端可耦接至主选择单元112的第二电压端，P型晶体管P2A的第二端可耦接至主选择单元112的输出端，而P型晶体管P2A的控制端可耦接至主选择单元112的第一电压端。
在此情况下，若第一可变电压VV1大于第二可变电压VV2，则P型晶体管P1A将会被导通，而P型晶体管P2A将会被截止。因此，主选择单元112将会输出第一可变电压VV1作为操作电压VOP。然而，若第一可变电压VV1小于第二可变电压VV2，则P型晶体管P1A将被截止，而P型晶体管P2A将被导通。因此，主选择单元112将会输出第二可变电压VV2作为操作电压VOP。
第一再比较单元114可包括P型晶体管P3A及P4A。P型晶体管P3A具有第一端、第二端及控制端，P型晶体管P3A的第一端可耦接至主选择单元112的第一电压端，P型晶体管P3A的第二端可耦接至主选择单元112的输出端，而P型晶体管P3A的控制端可耦接至主选择单元112的输出端。P型晶体管P4A具有第一端、第二端及控制端，P型晶体管P4A的第一端可耦接至主选择单元112的输出端，P型晶体管P4A的第二端可耦接至主选择单元112的输出端，而P型晶体管P3A的控制端可耦接至主选择单元112的第一电压端。
在此情况下，如果操作电压VOP小于第一可变电压VV1，则P型晶体管P3A将会被导通，而P型晶体管P4A将被截止。如此一来，第一再比较单元114就可以根据第一可变电压VV1来提升操作电压VOP。
相似地，第二再比较单元116可包括P型晶体管P5A及P6A。P型晶体管P5A具有第一端、第二端及控制端，P型晶体管P5A的第一端可耦接至主选择单元112的第二电压端，P型晶体管P5A的第二端可耦接至主选择单元112的输出端，而P型晶体管P5A的控制端可耦接至主选择单元112的输出端。P型晶体管P6A具有第一端、第二端及控制端，P型晶体管P6A的第一端可耦接至主选择单元112的输出端，P型晶体管P6A的第二端可耦接至主选择单元112的输出端，而P型晶体管P6A的控制端可耦接至主选择单元112的第二电压端。
在此情况下，如果操作电压VOP小于第二可变电压VV2，则P型晶体管P5A将会被导通，而P型晶体管P6A将被截止。如此一来，第二再比较单元116就可以根据第二可变电压VV2来提升操作电压VOP。
也就是说，透过再比较单元114及116，操作电压VOP可以保持在一个稳定的状态，且当第一可变电压VV1与第二可变电压VV2相等时，操作电压VOP也不会小于第一可变电压VV1或第二可变电压VV2。如此一来，就可以减少因为操作电压VOP不稳定所产生的漏电流。
再者，在有些实施例中，P型晶体管P1A、P2A、P3A、P4A、P5A及P6A的基体端可以耦接至主选择单元112的输出端以减少漏电流。由于P型晶体管P3A、P4A、P5A及P6A主要是用来提升操作电压VOP，而无须承受大电流的负载，因此P型晶体管P3A、P4A、P5A及P6A的尺寸可以比较小。
在此实施例中，晶体管M1A的第一端可接收第一可变电压VV1，而电源开关电路100可以通过输出端OUT来输出第一可变电压VV1以作为输出电压Vout。然而，在有些实施例中，晶体管M1A的第一端也可接收第二可变电压VV2，而电源开关电路100则可以通过输出端OUT来输出第二可变电压VV2以作为输出电压Vout。由于电压选择电路110可以稳定地输出第一可变电压VV1及第二可变电压VV2中较大的一者以作为操作电压VOP，因此仍然可以减少漏电流产生。再者，在有些实施例中，第二可变电压VV2也可以由电荷泵产生。
图2时本发明另一实施例的电压选择电路210的示意图。在有些实施例中，电压选择电路210可以应用在电源开关电路100并取代电压选择电路110。电压选择电路210及电压选择电路110具有相似的结构，并且可以根据相似的原理操作。然而，在电压选择电路210中，第一再比较单元214及第二再比较单元210皆可利用单一个P型晶体管来实作。
在图2中，第一再比较单元214可包括P型晶体管P3B。P型晶体管P3B具有第一端、第二端及控制端，P型晶体管P3B的第一端可耦接至主选择单元212的第一电压端以接收第一可变电压VV1，P型晶体管P3B的第二端可耦接至主选择单元212的输出端，而P型晶体管P3B的控制端可耦接至主选择单元212的输出端。在此情况下，若操作电压VOP小于第一可变电压VV1，则P型晶体管P3B将会被导通，而第一再比较单元214也将根据第一可变电压VV1来提升操作电压VOP。
此外，第二再比较单元216可包括P型晶体管P5B。P型晶体管P5B具有第一端、第二端及控制端，P型晶体管P5B的第一端可耦接至主选择单元212的第二电压端以接收第二可变电压VV2，P型晶体管P5B的第二端可耦接至主选择单元212的输出端，而P型晶体管P5B的控制端可耦接至主选择单元212的输出端。在此情况下，若操作电压VOP小于第二可变电压VV2，则P型晶体管P5B将会被导通，而第二再比较单元216也将根据第二可变电压VV2来提升操作电压VOP。
由于漏电流大多是在第一可变电压VV1与第二可变电压VV2相等，而操作电压VOP小于第一可变电压VV1及第二可变电压VV2时产生，因此再比较单元214及216可以利用P型晶体管P3B及P5B来调整操作电压VOP，而无须再比较单元114及116中的P型晶体管P4A及P6A。因此，选择电压电路210所需的电路面积可小于电压选择电路110所需的电路面积。
综上所述，本发明的实施例所提供的电源开关电路及电压选择电路可以透过再比较单元来稳定操作电压。如此一来，就可以减少因为操作电压不稳定而产生的漏电流。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包括在本发明的保护范围之内。

Claims (14)

1.一种电源开关电路，其特征在于，包括：
输出端，用以输出输出电压；
电压选择电路，包括：
主选择单元，具有用以接收第一可变电压的第一电压端，用以接收第二可变电压的第二电压端，及用以输出所述第一可变电压及所述第二可变电压中较大之一者以作为操作电压的输出端；
第一再比较单元，用以根据所述操作电压及所述第一可变电压中较大的一者调整所述操作电压；及
第二再比较单元，用以根据所述操作电压及所述第二可变电压中较大的一者调整所述操作电压；
电压移位电路，耦接于所述电压选择电路，及用以接收输入信号并根据所述输入信号输出控制信号；及
晶体管，具有用以接收所述第一可变电压或所述第二可变电压的第一端，耦接于所述电源开关电路的所述输出端的第二端，及耦接于所述电压移位电路以接收所述控制信号的控制端。
2.如权利要求1所述的电源开关电路，其特征在于：
所述第一可变电压是由电荷泵产生；及
在所述电荷泵被致能后，所述第一可变电压是由小于所述第二可变电压升高至大于所述第二可变电压。
3.如权利要求1所述的电源开关电路，其特征在于所述主选择单元包括：
第一P型晶体管，具有耦接于所述主选择单元的所述第一电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第二电压端的控制端；及
第二P型晶体管，具有耦接于所述主选择单元的所述第二电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第一电压端的控制端。
4.如权利要求1所述的电源开关电路，其特征在于所述第一再比较单元包括：
第三P型晶体管，具有耦接于所述主选择单元的所述第一电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述输出端的控制端。
5.如权利要求4所述的电源开关电路，其特征在于所述第一再比较单元另包括：
第四P型晶体管，具有耦接于所述主选择单元的所述输出端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第一电压端的控制端。
6.如权利要求1所述的电源开关电路，其特征在于所述第二再比较单元包括：
第五P型晶体管，具有耦接于所述主选择单元的所述第二电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述输出端的控制端。
7.如权利要求6所述的电源开关电路，其特征在于所述第二再比较单元另包括：
第六P型晶体管，具有耦接于所述主选择单元的所述输出端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第二电压端的控制端。
8.一种电压选择电路，其特征在于，包括：
主选择单元，具有用以接收第一可变电压的第一电压端，用以接收第二可变电压的第二电压端，及用以输出所述第一可变电压及所述第二可变电压中较大之一者以作为操作电压的输出端；
第一再比较单元，用以根据所述操作电压及所述第一可变电压中较大的一者调整所述操作电压；及
第二再比较单元，用以根据所述操作电压及所述第二可变电压中较大的一者调整所述操作电压。
9.如权利要求8所述的电压选择电路，其特征在于：
所述第一可变电压是由电荷泵产生；及
在所述电荷泵被致能后，所述第一可变电压是由小于所述第二可变电压逐渐升高至大于所述第二可变电压。
10.如权利要求8所述的电压选择电路，其特征在于所述主选择单元包括：
第一P型晶体管，具有耦接于所述主选择单元的所述第一电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第二电压端的控制端；及
第二P型晶体管，具有耦接于所述主选择单元的所述第二电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第一电压端的控制端。
11.如权利要求8所述的电压选择电路，其特征在于所述第一再比较单元包括：
第三P型晶体管，具有耦接于所述主选择单元的所述第一电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述输出端的控制端。
12.如权利要求11所述的电压选择电路，其特征在于所述第一再比较单元另包括：
第四P型晶体管，具有耦接于所述主选择单元的所述输出端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第一电压端的控制端。
13.如权利要求8所述的电压选择电路，其特征在于所述第二再比较单元包括：
第五P型晶体管，具有耦接于所述主选择单元的所述第二电压端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述输出端的控制端。
14.如权利要求13所述的电压选择电路，其特征在于所述第二再比较单元另包括：
第六P型晶体管，具有耦接于所述主选择单元的所述输出端的第一端，耦接于所述主选择单元的所述输出端的第二端，及耦接于所述主选择单元的所述第二电压端的控制端。
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