CN104051337A - 立体堆叠集成电路系统芯片封装的制造方法与测试方法 - Google Patents
立体堆叠集成电路系统芯片封装的制造方法与测试方法 Download PDFInfo
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Abstract
Description
Claims (29)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201410168052.XA CN104051337B (zh) | 2014-04-24 | 2014-04-24 | 立体堆叠集成电路系统芯片封装的制造方法与测试方法 |
US14/694,868 US9570429B2 (en) | 2014-04-24 | 2015-04-23 | Methods of fabrication and testing of three-dimensional stacked integrated circuit system-in-package |
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CN201410168052.XA CN104051337B (zh) | 2014-04-24 | 2014-04-24 | 立体堆叠集成电路系统芯片封装的制造方法与测试方法 |
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CN104051337A true CN104051337A (zh) | 2014-09-17 |
CN104051337B CN104051337B (zh) | 2017-02-15 |
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CN201410168052.XA Active CN104051337B (zh) | 2014-04-24 | 2014-04-24 | 立体堆叠集成电路系统芯片封装的制造方法与测试方法 |
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CN (1) | CN104051337B (zh) |
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