CN102157393B - 扇出高密度封装方法 - Google Patents

扇出高密度封装方法 Download PDF

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CN102157393B
CN102157393B CN2011100698363A CN201110069836A CN102157393B CN 102157393 B CN102157393 B CN 102157393B CN 2011100698363 A CN2011100698363 A CN 2011100698363A CN 201110069836 A CN201110069836 A CN 201110069836A CN 102157393 B CN102157393 B CN 102157393B
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CN102157393A (zh
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陶玉娟
石磊
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Tongfu Microelectronics Co Ltd
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Nantong Fujitsu Microelectronics Co Ltd
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Priority to PCT/CN2012/072766 priority patent/WO2012126375A1/en
Priority to US13/984,889 priority patent/US9040347B2/en
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Abstract

本发明涉及扇出高密度封装方法,包括步骤:提供载板,在载板上形成剥离膜,在剥离膜上形成保护层,在保护层中形成再布线金属层,在保护层上形成与再布线金属层导通的布线封装层,在布线封装层上形成倒装封装层,各组封装层之间通过布线层和焊料凸点实现相互间的电连接,去除载板及剥离膜,裸露出第一保护层中的再布线金属,在裸露的再布线金属上形成金属焊球。与现有技术相比,本发明请求保护的扇出高密度封装方法,可以形成包含整体系统功能而非单一的芯片功能的最终封装产品,降低了系统内电阻、电感以及芯片间的干扰因素。此外,可以形成更为复杂的多层互联结构,实现集成度更高的圆片系统级封装。

Description

扇出高密度封装方法
技术领域
本发明涉及半导体技术,尤其涉及一种扇出高密度封装方法。
背景技术
晶圆级封装(Wafer Level Packaging,WLP)技术是对整片晶圆进行封装测试后再切割得到单个成品芯片的技术,封装后的芯片尺寸与裸片完全一致。晶圆级芯片尺寸封装技术彻底颠覆了传统封装如陶瓷无引线芯片载具(Ceramic Leadless Chip Carrier)以及有机无引线芯片载具(Organic LeadlessChip Carrier)等模式,顺应了市场对微电子产品日益轻、小、短、薄化和低价化要求。经晶圆级芯片尺寸封装技术封装后的芯片尺寸达到了高度微型化,芯片成本随着芯片尺寸的减小和晶圆尺寸的增大而显著降低。晶圆级芯片尺寸封装技术是可以将IC设计、晶圆制造、封装测试、基板制造整合为一体的技术,是当前封装领域的热点和未来发展的趋势。
扇出晶圆封装是晶圆级封装的一种。例如,中国发明专利申请第200910031885.0号公开一种晶圆级扇出芯片封装方法,包括以下工艺步骤:在载体圆片表面依次覆盖剥离膜和薄膜介质层I,在薄膜介质层I上形成光刻图形开口I;在图形开口I及其表面实现与基板端连接之金属电极和再布线金属走线;在与基板端连接之金属电极表面、再布线金属走线表面以及薄膜介质层I的表面覆盖薄膜介质层II,并在薄膜介质层II上形成光刻图形开口II;在光刻图形开口II实现与芯片端连接之金属电极;将芯片倒装至与芯片端连接之金属电极后进行注塑封料层并固化,形成带有塑封料层的封装体;将载体圆片和剥离膜与带有塑封料层的封装体分离,形成塑封圆片;植球回流,形成焊球凸点;单片切割,形成最终的扇出芯片结构。
按照上述方法所封装制造的最终产品仅具有单一的芯片功能。如需实现完整的系统功能,需要在最终产品之外加上包含有各种电容、电感或电阻等的外围电路。此外,上述方法也不适用于具有复杂线路连接的多层封装结构的制造。
发明内容
本发明解决的技术问题是:如何实现具有多层结构的扇出高密度封装。
为解决上述技术问题,本发明提供扇出高密度封装方法,包括步骤:提供载板;在载板上形成剥离膜;
在剥离膜上形成第一保护层,并在第一保护层上形成设计的光刻图形开口;在第一保护层的表面及其光刻图形开口中形成再布线金属层;在第一保护层上形成带有部分暴露再布线金属层开口的第二保护层;
在第二保护层上形成至少一组布线封装层,形成所述布线封装层的步骤包括依次形成正贴装层、封料层和布线层,所述正贴装层包括带有焊盘的芯片,布线封装层透过布线层与再布线金属层导通;
在布线封装层上形成至少一组倒装封装层,形成倒装封装层的步骤包括依次形成倒贴装层、底部填充和封料层;其中各组封装层之间透过所述布线封装层的布线层和焊料凸点相互电连接,在各组布线封装层的封料层上形成有微通孔,所述微通孔穿透对应的封料层,将所述微通孔金属化填充,使对应的封料层中形成有第一纵向金属布线;在各封料层上形成有横向金属布线,与所述芯片的焊盘表面相连;在各布线封装层的封料层形成的纵向金属布线和横向金属布线连接形成所述布线层,各布线封装层的封料层上的横向金属布线与相邻布线封装层的封料层上的纵向金属布线相通;带有焊料凸点的芯片倒装于所述倒装封装层相邻的布线封装层的横向金属布线上,形成所述倒贴装层;
去除载板及剥离膜,裸露出第一保护层中的再布线金属;在裸露的再布线金属上形成金属焊球。
可选地,在第二保护层上形成二组布线封装层的具体步骤包括:将包括芯片和无源器件的第一正贴装层的功能面的相对一面贴于第二保护层上;将第二保护层上贴有第一正贴装层的一面形成第一封料层,使第一正贴装层中芯片和无源器件的功能焊盘裸露;在第一封料层中形成第一微通孔,并将第一微通孔金属化填充形成与再布线金属层导通的第一纵向金属布线;在第一封料层上形成与第一纵向金属布线连接的第一横向金属布线,第一纵向金属布线与第一横向金属布线构成第一布线层;在第一封料层上堆叠第二正贴装层;在第一封料层上形成覆盖第二正贴装层的第二封料层,并暴露第二正贴装层中芯片和无源器件的焊盘;在第二封料层中形成第二微通孔并将第二微通孔金属化填充形成与第一布线层连接的第二纵向金属布线;在第二封料层上形成与第二纵向金属布线连接的第二横向金属布线,第二纵向金属布线与第二横向金属布线构成第二布线层。
可选地,在第二布线封装层上形成一组倒装封装层的具体步骤包括:将带有焊料凸点的芯片倒装于第二封料层的第二横向金属布线上形成第一倒贴装层,第一倒贴装层与第二布线层透过焊料凸点实现电互联;用填充料填满第一倒贴装层的芯片与第二封料层间的间隙形成底部填充;在第二封料层上形成覆盖第一倒贴装层的第三封料层,使第一倒贴装层被第三封料层的塑封料包覆密封。
可选地,所述横向金属布线将其所在封料层中芯片和/或无源器件导通互联。
可选地,各组封装层之间透过封料层中的布线层和焊料凸点来实现相邻贴装层或间隔贴装层间的电互联。
可选地,所述载板为硅晶圆或玻璃载板。
可选地,所述剥离膜为UV胶。
可选地,形成剥离膜的方法为旋涂或印刷。
可选地,形成所述保护层的材料为聚酰亚胺或苯并环丁烯。
可选地,形成再布线金属层的方法为电镀、化镀或溅射。
可选地,所述正贴装层中包括芯片和无源器件。
可选地,所述正贴装层的贴装面为芯片和无源器件的功能面的相对一面。
可选地,所述倒贴装层包括芯片和无源器件,所述倒贴装层的贴装面为芯片和无源器件的功能面。
可选地,封料层的材料为环氧树脂。
可选地,封料层通过印刷、压缩或转注的方法而形成。
可选地,所述底部填充的填充料为高分子环氧树脂。
与现有技术相比,本发明请求保护的扇出高密度封装方法,将芯片和无源器件进行整合后再一并封装,可以形成包含整体系统功能而非单一的芯片功能的最终封装产品,相比现有的系统级封装,高密度的圆片级系统封装更是降低了系统内电阻、电感以及芯片间的干扰因素,也更能顺应半导体封装轻薄短小的趋势要求。
此外,本发明请求保护的扇出高密度封装方法可以形成由多层芯片组所组成的立体封装结构,各层之间的布线层通过形成在各封料层上的微通孔连接,并可以与引线互联组合起来灵活使用。因此可以制造比现有技术中更为复杂的多层互联结构,实现密度更高的圆片系统级封装。
附图说明
图1和图2为本发明一个实施例中扇出高密度封装方法流程图;
图3至图13为图1和图2所示流程中封装结构示意图。
具体实施方式
在下面的描述中阐述了很多具体细节以便于充分理解本发明。但是本发明能够以很多不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似推广,因此本发明不受下面公开的具体实施的限制。
其次,本发明利用示意图进行详细描述,在详述本发明实施例时,为便于说明,所述示意图只是实例,其在此不应限制本发明保护的范围。
下面结合附图对本发明的具体实施方式做详细的说明。
如图1和图2所示,在本发明的一个实施例中,提供扇出高密度封装方法,包括步骤:
S101,提供载板;
S102,在载板上形成剥离膜;
S103,在剥离膜上形成第一保护层,并在第一保护层上形成设计的光刻图形开口;
S104,在第一保护层的表面及其光刻图形开口中形成再布线金属层;
S105,在第一保护层上形成带有部分暴露再布线金属层开口的第二保护层;
S106,将芯片和无源器件的功能面的相对面贴于第二保护层上,形成第一正贴装层;
S107,将第二保护层上贴有第一正贴装层的一面形成第一封料层,使第一正贴装层中芯片和无源器件的功能焊盘裸露;
S108,在第一封料层中形成第一微通孔,并将第一微通孔金属化填充,在第一封料层中形成第一纵向金属布线;
S109,在第一封料层上形成与第一纵向金属布线连接的第一横向金属布线;
S110,在第一封料层107上堆叠第二正贴装层109;
S111,在第一封料层上形成覆盖第二正贴装层的第二封料层,并暴露第二正贴装层中芯片和无源器件的焊盘;
S112,在第二封料层中形成第二微通孔并将第二微通孔金属化填充,在第二封料层中形成与第一布线层连接的第二纵向金属布线;
S113,在第二封料层上形成与第二纵向金属布线连接的第二横向金属布线;
S114,将带有焊料凸点的芯片倒装于第二封料层的第二横向金属布线上,形成第一倒贴装层;
S115,在第一倒贴装层的芯片与第二封料层间用填充料形成底部填充;
S116,在第二封料层上形成覆盖第一倒贴装层的第三封料层,使第一倒贴装层被第三封料层的塑封料包覆密封;
S117,去除载板及剥离膜,使第一保护层的光刻图形开口中的再布线金属裸露,所述裸露的金属即为电性输出端子;
S118,在裸露的电性输出端子上形成金属焊球。
在本实施例中,首先执行步骤S101,提供载板101。在本实施例中,载板101可以是硅质晶圆或玻璃材质,易剥离、抗腐蚀能力强,可以进行重复利用。
再执行步骤S102,在载板101上形成剥离膜102,形成如图3所示的结构。在这一步骤中,载板101是用来承载后续第一正贴装层106的基础,当然也是承载后续各层封装结构的基础。在载板101上形成的剥离膜102是用于将第一正贴装层106固定在载板101上。
在本发明的一个优选的实施例中,剥离膜102采用UV胶。UV胶在未经过紫外线照射时粘性很高,为上述各步骤的顺利实施打好基础;而经过紫外光照射后材料内的交联化学键被打断导致粘性大幅下降或消失,方便后续将载板101剥离。
在本发明的具体实施方式中,在载板101上形成剥离膜102的方法可以是通过旋涂或印刷等方法将剥离膜102涂覆在载板101上。这样的方法在半导体制造领域中已为本领域技术人员所熟知,在此不再赘述。
然后执行步骤S103,在剥离膜102上形成第一保护层103,并在第一保护层103上形成设计的光刻图形开口,形成如图4所示的结构。
接着执行步骤S104,即在第一保护层103的表面及其光刻图形的开口中形成再布线金属层104。在这一步骤中,第一保护层103的光刻图形开口中的再布线金属即为后续去除载板101和剥离膜102后裸露的电性输出端子,第一保护层103表面的再布线金属用以连接电性输出端子和后续的上层布线。
在本发明的具体实施方式中,实现再布线金属层104的方式可以例如是电镀、化镀或溅射等方式,这些方法的具体步骤已为本领域技术人员所熟知,在此不再赘述。
然后执行步骤S105,在第一保护层103上形成带有部分暴露再布线金属层104开口的第二保护层105,形成如图5所示的结构。
形成第一保护层103和第二保护层105的材料可以是聚酰亚胺或苯并环丁烯等;形成开口的方法为半导体制造领域中已为本技术领域人员所熟知的光刻显影方法,在此不再赘述。
接着执行步骤S106,将第一正贴装层106中的芯片和无源器件的功能面的相对一面贴于第二保护层105上,形成如图6所示的结构,第一正贴装层106中芯片和无源器件的贴装位置是依据设计的整体布线方案进行设定。
在本发明的具体实施方式中,第一正贴装层106的功能面,是指第一正贴装层106的中的芯片的焊盘和无源器件的焊盘所在表面。
在本发明的一个优选的实施例中,贴合于第二保护层105之上的第一正贴装层106及后续提及的贴装层都可以包含一个或多个相同或不同芯片,还可以包括一个或多个相同或不同的无源器件。这些芯片和无源器件各自成为一个系统级封装产品的一部分,各自完成实现系统级功能中的一个或多个单独的功能。
在本发明的一个优选的实施例中,第一正贴装层106中的芯片与无源器件的组合是根据系统功能来设计的。因此,在一个或一组芯片的周围,可能有相同或不同的另外的一个或一组芯片,或者相同或不同的电容、电阻或电感等无源器件;类似的,在一个无源器件的周围,可能有相同或不同的其他的无源器件,或者一个或多个相同或不同芯片。
然后执行步骤S107,将第二保护层105上贴有第一正贴装层106的一面形成第一封料层107,使第一正贴装层106的芯片的焊盘和无源器件的焊盘裸露,即形成如图7所示的结构。在后续工艺过程中,第一封料层105既可保护第一正贴装层106,又可作为后续工艺的承载体。
在本发明的一个实施例中,形成第一封料层107的材料是环氧树脂。这种材料的密封性能好,塑型容易,是形成第一封料层107的较佳材料。形成第一封料层107的方法可以例如是印刷、压缩或转注的方法。这些方法的具体步骤已为本领域技术人员所熟知,在此不再赘述。
再执行步骤S108至步骤109,包括:在第一封料层107上形成第一微通孔,第一微通孔是形成层间布线互联的通道,与第二保护层105中暴露的开口相通,将第一微通孔金属化填充,使第一封料层107中形成第一纵向金属布线,该第一纵向金属布线与第二保护层105中的再布线金属层104导通互联;在第一封料层107上形成第一横向金属布线,该第一横向金属布线在第一封料层107上形成第一正贴装层106中芯片间或芯片与无源器件间的导通,具体地,所述第一横向金属布线与芯片和无源器件的焊盘表面相连,最后形成如图8所示的结构。第一横向金属布线与第一纵向金属布线连接成第一布线层108,第一布线层108成为再布线金属层104和后续上层布线的导通。
然后执行步骤S110,在第一封料层107上堆叠第二正贴装层109。这里所说的堆叠,是指将第二正贴装层109置于第一封料层107上的预定位置处。
再执行步骤S111,在第一封料层107上形成覆盖第二正贴装层109的第二封料层110,并暴露第二正贴装层109中芯片和无源器件的焊盘。形成第二封料层110的材料可以与形成第一封料层107的材料相同,即采用环氧树脂来形成第二封料层110。
然后执行步骤S112,在第二封料层110上形成第二微通孔并将其金属化填充。第二微通孔穿透第二封料层110。和第一微通孔相似,第二微通孔也是形成层间布线互联的通道。再在第二封料层110中形成与第一横向金属布线相通的第二纵向金属布线,该第二纵向金属布线与第一封料层107的第一布线层108导通互联。
再执行步骤S113,在第二封料层110上形成与第二纵向金属布线连接的第二横向金属布线层,该第二横向金属布线在第二封料层110上形成第二正贴装层109中芯片间或芯片与无源器件间的导通,具体地,所述第二金属横向布线与芯片和无源器件的焊盘表面相连,即形成如图9所示的结构。第二横向金属布线与第二纵向金属布线连接成第二布线层111,第二布线层111成为第一布线层108和后续上层布线的导通,也即形成了第二正贴装层109与第一正贴装层106间的系统互联。
然后执行步骤S114,将带有焊料凸点113的芯片倒装于第二封料层110的第二横向金属布线上,形成第一倒贴装层112。此时,倒装芯片通过其焊料凸点113实现了与第二布线层111间的电互联,也即形成了第一倒贴装层112与第二正贴装层109、第一正贴装层106间的系统互联。
在本发明的一个优选的实施例中,可根据设计需要在倒装芯片的周围贴装无源器件,此时无源器件的贴装方向可与芯片的贴装方向一致以简化工艺流程,具体地可以是将无源器件的功能焊盘贴装在布线层的预定位置上来实现电互联,贴装的具体步骤已为本领域技术人员所熟知,在此不再赘述。
接着执行步骤S115,在第一倒贴装层112的芯片与第二封料层110间用填充料114形成底部填充,形成如图10所示的结构。
在本发明的一个实施例中,形成底部填充的填充料114是高分子环氧树脂。这种材料的的流动性好,能够充分填充倒装芯片与封料层间的间隙,避免后续封料层中内部空洞等可靠性问题。形成填充料114的方法主要是点胶,具体的点胶方式已为本领域技术人员所熟知,在此不再赘述。
然后执行步骤S116,在第二封料层110上形成覆盖第一倒贴装层112的第三封料层115,使第一倒贴装层112被第三封料层115的塑封料包覆密封,形成如图11所示的结构。形成第三封料层115的材料可以与形成第一封料层107和第二封料层110的材料相同,即采用环氧树脂来形成第三封料层115。
再执行步骤S117,去除载板101及剥离膜102,使第一保护层103的光刻图形开口中的再布线金属裸露,形成如图12所示的结构,所述裸露的金属即为电性输出端子。
接着再执行步骤S118,在裸露的电性输出端子上形成金属焊球116,形成如图13所示的结构。此步骤的具体方法已为本技术领域人员所熟知,在此不再赘述。
需要说明的是,可根据设计需要重复步骤S103和步骤S104以实现多层再布线金属;上述扇出封装方法中,仅以三层贴装层为例,但是本发明不限制与此,还可以是二层贴装层、四层贴装层或五层贴装层等,且可根据设计需要透过封料层中的布线层和焊料凸点来实现相邻贴装层或间隔贴装层间的互联;另外,在上述具体实施方式中,第一正贴装层中包括芯片和无源器件,但是本发明并不限于此,第一正贴装层中也可以仅有芯片,在后续的各层贴装层包括倒贴装层中都可以根据设计需要选择芯片或芯片和无源器件的组合,本领域技术人员可以根据上述实施例进行相应地变形、修改和替换。
虽然本发明已以较佳实施例披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (15)

1.扇出高密度封装方法,其特征在于,包括步骤:
提供载板;在载板上形成剥离膜;
在剥离膜上形成第一保护层,并在第一保护层上形成设计的光刻图形开口;在第一保护层的表面及其光刻图形开口中形成再布线金属层;在第一保护层上形成带有部分暴露再布线金属层开口的第二保护层;
在第二保护层上形成至少一组布线封装层,形成所述布线封装层的步骤包括依次形成正贴装层、封料层和布线层,所述正贴装层包括带有焊盘的芯片,布线封装层透过布线层与再布线金属层导通;在布线封装层上形成至少一组倒装封装层,形成倒装封装层的步骤包括依次形成倒贴装层、底部填充和封料层;其中各组封装层之间透过所述布线封装层的布线层和焊料凸点相互电连接,在各组布线封装层的封料层上形成有微通孔,所述微通孔穿透对应的封料层,将所述微通孔金属化填充,使对应的封料层中形成有纵向金属布线;在各封料层上形成有横向金属布线,与所述芯片的焊盘表面相连;在各布线封装层的封料层形成的纵向金属布线和横向金属布线连接形成所述布线层,各布线封装层的封料层上的横向金属布线与相邻布线封装层的封料层上的纵向金属布线相通;带有焊料凸点的芯片倒装于所述倒装封装层相邻的布线封装层的横向金属布线上,形成所述倒贴装层;
去除载板及剥离膜,裸露出第一保护层中的再布线金属;在裸露的再布线金属上形成金属焊球。
2.如权利要求1所述的扇出高密度封装方法,其特征在于,在第二保护层上形成二组布线封装层的具体步骤包括:
将包括芯片和无源器件的第一正贴装层的功能面的相对一面贴于第二保护层上;将第二保护层上贴有第一正贴装层的一面形成第一封料层,使第一正贴装层中芯片和无源器件的功能焊盘裸露;在第一封料层中形成第一微通孔,并将第一微通孔金属化填充形成与再布线金属层导通的第一纵向金属布线;在第一封料层上形成与第一纵向金属布线连接的第一横向金属布线,第一纵向金属布线与第一横向金属布线构成第一布线层;
在第一封料层上堆叠第二正贴装层;在第一封料层上形成覆盖第二正贴装层的第二封料层,并暴露第二正贴装层中芯片和无源器件的焊盘;在第二封料层中形成第二微通孔并将第二微通孔金属化填充形成与第一布线层连接的第二纵向金属布线;在第二封料层上形成与第二纵向金属布线连接的第二横向金属布线,第二纵向金属布线与第二横向金属布线构成第二布线层。
3.如权利要求2所述的扇出高密度封装方法,其特征在于,在第二布线封装层上形成一组倒装封装层的具体步骤包括:
将带有焊料凸点的芯片倒装于第二封料层的第二横向金属布线上形成第一倒贴装层,第一倒贴装层与第二布线层透过焊料凸点实现电互联;用填充料填满第一倒贴装层的芯片与第二封料层间的间隙形成底部填充;在第二封料层上形成覆盖第一倒贴装层的第三封料层,使第一倒贴装层被第三封料层的塑封料包覆密封。
4.如权利要求2或3所述的扇出高密度封装方法,其特征在于:所述横向金属布线将其所在封料层中芯片和/或无源器件导通互联。
5.如权利要求1所述的扇出高密度封装方法,其特征在于:所述载板为硅晶圆或玻璃载板。
6.如权利要求1所述的扇出高密度封装方法,其特征在于:所述剥离膜为UV胶。
7.如权利要求1所述的扇出高密度封装方法,其特征在于:形成剥离膜的方法为旋涂或印刷。
8.如权利要求1所述的扇出高密度封装方法,其特征在于:形成所述保护层的材料为聚酰亚胺或苯并环丁烯。
9.如权利要求1所述的扇出高密度封装方法,其特征在于:形成再布线金属层的方法为电镀、化镀或溅射。
10.如权利要求1~3任意一权利要求所述的扇出高密度封装方法,其特征在于:所述正贴装层中包括芯片和无源器件。
11.如权利要求10所述的扇出高密度封装方法,其特征在于:所述正贴装层的贴装面为芯片和无源器件的功能面的相对一面。
12.如权利要求1或3所述的扇出高密度封装方法,其特征在于:所述倒贴装层包括芯片和无源器件,所述倒贴装层的贴装面为芯片和无源器件的功能面。
13.如权利要求1~3任意一权利要求所述的扇出高密度封装方法,其特征在于:封料层的材料为环氧树脂。
14.如权利要求1~3任意一权利要求所述的扇出高密度封装方法,其特征在于:封料层通过印刷、压缩或转注的方法而形成。
15.如权利要求1或3所述的扇出高密度封装方法,其特征在于:所述底部填充的填充料为高分子环氧树脂。
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