CN103325703B - 在封装件形成期间探测芯片 - Google Patents
在封装件形成期间探测芯片 Download PDFInfo
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- CN103325703B CN103325703B CN201210241811.1A CN201210241811A CN103325703B CN 103325703 B CN103325703 B CN 103325703B CN 201210241811 A CN201210241811 A CN 201210241811A CN 103325703 B CN103325703 B CN 103325703B
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- Prior art keywords
- package assembling
- tube core
- packaging part
- connector
- intermediary
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- 229910045601 alloy Inorganic materials 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
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- 238000003475 lamination Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
一种方法包括在第二封装组件的第一面上接合第一封装组件,以及从第二封装组件的第二面探测第一封装组件和第二封装组件。通过探测位于第二封装组件的第二面上的连接件执行探测步骤。连接件连接至第一封装组件。在探测步骤之后,在第二封装组件的第一面上接合第三封装组件。本发明还提供在封装件形成期间探测芯片。
Description
技术领域
本发明涉及一种探测芯片的方法及由该方法得到的器件。
背景技术
三维集成电路(3DIC)通常用于冲破二维(2D)电路的障碍。在3DIC中,堆叠两个或两个以上的封装组件,其中封装组件包括中间层、封装基板、印刷电路板(PCB)等。可以在一些诸如器件管芯和/或中介层的封装组件中形成穿透硅通孔(TSV)。
3DIC遭受可能导致制造产量损失的各种问题。例如,用于接合两种封装组件的连接件可能破裂。连接件也可能与对应的封装组件分层。当3DIC包括晶圆时,晶圆中可能具有严重的翘曲,并且该翘曲可能会导致生产工艺中的困难。
发明内容
为了解决现有技术中存在的问题,根据本发明的一个方面,提供了一种方法,包括:在第二封装组件的第一面上接合第一封装组件;从所述第二封装组件的第二面探测所述第一封装组件和所述第二封装组件,其中,通过探测位于所述第二封装组件的所述第二面上的连接件执行探测步骤,并且其中,所述连接件连接至所述第一封装组件;以及在所述探测步骤之后,在所述第二封装组件的所述第一面上接合第三封装组件。
在上述方法中,还包括:在接合所述第一封装组件的步骤之后和在所述探测步骤之前,从与所述第一面相对的背面对所述第二封装组件实施背面研磨,其中,暴露出位于所述第二封装组件中的通孔;以及在所述第二封装组件的所述第二面上形成所述连接件,其中,通过所述通孔将所述连接件电连接至所述第一封装组件。
在上述方法中,其中,在接合所述第一封装组件的步骤之前,在所述第二封装组件的所述第二面上形成所述连接件。
在上述方法中,还包括:在接合所述第一封装组件的步骤之后,在所述第一封装组件和所述第二封装组件上涂覆第一膜;将所述第一封装组件、所述第二封装组件、和所述第一膜设置在载具上,其中,通过第二膜将所述第一膜连接至所述载具;以及在所述探测步骤之后,去除所述第一膜和所述第二膜。
在上述方法中,其中,所述第一封装组件包括器件管芯,所述第二封装组件是包括多个管芯的中介晶圆,并且其中,所述方法还包括,在所述探测步骤之后和在接合所述第三封装组件的步骤之前,实施管芯切割以将所述中介晶圆切割成单个封装件。
在上述方法中,还包括:在接合所述第三封装组件的步骤之前,在所述第一封装组件和所述第二封装组件之间提供第一底部填充区;以及在接合所述第三封装组件的步骤之后,在所述第二封装组件和所述第三封装组件之间提供第二底部填充区。
在上述方法中,还包括,在接合所述第一封装组件的步骤之后以及在接合所述第三封装组件的步骤之前,将所述第二封装组件接合至第四封装组件。
在上述方法中,其中,所述第一封装组件和所述第三封装组件包括器件管芯,并且其中,所述第二封装组件包括中介层或者器件管芯。
根据本发明的另一方面,还提供了一种方法,包括:在中介晶圆的第一面上接合多个第一管芯以形成多个封装件,其中,所述中介晶圆包括多个中介层,并且其中,每个所述多个封装件都包括接合至所述多个中介层之一的一个所述多个第一管芯;从所述中介晶圆的第二面探测所述多个封装件以识别合格的封装件和有缺陷的封装件,其中,通过探测位于所述中介晶圆的所述第二面上的连接件执行探测步骤,并且其中,所述连接件连接至所述多个第一管芯;在所述探测步骤之后,实施管芯切割以将所述多个封装件彼此分开;以及在所述合格的封装件上接合多个第二管芯,其中,所述有缺陷的封装件不与所述多个第二管芯中的任何一个接合。
在上述方法中,还包括:在接合所述多个第一管芯的步骤之后以及在所述探测步骤之前,对所述中介晶圆实施背面研磨,其中,暴露出位于所述中介晶圆中的通孔;以及在所述中介晶圆的所述第二面上形成所述连接件,其中,通过所述通孔将所述连接件电连接至所述多个第一管芯。
在上述方法中,其中,在接合所述多个第一管芯的步骤之前,在所述中介晶圆的所述第二面上形成所述连接件。
在上述方法中,还包括:在接合所述多个第一管芯的步骤之后,在所述多个第一管芯和所述中介晶圆上涂覆第一包含聚合物膜;将所述第一包含聚合物膜设置在载具上,其中,通过第二包含聚合物膜将所述第一包含聚合物膜连接至所述载具;以及在所述探测步骤之后,从所述多个封装件去除所述第一包含聚合物膜和所述第二包含聚合物膜。
在上述方法中,还包括,在实施所述管芯切割的步骤之后以及在接合所述多个第二管芯的步骤之前,在封装基板上接合一个所述合格封装件。
在上述方法中,还包括:在接合所述多个第二管芯的步骤之前,在所述多个第一管芯和所述多个中介层之间提供多个第一底部填充区;以及在接合所述多个第二管芯的步骤之后,在所述多个第二管芯和所述多个中介层之间提供多个第二底部填充区。
根据本发明的又一方面,还提供了一种器件,包括:第一封装组件;第二封装组件,接合至所述第一封装组件的第一面;第一底部填充区,位于所述第一封装组件和所述第二封装组件之间;第三封装组件,接合至所述第一封装组件的所述第一面;以及第二底部填充区,位于所述第一封装组件和所述第三封装组件之间,其中,所述第一底部填充区和所述第二底部填充区相互结合以形成连续的底部填充区,并且其中,在所述第一底部填充区和所述第二底部填充区之间形成可见界面。
在上述器件中,其中,所述第一封装组件包括中介层,并且其中,所述第二封装组件和所述第三封装组件包括接合至所述中介层的器件管芯。
在上述器件中,其中,所述第一封装组件包括中介层,并且其中,所述第二封装组件和所述第三封装组件包括接合至所述中介层的器件管芯,其中,所述第二封装组件和所述第三封装组件包括不同类型的管芯。
在上述器件中,其中,所述第一封装组件包括中介层,并且其中,所述第二封装组件和所述第三封装组件包括接合至所述中介层的器件管芯,还包括接合至所述第一封装组件的第二面的封装基板,其中,所述封装基板位于所述中介层的相对于所述第二封装组件和所述第三封装组件的相对面上。
在上述器件中,其中,所述第二封装组件通过第一连接件接合至所述第一封装组件,所述第三封装组件通过所述第二连接件接合至所述第一封装组件,并且其中,所述第一连接件和所述第二连接件具有基本上相同的结构。
在上述器件中,其中,所述第一封装组件包括衬底,和穿透所述衬底的通孔,并且其中,所述第二封装组件和所述第三封装组件电连接至所述通孔。
附图说明
为了更好地理解实施例及其优点,现在将结合附图所进行的以下描述作为参考,其中:
图1至图9是根据各种示例性实施例制造3DIC封装件的中间阶段的截面图;以及
图10至图17是根据各种可选的示例性实施例制造3DIC封装件的中间阶段的截面图。
具体实施方式
在下文详细地讨论本发明实施例的制造和使用。然而,应当理解,实施例提供了许多可以在各种具体环境中实现的可应用的发明构思。所讨论的具体实施例仅是示例性的,而不是用于限制本发明的范围。
提供了一种新型的三维集成电路(3DIC)封装件及其形成方法。示出了制造实施例的中间阶段。讨论了实施例的变化。在所有的各个附图和示例性实施例中,相似的参考标号用于表示相似的元件。
参考图1,提供了封装组件100。封装组件100包括衬底10。在一些实施例中,封装组件100是中介晶圆,其包括多个中介层22。封装组件100可以基本上不包括集成电路器件(包括诸如晶体管的有源器件)。此外,封装组件100可以包括或者可以不包括诸如电容器、电阻器、电感器、变容二极管等的无源器件。可选地,封装组件100可以是其中包括诸如晶体管的有源器件的器件晶圆。
衬底10可以由诸如硅的半导体材料形成。可选地,衬底10可以由介电材料形成。在衬底10的正面上形成正面互连结构12。互连结构12包括一个或多个介电层18,以及介电层18中的金属线和通孔16。在整个说明书中,封装组件100在图1中面朝上的一侧被称为正面,并且面100A被称为正面。面朝下的一侧被称为封装组件100的背面,并且面100B被称为背面100B。金属线和通孔16可选地被称为正面再分布线(RDL)。此外,在衬底10中形成衬底通孔(TSV)20并且延伸到预定深度。TSV20电连接至正面RDL16。
在封装组件100的正面100A上形成正面连接件24,并且通过RDL16电连接至TSV20。在一些实施例中,连接件24包括焊球。在可选的实施例中,连接件24包括金属焊盘、金属柱、被焊料盖顶覆盖的金属柱等。
参考图2,封装组件26接合至封装组件100的正面,并接合至连接件24A(其是连接件24的一部分)。在一些实施例中,封装组件26是管芯,并且在下文中被称为管芯26,但是它们也可以是其他的类型。管芯26可以是包括诸如晶体管、电容器、电感器、电阻器(未示出)等的集成电路器件的器件管芯。可选地,管芯26可以是其中包括器件管芯和其他封装组件(诸如中介层、封装基板等)的封装件。管芯26和连接件24A之间的接合可以是焊料接合或者直接金属对金属(例如铜对铜)接合。底部填充区27分散到管芯26和封装组件100之间的间隙内并固化。底部填充区27可以彼此分隔。
连接件24还包括连接件24B,其中连接件24A和连接件24B可以具有相同的结构,例如具有相同的尺寸、相同的层、以及相同的材料。无封装组件接合到连接件24B,因此连接件24B是暴露的,从而未被底部填充区覆盖。
参考图3,对管芯26和封装组件100涂覆膜30。膜30的顶面可以高于管芯26的顶面26A,或者与管芯26的顶面26A齐平。将膜30进一步填充到管芯26之间的间隙内。膜30可以包含聚合物,其随后可以被去除且不损伤连接件24B、管芯26和封装组件100。在一些实施例中,通过旋转涂布涂覆膜30。可选地,膜30是层压的。膜30的厚度T1可以大于约20μm,并且可以在约20μm和约800μm之间。膜30的顶面30A可以基本上是平面的。
参考图4,通过膜32将封装组件100设置在载具33上。膜32也可以包含聚合物。在一些示例性实施例中,膜32可以是紫外线(UV)胶,或者可以由其他聚合物材料形成。膜32可以由能够通过蚀刻去除的材料形成。载具33可以是玻璃载具,但是也可以使用其他类型的载具。
参考图5,实施晶圆背面研磨以从封装组件100的背面减薄衬底10,直到暴露出TSV20。可以实施蚀刻以进一步降低衬底10的表面,使得TSV20从衬底10的剩余部分的背面10B伸出来。接下来,如图6所示,形成背面互连结构36以连接至TSV20。在各个实施例中,背面互连结构36可以具有与正面互连结构12类似的结构,并且可以包括一层或多层再分布线(RDL,未示出)。然后形成连接件38,并且将其连接至背面互连结构36。通过背面互连结构36和TSV20,可以将连接件38电连接至管芯26和连接件24。连接件38可以是含焊料连接件。连接件38也可以包括焊球、金属柱上的焊料盖顶、金属柱、金属焊盘、或者由金、银、镍、钨、铝、和/或它们的合金形成的其他类型的金属凸块。在整个说明书中,封装组件100中的中介层22(图6中未标记,请参考图1)及其相应的管芯26组合起来被称为封装件42。因此,如图6所示,形成多个封装件42。
图6还示出了封装组件100和管芯26通过连接件38的探测,其中箭头40代表用于探测的探针。应该理解,当管芯26被接合到封装组件100上时,管芯26可能是已知合格的管芯。但是,可能例如在管芯26和连接件38之间的电路径中引入其他缺陷。此外,在接合工艺过程中,管芯26也可能被损坏。一些封装件42可能通过探针测试,从而被标记为合格封装件,而一些其他封装件42可能未通过探针测试,并因此被标记为有缺陷的封装件。因此,通过探测可以识别出合格封装件42和有缺陷的封装件42。
然后使载具33脱粘(de-bonded),例如通过将膜32置于UV光下,使其失去粘着性。图7示出得到的结构。例如通过蚀刻去除膜32。还去除膜30。在一些示例性实施例中,可以剥离膜32。从而暴露出连接件24B。切割胶带44粘附至封装组件100的一侧,该侧与连接件38所处的一侧相同,切割胶带44用于脱粘载具33。接下来,沿划线43实施切割以将封装件42彼此分开。每个得到的封装件42都包括一个中介层22和一个或多个管芯26。
参考图8,可以通过连接件38将得到的合格封装件42接合至另一封装组件(诸如封装基板52)。然后可以在封装件42和封装组件52之间提供底部填充区53。
再次参考图6,在探测步骤中,识别有缺陷的封装件42并将其丢弃。因此,有缺陷的封装件42不会被接合至封装组件52。应该了解,在封装完成之前的早期阶段检测出有缺陷的封装件42。从而可以防止诸如封装基板、管芯等的封装组件进一步接合至有缺陷的封装件。因此消除了由有缺陷的封装件导致的进一步的产量损失。
图9示出封装组件56在封装件42上的接合,其是合格的封装件。封装组件56可以是器件管芯,并因此在下文中可选地被称为管芯56,但是它可以是诸如封装件的另一类型的封装组件。将管芯56接合至连接件24B。在接合之后,可以将管芯56电连接至TSV20和连接件38。在一些实施例中,管芯26和管芯56是相同的类型,并且具有相同的结构。在可选的实施例中,管芯26和管芯56是不同的类型,并且具有不同的结构。然后分散底部填充区57并且固化。当管芯26和管芯56彼此接近时,底部填充区57和底部填充区27可以彼此结合从而形成连续的底部填充区。应该了解,在不同的时间点分散底部填充区57和底部填充区27。因此,不论底部填充区57和底部填充区27是否由相同的材料形成或者包含不同的材料,当底部填充区57和底部填充区27相互接触时,可以在底部填充区57和底部填充区27之间形成可见界面58。可选地,底部填充区57和底部填充区27可以相互分离。
图10至图15示出根据可选的实施例制造封装件的中间阶段的截面图。除非另有规定,这些实施例中的参考符号代表图1至图9示出的实施例中的相似元件。不再重复相应的细节(例如关于元件的形成方法和材料),这些细节可以参考图1至图9的实施例。参考图10,提供了封装组件100,封装组件100通过例如粘合剂60接合至载具59,在示例性实施例中,粘合剂60可以是UV胶。背面互连结构36和连接件38也是预先形成的,并且可以通过TSV20和RDL16电连接至连接件24。载具59可以是玻璃载具。
接下来,如图11所示,管芯26接合至位于封装组件100的正面上的连接件24A。然后分散底部填充区27并且固化。在分散底部填充区27之后,连接件24B仍然未接合至任何上覆的封装组件,从而可以被暴露出来。在图12中,涂覆膜30以覆盖管芯26和封装组件100。膜30也可以接触连接件24B。
参考图13,对膜30涂覆膜32,并且通过膜32将封装组件100设置在载具33上。膜32也可以包含聚合物。然后使载具59脱粘并去除粘合剂60。因此,暴露出连接件38。接下来,如图14所示,实施芯片探测步骤(由箭头40表示)以检测有缺陷的封装件42,每个封装件42包括一个中介层22和一个管芯26。借助芯片探测步骤,识别并且标记合格封装件42和有缺陷的封装件42。
然后使载具33脱粘。例如分别通过蚀刻步骤和剥离步骤去除膜30和膜32。图15示出得到的结构。在这个阶段暴露出连接件24B并且其仍然未接合至任何上覆封装组件。切割胶带44被粘附至封装组件100的一侧,该侧与连接件38所处的一侧相同,并且切割胶带44用于使载具33脱粘。接下来,沿划线43执行切割步骤以将封装件42彼此分开。每个得到的封装件42都包括一个中介层22和一个和一个管芯26。如图16所示,可以通过连接件38将合格的封装件42接合至其他封装组件(诸如封装基板52)。丢弃有缺陷的封装件42。然后可以在封装组件42和封装组件52之间提供底部填充区53。
参考图17,将封装组件56接合至连接件24B。封装组件56可以是器件管芯、封装件等。然后分散底部填充区57然后固化。应该了解,在不同的时间点分散底部填充区57和底部填充区27。因此,不论底部填充区57和底部填充区27是否由相同的材料形成或者包含不同的材料,当底部填充区57和底部填充区27相互接触时,底部填充区57和底部填充区27之间可能形成可见界面58。
在示例性实施例中,将待接合到封装组件100的同一侧的器件管芯分成第一组和第二组。首先将第一组器件管芯接合至封装组件100以形成封装件。执行芯片探测步骤以从得到的封装件(包括第一组管芯)中找出有缺陷的封装件和合格的封装件。将第二组管芯接合至合格的封装件,而有缺陷的封装件不进一步被封装。因此,待接合到有缺陷的封装件的其他将被浪费的器件管芯和封装基板被节省了。
根据实施例,一种方法包括在第二封装组件的第一面上接合第一封装组件,并且从第二封装组件的第二面探测第一封装组件和第二封装组件。通过探测位于第二封装组件的第二面上的连接件执行探测步骤。连接件连接至第一封装组件。在探测步骤之后,在第二封装组件的第一面上接合第三封装组件。
根据其他实施例,一种方法包括在中介晶圆的第一面上接合多个第一管芯以形成多个封装件,其中中介晶圆包括多个中介层。多个封装件中的每个都包括接合至多个中介层之一的其中一个多个第一管芯。从中介晶圆的第二面探测多个封装件以识别合格的封装件和有缺陷的封装件。通过探测位于中介晶圆的第二面上的连接件执行探测步骤。连接件连接至多个第一管芯。在探测步骤之后,实施管芯切割以将多个封装件彼此分开。在合格封装件上接合多个第二管芯,其中有缺陷的封装件不与任何一个多个第二管芯接合。根据又一实施例,一种器件包括第一封装组件、接合至第一封装组件的第一面的第二封装组件、以及位于第一封装组件和第二封装组件之间的第一底部填充区。该器件还包括接合至第一封装组件的第一面的第三封装组件,以及位于第一封装组件和第三封装组件之间的第二底部填充区。第一底部填充区和第二底部填充区相互结合以形成连续的底部填充区。第一底部填充区和第二个底部填充区之间形成可见界面。
尽管已经详细地描述了实施例及其优势,但应当理解,可以在不背离所附权利要求限定的实施例的精神和范围的情况下,进行各种改变、替换和更改。而且,本申请的范围并不仅限于本说明书中描述的工艺、机器、制造、材料组分、装置、方法和步骤的具体实施例。作为本领域普通技术人员根据本发明应很容易理解,根据本发明可以利用现有的或今后开发的用于执行与本文所述相应实施例基本上相同的功能或者获得基本上相同的结果的工艺、机器、制造、材料组分、装置、方法或步骤。因此,所附权利要求预期在其范围内包括这样的工艺、机器、制造、材料组分、装置、方法或步骤。此外,每条权利要求构成单独的实施例,并且多个权利要求和实施例的组合在本发明的范围内。
Claims (14)
1.一种形成三维集成电路封装件的方法,包括:
在第二封装组件的第一面上接合第一封装组件;
从所述第二封装组件的第二面探测所述第一封装组件和所述第二封装组件,其中,通过探测位于所述第二封装组件的所述第二面上的连接件执行探测步骤,并且其中,所述连接件连接至所述第一封装组件;以及
在所述探测步骤之后,在所述第二封装组件的所述第一面上接合第三封装组件。
2.根据权利要求1所述的方法,还包括:
在接合所述第一封装组件的步骤之后和在所述探测步骤之前,从与所述第一面相对的背面对所述第二封装组件实施背面研磨,其中,暴露出位于所述第二封装组件中的通孔;以及
在所述第二封装组件的所述第二面上形成所述连接件,其中,通过所述通孔将所述连接件电连接至所述第一封装组件。
3.根据权利要求1所述的方法,其中,在接合所述第一封装组件的步骤之前,在所述第二封装组件的所述第二面上形成所述连接件。
4.根据权利要求1所述的方法,还包括:
在接合所述第一封装组件的步骤之后,在所述第一封装组件和所述第二封装组件上涂覆第一膜;
将所述第一封装组件、所述第二封装组件、和所述第一膜设置在载具上,其中,通过第二膜将所述第一膜连接至所述载具;以及
在所述探测步骤之后,去除所述第一膜和所述第二膜。
5.根据权利要求1所述的方法,其中,所述第一封装组件包括器件管芯,所述第二封装组件是包括多个管芯的中介晶圆,并且其中,所述方法还包括,在所述探测步骤之后和在接合所述第三封装组件的步骤之前,实施管芯切割以将所述中介晶圆切割成单个封装件。
6.根据权利要求1所述的方法,还包括:
在接合所述第三封装组件的步骤之前,在所述第一封装组件和所述第二封装组件之间提供第一底部填充区;以及
在接合所述第三封装组件的步骤之后,在所述第二封装组件和所述第三封装组件之间提供第二底部填充区。
7.根据权利要求1所述的方法,还包括,在接合所述第一封装组件的步骤之后以及在接合所述第三封装组件的步骤之前,将所述第二封装组件接合至第四封装组件。
8.根据权利要求1所述的方法,其中,所述第一封装组件和所述第三封装组件包括器件管芯,并且其中,所述第二封装组件包括中介层或者器件管芯。
9.一种形成三维集成电路封装件的方法,包括:
在中介晶圆的第一面上接合多个第一管芯以形成多个封装件,其中,所述中介晶圆包括多个中介层,并且其中,每个所述多个封装件都包括接合至所述多个中介层之一的一个所述多个第一管芯;
从所述中介晶圆的第二面探测所述多个封装件以识别合格的封装件和有缺陷的封装件,其中,通过探测位于所述中介晶圆的所述第二面上的连接件执行探测步骤,并且其中,所述连接件连接至所述多个第一管芯;
在所述探测步骤之后,实施管芯切割以将所述多个封装件彼此分开;以及
在所述合格的封装件上接合多个第二管芯,其中,所述有缺陷的封装件不与所述多个第二管芯中的任何一个接合。
10.根据权利要求9所述的方法,还包括:
在接合所述多个第一管芯的步骤之后以及在所述探测步骤之前,对所述中介晶圆实施背面研磨,其中,暴露出位于所述中介晶圆中的通孔;以及
在所述中介晶圆的所述第二面上形成所述连接件,其中,通过所述通孔将所述连接件电连接至所述多个第一管芯。
11.根据权利要求9所述的方法,其中,在接合所述多个第一管芯的步骤之前,在所述中介晶圆的所述第二面上形成所述连接件。
12.根据权利要求9所述的方法,还包括:
在接合所述多个第一管芯的步骤之后,在所述多个第一管芯和所述中介晶圆上涂覆第一包含聚合物膜;
将所述第一包含聚合物膜设置在载具上,其中,通过第二包含聚合物膜将所述第一包含聚合物膜连接至所述载具;以及
在所述探测步骤之后,从所述多个封装件去除所述第一包含聚合物膜和所述第二包含聚合物膜。
13.根据权利要求9所述的方法,还包括,在实施所述管芯切割的步骤之后以及在接合所述多个第二管芯的步骤之前,在封装基板上接合一个所述合格的封装件。
14.根据权利要求9所述的方法,还包括:
在接合所述多个第二管芯的步骤之前,在所述多个第一管芯和所述多个中介层之间提供多个第一底部填充区;以及
在接合所述多个第二管芯的步骤之后,在所述多个第二管芯和所述多个中介层之间提供多个第二底部填充区。
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US20130249532A1 (en) | 2013-09-26 |
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