CN100380580C - 硅半导体基板及其制造方法 - Google Patents

硅半导体基板及其制造方法 Download PDF

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Publication number
CN100380580C
CN100380580C CNB2004800035838A CN200480003583A CN100380580C CN 100380580 C CN100380580 C CN 100380580C CN B2004800035838 A CNB2004800035838 A CN B2004800035838A CN 200480003583 A CN200480003583 A CN 200480003583A CN 100380580 C CN100380580 C CN 100380580C
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semiconductor substrate
silicon semiconductor
plane
faces
silicon
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Chinese (zh)
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CN1748287A (zh
Inventor
大见忠弘
山中秀记
出水清史
寺本章伸
须川成利
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Shin Etsu Handotai Co Ltd
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Shin Etsu Handotai Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • H10P90/14—Preparing bulk and homogeneous wafers by setting crystal orientation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2924—Structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
CNB2004800035838A 2003-02-07 2004-01-29 硅半导体基板及其制造方法 Expired - Lifetime CN100380580C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP030642/2003 2003-02-07
JP2003030642A JP4190906B2 (ja) 2003-02-07 2003-02-07 シリコン半導体基板及びその製造方法

Publications (2)

Publication Number Publication Date
CN1748287A CN1748287A (zh) 2006-03-15
CN100380580C true CN100380580C (zh) 2008-04-09

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CNB2004800035838A Expired - Lifetime CN100380580C (zh) 2003-02-07 2004-01-29 硅半导体基板及其制造方法

Country Status (7)

Country Link
US (1) US7411274B2 (https=)
EP (1) EP1592045A4 (https=)
JP (1) JP4190906B2 (https=)
KR (1) KR101030455B1 (https=)
CN (1) CN100380580C (https=)
TW (1) TW200416806A (https=)
WO (1) WO2004070798A1 (https=)

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JP2004296496A (ja) * 2003-03-25 2004-10-21 Fujitsu Ltd 半導体装置の製造方法
JP3979412B2 (ja) * 2004-09-29 2007-09-19 株式会社Ｓｕｍｃｏ シリコンエピタキシャルウェーハの製造方法
JP2007070131A (ja) * 2005-09-05 2007-03-22 Sumco Corp エピタキシャルウェーハの製造方法およびエピタキシャルウェーハ
JP2008060355A (ja) * 2006-08-31 2008-03-13 Sumco Corp 貼り合わせウェーハの製造方法および貼り合わせウェーハ
JP5023900B2 (ja) 2006-09-05 2012-09-12 株式会社Ｓｕｍｃｏ エピタキシャルシリコンウェーハ
JP2008177530A (ja) * 2006-12-21 2008-07-31 Covalent Materials Corp 半導体基板およびその製造方法
JP2008177529A (ja) * 2006-12-21 2008-07-31 Covalent Materials Corp 半導体基板およびその製造方法
US20080164572A1 (en) * 2006-12-21 2008-07-10 Covalent Materials Corporation Semiconductor substrate and manufacturing method thereof
JP2009094156A (ja) * 2007-10-04 2009-04-30 Tohoku Univ 半導体基板および半導体装置
US8623137B1 (en) 2008-05-07 2014-01-07 Silicon Genesis Corporation Method and device for slicing a shaped silicon ingot using layer transfer
DE102008026784A1 (de) 2008-06-04 2009-12-10 Siltronic Ag Epitaxierte Siliciumscheibe mit <110>-Kristallorientierung und Verfahren zu ihrer Herstellung
US8815710B2 (en) 2008-06-10 2014-08-26 Sumco Corporation Silicon epitaxial wafer and method for production thereof
JP2010018504A (ja) * 2008-07-14 2010-01-28 Japan Atomic Energy Agency Ｓｉ（１１０）表面の一次元ナノ構造及びその製造方法
JP5593107B2 (ja) 2009-04-02 2014-09-17 株式会社半導体エネルギー研究所 半導体装置の作製方法
US9157681B2 (en) 2010-02-04 2015-10-13 National University Corporation Tohoku University Surface treatment method for atomically flattening a silicon wafer and heat treatment apparatus
JPWO2011096417A1 (ja) * 2010-02-04 2013-06-10 国立大学法人東北大学 シリコンウェーハおよび半導体装置
JP5359991B2 (ja) 2010-05-20 2013-12-04 信越半導体株式会社 シリコンエピタキシャルウェーハ及びその製造方法
JP5375768B2 (ja) * 2010-08-17 2013-12-25 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法
US9064808B2 (en) 2011-07-25 2015-06-23 Synopsys, Inc. Integrated circuit devices having features with reduced edge curvature and methods for manufacturing the same
US8609550B2 (en) 2011-09-08 2013-12-17 Synopsys, Inc. Methods for manufacturing integrated circuit devices having features with reduced edge curvature
KR102046761B1 (ko) 2013-01-14 2019-12-02 삼성전자 주식회사 비휘발성 메모리 장치
JP2013254982A (ja) * 2013-08-21 2013-12-19 Tohoku Univ 半導体基板および半導体装置
JP6973475B2 (ja) * 2017-04-06 2021-12-01 株式会社Sumco エピタキシャルシリコンウェーハの製造方法およびエピタキシャルシリコンウェーハ
US11139402B2 (en) 2018-05-14 2021-10-05 Synopsys, Inc. Crystal orientation engineering to achieve consistent nanowire shapes
KR102662765B1 (ko) * 2018-08-02 2024-05-02 삼성전자주식회사 기판과 이를 포함하는 집적회로 소자 및 그 제조 방법
US11264458B2 (en) 2019-05-20 2022-03-01 Synopsys, Inc. Crystal orientation engineering to achieve consistent nanowire shapes
KR102523367B1 (ko) * 2020-02-13 2023-04-21 세메스 주식회사 실리콘 구조물 표면 러프니스 개선 방법 및 기판 처리 장치
CN111364097A (zh) * 2020-04-15 2020-07-03 晶科能源有限公司 一种定向凝固铸锭的单晶硅籽晶、硅锭、硅块、硅片及其制备方法和应用
DE102020209092A1 (de) * 2020-07-21 2022-01-27 Sicrystal Gmbh Kristallstrukturorientierung in Halbleiter-Halbzeugen und Halbleitersubstraten zum Verringern von Sprüngen und Verfahren zum Einstellen von dieser
JP2026065395A (ja) * 2024-10-03 2026-04-15 信越半導体株式会社 シリコン（１１０）基板及びシリコン（１１０）基板の処理方法
JP2026065931A (ja) * 2024-10-04 2026-04-16 信越半導体株式会社 シリコン基板の処理方法

Citations (7)

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JPS59217374A (ja) * 1983-05-26 1984-12-07 Toyota Central Res & Dev Lab Inc 半導体ひずみ変換器
US4768076A (en) * 1984-09-14 1988-08-30 Hitachi, Ltd. Recrystallized CMOS with different crystal planes
EP0354449A2 (en) * 1988-08-08 1990-02-14 Seiko Epson Corporation Semiconductor single crystal substrate
US5966625A (en) * 1995-03-20 1999-10-12 Toshiba Ceramics Co., Ltd. Method for making a slant-surface silicon wafer having a reconstructed atomic-level stepped surface structure
JP2000216378A (ja) * 1999-01-21 2000-08-04 Matsushita Electric Ind Co Ltd Ｍｏｓ型ヘテロ構造および該構造を備えた半導体装置ならびにその製造方法
JP2001253797A (ja) * 2000-03-09 2001-09-18 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハの製造方法及びシリコンエピタキシャルウェーハ
EP1174928A1 (en) * 1999-03-30 2002-01-23 Hitachi, Ltd. Semiconductor device and semiconductor substrate

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Patent Citations (7)

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Publication number Priority date Publication date Assignee Title
JPS59217374A (ja) * 1983-05-26 1984-12-07 Toyota Central Res & Dev Lab Inc 半導体ひずみ変換器
US4768076A (en) * 1984-09-14 1988-08-30 Hitachi, Ltd. Recrystallized CMOS with different crystal planes
EP0354449A2 (en) * 1988-08-08 1990-02-14 Seiko Epson Corporation Semiconductor single crystal substrate
US5966625A (en) * 1995-03-20 1999-10-12 Toshiba Ceramics Co., Ltd. Method for making a slant-surface silicon wafer having a reconstructed atomic-level stepped surface structure
JP2000216378A (ja) * 1999-01-21 2000-08-04 Matsushita Electric Ind Co Ltd Ｍｏｓ型ヘテロ構造および該構造を備えた半導体装置ならびにその製造方法
EP1174928A1 (en) * 1999-03-30 2002-01-23 Hitachi, Ltd. Semiconductor device and semiconductor substrate
JP2001253797A (ja) * 2000-03-09 2001-09-18 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハの製造方法及びシリコンエピタキシャルウェーハ

Also Published As

Publication number Publication date
KR20050098860A (ko) 2005-10-12
EP1592045A1 (en) 2005-11-02
TW200416806A (en) 2004-09-01
JP4190906B2 (ja) 2008-12-03
EP1592045A4 (en) 2010-09-08
CN1748287A (zh) 2006-03-15
TWI326103B (https=) 2010-06-11
US20060131553A1 (en) 2006-06-22
JP2004265918A (ja) 2004-09-24
WO2004070798A1 (ja) 2004-08-19
US7411274B2 (en) 2008-08-12
KR101030455B1 (ko) 2011-04-25

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