ATE437476T1 - Zellenanordnung mit segmentierter zwischenzellstruktur - Google Patents

Zellenanordnung mit segmentierter zwischenzellstruktur

Info

Publication number
ATE437476T1
ATE437476T1 AT01986361T AT01986361T ATE437476T1 AT E437476 T1 ATE437476 T1 AT E437476T1 AT 01986361 T AT01986361 T AT 01986361T AT 01986361 T AT01986361 T AT 01986361T AT E437476 T1 ATE437476 T1 AT E437476T1
Authority
AT
Austria
Prior art keywords
segmented
intercell
cell arrangement
bus system
logic cell
Prior art date
Application number
AT01986361T
Other languages
English (en)
Inventor
Martin Vorbach
Frank May
Dirk Reichardt
Frank Lier
Gerd Ehlers
Armin Nueckel
Volker Baugmarte
Prashant Rao
Jens Oertel
Original Assignee
Pact Xpp Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pact Xpp Technologies Ag filed Critical Pact Xpp Technologies Ag
Application granted granted Critical
Publication of ATE437476T1 publication Critical patent/ATE437476T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17796Structural details for adapting physical parameters for physical disposition of blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Logic Circuits (AREA)
  • Bus Control (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Immobilizing And Processing Of Enzymes And Microorganisms (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
AT01986361T 2000-10-06 2001-10-08 Zellenanordnung mit segmentierter zwischenzellstruktur ATE437476T1 (de)

Applications Claiming Priority (18)

Application Number Priority Date Filing Date Title
US23885500P 2000-10-06 2000-10-06
EPPCT/EP00/10516 2000-10-09
DE10110530 2001-03-05
DE10111014 2001-03-07
DE10135210 2001-07-24
DE10135211 2001-07-24
DE10139170 2001-08-16
DE10142231 2001-08-29
DE10142903 2001-09-03
DE10142894 2001-09-03
DE10142904 2001-09-03
DE10144733 2001-09-11
DE10144732 2001-09-11
DE10145792 2001-09-17
DE10145795 2001-09-17
DE10146132 2001-09-19
EP0111299 2001-09-30
PCT/EP2001/011593 WO2002029600A2 (de) 2000-10-06 2001-10-08 Zellenarordnung mit segmentierterwischenzellstruktur

Publications (1)

Publication Number Publication Date
ATE437476T1 true ATE437476T1 (de) 2009-08-15

Family

ID=56290203

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01986361T ATE437476T1 (de) 2000-10-06 2001-10-08 Zellenanordnung mit segmentierter zwischenzellstruktur

Country Status (5)

Country Link
US (1) US7595659B2 (de)
JP (1) JP2004517386A (de)
AT (1) ATE437476T1 (de)
AU (2) AU2060002A (de)
WO (1) WO2002029600A2 (de)

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
ATE243390T1 (de) 1996-12-27 2003-07-15 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen umladen von datenflussprozessoren (dfps) sowie bausteinen mit zwei- oder mehrdimensionalen programmierbaren zellstrukturen (fpgas, dpgas, o.dgl.)
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
CN1378665A (zh) 1999-06-10 2002-11-06 Pact信息技术有限公司 编程概念
EP1342158B1 (de) 2000-06-13 2010-08-04 Richter, Thomas Pipeline ct-protokolle und -kommunikation
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
CN1319237C (zh) * 2001-02-24 2007-05-30 国际商业机器公司 超级计算机中通过动态重新划分的容错
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
AU2002338729A1 (en) 2001-09-19 2003-04-01 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
DE10392560D2 (de) 2002-01-19 2005-05-12 Pact Xpp Technologies Ag Reconfigurierbarer Prozessor
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
AU2003286131A1 (en) 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
US20070083730A1 (en) * 2003-06-17 2007-04-12 Martin Vorbach Data processing device and method
WO2004038599A1 (de) 2002-09-06 2004-05-06 Pact Xpp Technologies Ag Rekonfigurierbare sequenzerstruktur
EP1676208A2 (de) 2003-08-28 2006-07-05 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
JP4416572B2 (ja) * 2004-05-27 2010-02-17 富士通株式会社 信号処理回路
US20060036826A1 (en) * 2004-07-30 2006-02-16 International Business Machines Corporation System, method and storage medium for providing a bus speed multiplier
US7296129B2 (en) 2004-07-30 2007-11-13 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater
US7441060B2 (en) * 2004-10-29 2008-10-21 International Business Machines Corporation System, method and storage medium for providing a service interface to a memory system
US7512762B2 (en) 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
US7277988B2 (en) * 2004-10-29 2007-10-02 International Business Machines Corporation System, method and storage medium for providing data caching and data compression in a memory subsystem
US7299313B2 (en) 2004-10-29 2007-11-20 International Business Machines Corporation System, method and storage medium for a memory subsystem command interface
US7395476B2 (en) * 2004-10-29 2008-07-01 International Business Machines Corporation System, method and storage medium for providing a high speed test interface to a memory subsystem
DE102004056738B3 (de) * 2004-11-24 2006-05-18 Infineon Technologies Ag Programmierbare Logikzelle für eine programmierbare Logikanordnung, arithmetische Einheit und digitale Schaltungsanordnung
US7478259B2 (en) * 2005-10-31 2009-01-13 International Business Machines Corporation System, method and storage medium for deriving clocks in a memory system
US7685392B2 (en) 2005-11-28 2010-03-23 International Business Machines Corporation Providing indeterminate read data latency in a memory system
WO2007082730A1 (de) 2006-01-18 2007-07-26 Pact Xpp Technologies Ag Hardwaredefinitionsverfahren
US7636813B2 (en) * 2006-05-22 2009-12-22 International Business Machines Corporation Systems and methods for providing remote pre-fetch buffers
US7594055B2 (en) * 2006-05-24 2009-09-22 International Business Machines Corporation Systems and methods for providing distributed technology independent memory controllers
US7584336B2 (en) * 2006-06-08 2009-09-01 International Business Machines Corporation Systems and methods for providing data modification operations in memory subsystems
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7581073B2 (en) * 2006-08-09 2009-08-25 International Business Machines Corporation Systems and methods for providing distributed autonomous power management in a memory system
US7870459B2 (en) * 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
US7603526B2 (en) * 2007-01-29 2009-10-13 International Business Machines Corporation Systems and methods for providing dynamic memory pre-fetch
US8843777B2 (en) * 2008-02-20 2014-09-23 Infineon Technologies Ag Modifying periodic signals produced by microcontroller
WO2010142432A2 (en) 2009-06-09 2010-12-16 Martin Vorbach System and method for a cache in a multi-core processor
JP5504985B2 (ja) * 2010-03-11 2014-05-28 富士ゼロックス株式会社 データ処理装置
WO2015056098A2 (en) * 2013-10-18 2015-04-23 Marvell World Trade Ltd. Systems and methods for register allocation
JP6354194B2 (ja) * 2014-02-18 2018-07-11 富士通株式会社 マルチプレクサ回路、マルチプレクサ回路の設計プログラムおよびマルチプレクサ回路の設計装置
JP2016178229A (ja) 2015-03-20 2016-10-06 株式会社東芝 再構成可能な回路
CN107430586B (zh) * 2015-07-31 2018-08-21 吴国盛 自适应芯片和配置方法
US12132699B2 (en) 2018-07-26 2024-10-29 Secturion Systems, Inc. In-line transmission control protocol processing engine using a systolic array
US11803507B2 (en) 2018-10-29 2023-10-31 Secturion Systems, Inc. Data stream protocol field decoding by a systolic array
GB2580165B (en) * 2018-12-21 2021-02-24 Graphcore Ltd Data exchange in a computer with predetermined delay

Family Cites Families (185)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2067477A (en) 1931-03-20 1937-01-12 Allis Chalmers Mfg Co Gearing
GB971191A (en) 1962-05-28 1964-09-30 Wolf Electric Tools Ltd Improvements relating to electrically driven equipment
GB1253309A (en) 1969-11-21 1971-11-10 Marconi Co Ltd Improvements in or relating to data processing arrangements
DE2057312A1 (de) 1970-11-21 1972-05-25 Bhs Bayerische Berg Planetenradgetriebe mit Lastdruckausgleich
US3855577A (en) 1973-06-11 1974-12-17 Texas Instruments Inc Power saving circuit for calculator system
US4233667A (en) 1978-10-23 1980-11-11 International Business Machines Corporation Demand powered programmable logic array
US4414547A (en) 1981-08-05 1983-11-08 General Instrument Corporation Storage logic array having two conductor data column
US4498134A (en) 1982-01-26 1985-02-05 Hughes Aircraft Company Segregator functional plane for use in a modular array processor
US4590583A (en) * 1982-07-16 1986-05-20 At&T Bell Laboratories Coin telephone measurement circuitry
US4498172A (en) 1982-07-26 1985-02-05 General Electric Company System for polynomial division self-testing of digital networks
US4667190A (en) * 1982-07-30 1987-05-19 Honeywell Inc. Two axis fast access memory
JPS5936857A (ja) 1982-08-25 1984-02-29 Nec Corp プロセツサユニツト
US4663706A (en) 1982-10-28 1987-05-05 Tandem Computers Incorporated Multiprocessor multisystem communications network
US4739474A (en) 1983-03-10 1988-04-19 Martin Marietta Corporation Geometric-arithmetic parallel processor
US4566102A (en) 1983-04-18 1986-01-21 International Business Machines Corporation Parallel-shift error reconfiguration
US5123109A (en) 1983-05-31 1992-06-16 Thinking Machines Corporation Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system
US4870302A (en) 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
USRE34363E (en) 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4761755A (en) 1984-07-11 1988-08-02 Prime Computer, Inc. Data processing system and method having an improved arithmetic unit
US4682284A (en) 1984-12-06 1987-07-21 American Telephone & Telegraph Co., At&T Bell Lab. Queue administration method and apparatus
DE3681463D1 (de) 1985-01-29 1991-10-24 Secr Defence Brit Verarbeitungszelle fuer fehlertolerante matrixanordnungen.
US5023775A (en) 1985-02-14 1991-06-11 Intel Corporation Software programmable logic array utilizing "and" and "or" gates
US5247689A (en) 1985-02-25 1993-09-21 Ewert Alfred P Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments
US4706216A (en) 1985-02-27 1987-11-10 Xilinx, Inc. Configurable logic element
US5015884A (en) 1985-03-29 1991-05-14 Advanced Micro Devices, Inc. Multiple array high performance programmable logic device family
US4972314A (en) 1985-05-20 1990-11-20 Hughes Aircraft Company Data flow signal processor method and apparatus
US4967340A (en) 1985-06-12 1990-10-30 E-Systems, Inc. Adaptive processing system having an array of individually configurable processing components
US4720780A (en) 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
US4852048A (en) 1985-12-12 1989-07-25 Itt Corporation Single instruction multiple data (SIMD) cellular array processing apparatus employing a common bus where a first number of bits manifest a first bus portion and a second number of bits manifest a second bus portion
US5021947A (en) 1986-03-31 1991-06-04 Hughes Aircraft Company Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing
US4882687A (en) 1986-03-31 1989-11-21 Schlumberger Technology Corporation Pixel processor
US5034914A (en) * 1986-05-15 1991-07-23 Aquidneck Systems International, Inc. Optical disk data storage method and apparatus with buffered interface
GB8612396D0 (en) 1986-05-21 1986-06-25 Hewlett Packard Ltd Chain-configured interface bus system
US4860201A (en) 1986-09-02 1989-08-22 The Trustees Of Columbia University In The City Of New York Binary tree parallel processor
US4910665A (en) 1986-09-02 1990-03-20 General Electric Company Distributed processing system including reconfigurable elements
US5367208A (en) * 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
FR2606184B1 (fr) 1986-10-31 1991-11-29 Thomson Csf Dispositif de calcul reconfigurable
US4918440A (en) * 1986-11-07 1990-04-17 Furtek Frederick C Programmable logic cell and array
US4811214A (en) 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
US5226122A (en) 1987-08-21 1993-07-06 Compaq Computer Corp. Programmable logic system for filtering commands to a microprocessor
US5115510A (en) 1987-10-20 1992-05-19 Sharp Kabushiki Kaisha Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information
US5113498A (en) 1987-11-10 1992-05-12 Echelon Corporation Input/output section for an intelligent cell which provides sensing, bidirectional communications and control
USRE34444E (en) 1988-01-13 1993-11-16 Xilinx, Inc. Programmable logic device
US5303172A (en) 1988-02-16 1994-04-12 Array Microsystems Pipelined combination and vector signal processor
JPH06101043B2 (ja) 1988-06-30 1994-12-12 三菱電機株式会社 マイクロコンピュータ
JPH03500461A (ja) * 1988-07-22 1991-01-31 アメリカ合衆国 データ駆動式計算用のデータ流れ装置
US5010401A (en) * 1988-08-11 1991-04-23 Mitsubishi Denki Kabushiki Kaisha Picture coding and decoding apparatus using vector quantization
US4901268A (en) 1988-08-19 1990-02-13 General Electric Company Multiple function data processor
US5204935A (en) 1988-08-19 1993-04-20 Fuji Xerox Co., Ltd. Programmable fuzzy logic circuits
US5353432A (en) 1988-09-09 1994-10-04 Compaq Computer Corporation Interactive method for configuration of computer system and circuit boards with user specification of system resources and computer resolution of resource conflicts
ATE98833T1 (de) 1988-09-22 1994-01-15 Siemens Ag Schaltungsanordnung fuer fernmeldevermittlungsanlagen, insbesondere pcmzeitmultiplex-fernsprechvermittlungsanlagen mit zentralkoppelfeld und angeschlossenen teilkoppelfeldern.
DE68926783T2 (de) 1988-10-07 1996-11-28 Martin Marietta Corp Paralleler datenprozessor
US5014193A (en) 1988-10-14 1991-05-07 Compaq Computer Corporation Dynamically configurable portable computer system
US5136717A (en) 1988-11-23 1992-08-04 Flavors Technology Inc. Realtime systolic, multiple-instruction, single-data parallel computer system
US5041924A (en) 1988-11-30 1991-08-20 Quantum Corporation Removable and transportable hard disk subsystem
US5081375A (en) 1989-01-19 1992-01-14 National Semiconductor Corp. Method for operating a multiple page programmable logic device
US5203005A (en) 1989-05-02 1993-04-13 Horst Robert W Cell structure for linear array wafer scale integration architecture with capability to open boundary i/o bus without neighbor acknowledgement
US5237686A (en) 1989-05-10 1993-08-17 Mitsubishi Denki Kabushiki Kaisha Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority
US5109503A (en) 1989-05-22 1992-04-28 Ge Fanuc Automation North America, Inc. Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters
JP2584673B2 (ja) 1989-06-09 1997-02-26 株式会社日立製作所 テストデータ変更回路を有する論理回路テスト装置
US5182474A (en) * 1991-03-26 1993-01-26 Sodick Co., Ltd. Pulse control circuit for electric discharge machine using programmable logic
CA2021192A1 (en) 1989-07-28 1991-01-29 Malcolm A. Mumme Simplified synchronous mesh processor
US5343406A (en) 1989-07-28 1994-08-30 Xilinx, Inc. Distributed memory architecture for a configurable logic array and method for using distributed memory
US5233539A (en) 1989-08-15 1993-08-03 Advanced Micro Devices, Inc. Programmable gate array with improved interconnect structure, input/output structure and configurable logic block
US5212652A (en) 1989-08-15 1993-05-18 Advanced Micro Devices, Inc. Programmable gate array with improved interconnect structure
US5128559A (en) 1989-09-29 1992-07-07 Sgs-Thomson Microelectronics, Inc. Logic block for programmable logic devices
GB8925723D0 (en) * 1989-11-14 1990-01-04 Amt Holdings Processor array system
DE58908974D1 (de) 1989-11-21 1995-03-16 Itt Ind Gmbh Deutsche Datengesteuerter Arrayprozessor.
US5099447A (en) * 1990-01-22 1992-03-24 Alliant Computer Systems Corporation Blocked matrix multiplication for computers with hierarchical memory
US5125801A (en) 1990-02-02 1992-06-30 Isco, Inc. Pumping system
US5142469A (en) 1990-03-29 1992-08-25 Ge Fanuc Automation North America, Inc. Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller
US5198705A (en) 1990-05-11 1993-03-30 Actel Corporation Logic module with configurable combinational and sequential blocks
US5193202A (en) 1990-05-29 1993-03-09 Wavetracer, Inc. Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor
US5274593A (en) 1990-09-28 1993-12-28 Intergraph Corporation High speed redundant rows and columns for semiconductor memories
US5144166A (en) 1990-11-02 1992-09-01 Concurrent Logic, Inc. Programmable logic cell and array
US5625836A (en) * 1990-11-13 1997-04-29 International Business Machines Corporation SIMD/MIMD processing memory element (PME)
US5276836A (en) * 1991-01-10 1994-01-04 Hitachi, Ltd. Data processing device with common memory connecting mechanism
US5301284A (en) 1991-01-16 1994-04-05 Walker-Estes Corporation Mixed-resolution, N-dimensional object space method and apparatus
US5301344A (en) 1991-01-29 1994-04-05 Analogic Corporation Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets
US5212716A (en) * 1991-02-05 1993-05-18 International Business Machines Corporation Data edge phase sorting circuits
US5218302A (en) * 1991-02-06 1993-06-08 Sun Electric Corporation Interface for coupling an analyzer to a distributorless ignition system
AU2158692A (en) 1991-05-24 1993-01-08 British Technology Group Usa, Inc. Optimizing compiler for computers
JP3259969B2 (ja) * 1991-07-09 2002-02-25 株式会社東芝 キャッシュメモリ制御装置
US5347639A (en) 1991-07-15 1994-09-13 International Business Machines Corporation Self-parallelizing computer system and method
US5338984A (en) 1991-08-29 1994-08-16 National Semiconductor Corp. Local and express diagonal busses in a configurable logic array
FR2681791B1 (fr) 1991-09-27 1994-05-06 Salomon Sa Dispositif d'amortissement des vibrations pour club de golf.
US5208491A (en) 1992-01-07 1993-05-04 Washington Research Foundation Field programmable gate array
FR2686175B1 (fr) 1992-01-14 1996-12-20 Andre Thepaut Systeme de traitement de donnees multiprocesseur.
JP3032382B2 (ja) * 1992-07-13 2000-04-17 シャープ株式会社 デジタル信号のサンプリング周波数変換装置
US5425036A (en) 1992-09-18 1995-06-13 Quickturn Design Systems, Inc. Method and apparatus for debugging reconfigurable emulation systems
US5392437A (en) * 1992-11-06 1995-02-21 Intel Corporation Method and apparatus for independently stopping and restarting functional units
US5361373A (en) 1992-12-11 1994-11-01 Gilson Kent L Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor
US5311079A (en) * 1992-12-17 1994-05-10 Ditlow Gary S Low power, high performance PLA
US5428526A (en) 1993-02-03 1995-06-27 Flood; Mark A. Programmable controller with time periodic communication
JPH06276086A (ja) 1993-03-18 1994-09-30 Fuji Xerox Co Ltd フィールドプログラマブルゲートアレイ
US5418953A (en) * 1993-04-12 1995-05-23 Loral/Rohm Mil-Spec Corp. Method for automated deployment of a software program onto a multi-processor architecture
US5349193A (en) 1993-05-20 1994-09-20 Princeton Gamma Tech, Inc. Highly sensitive nuclear spectrometer apparatus and method
US5444394A (en) 1993-07-08 1995-08-22 Altera Corporation PLD with selective inputs from local and global conductors
US5457644A (en) 1993-08-20 1995-10-10 Actel Corporation Field programmable digital signal processing array integrated circuit
US5440538A (en) 1993-09-23 1995-08-08 Massachusetts Institute Of Technology Communication system with redundant links and data bit time multiplexing
US5455525A (en) 1993-12-06 1995-10-03 Intelligent Logic Systems, Inc. Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array
US5535406A (en) * 1993-12-29 1996-07-09 Kolchinsky; Alexander Virtual processor module including a reconfigurable programmable matrix
US5430687A (en) 1994-04-01 1995-07-04 Xilinx, Inc. Programmable logic device including a parallel input device for loading memory cells
US5781756A (en) * 1994-04-01 1998-07-14 Xilinx, Inc. Programmable logic device with partially configurable memory cells and a method for configuration
US5426378A (en) 1994-04-20 1995-06-20 Xilinx, Inc. Programmable logic device which stores more than one configuration and means for switching configurations
US5537580A (en) * 1994-12-21 1996-07-16 Vlsi Technology, Inc. Integrated circuit fabrication using state machine extraction from behavioral hardware description language
EP0727750B1 (de) * 1995-02-17 2004-05-12 Kabushiki Kaisha Toshiba Server für kontinuierliche Daten und Datentransferschema für mehrfache gleichzeitige Datenzugriffe
US5752035A (en) * 1995-04-05 1998-05-12 Xilinx, Inc. Method for compiling and executing programs for reprogrammable instruction set accelerator
US5748979A (en) * 1995-04-05 1998-05-05 Xilinx Inc Reprogrammable instruction set accelerator using a plurality of programmable execution units and an instruction page table
JP3313007B2 (ja) * 1995-04-14 2002-08-12 三菱電機株式会社 マイクロコンピュータ
US6077315A (en) * 1995-04-17 2000-06-20 Ricoh Company Ltd. Compiling system and method for partially reconfigurable computing
GB9508931D0 (en) * 1995-05-02 1995-06-21 Xilinx Inc Programmable switch for FPGA input/output signals
JP3677315B2 (ja) * 1995-06-01 2005-07-27 シャープ株式会社 データ駆動型情報処理装置
US5652529A (en) * 1995-06-02 1997-07-29 International Business Machines Corporation Programmable array clock/reset resource
US5646544A (en) * 1995-06-05 1997-07-08 International Business Machines Corporation System and method for dynamically reconfiguring a programmable gate array
US5646545A (en) * 1995-08-18 1997-07-08 Xilinx, Inc. Time multiplexed programmable logic device
US5737565A (en) * 1995-08-24 1998-04-07 International Business Machines Corporation System and method for diallocating stream from a stream buffer
US5737516A (en) * 1995-08-30 1998-04-07 Motorola, Inc. Data processing system for performing a debug function and method therefor
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
JP2795244B2 (ja) * 1996-01-17 1998-09-10 日本電気株式会社 プログラムデバッグシステム
US5754459A (en) * 1996-02-08 1998-05-19 Xilinx, Inc. Multiplier circuit design for a programmable logic device
KR0165515B1 (ko) * 1996-02-17 1999-01-15 김광호 그래픽 데이터의 선입선출기 및 선입선출 방법
US5892370A (en) * 1996-06-21 1999-04-06 Quicklogic Corporation Clock network for field programmable gate array
DE19651075A1 (de) * 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
US6338106B1 (en) * 1996-12-20 2002-01-08 Pact Gmbh I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
EP0858168A1 (de) * 1997-01-29 1998-08-12 Hewlett-Packard Company Feldprogrammierbarer Gatterprozessor
US6055619A (en) * 1997-02-07 2000-04-25 Cirrus Logic, Inc. Circuits, system, and methods for processing multiple data streams
DE19704742A1 (de) * 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US5857097A (en) * 1997-03-10 1999-01-05 Digital Equipment Corporation Method for identifying reasons for dynamic stall cycles during the execution of a program
US6035371A (en) * 1997-05-28 2000-03-07 3Com Corporation Method and apparatus for addressing a static random access memory device based on signals for addressing a dynamic memory access device
US5966534A (en) * 1997-06-27 1999-10-12 Cooke; Laurence H. Method for compiling high level programming languages into an integrated processor with reconfigurable logic
US6020760A (en) * 1997-07-16 2000-02-01 Altera Corporation I/O buffer circuit with pin multiplexing
US6170051B1 (en) * 1997-08-01 2001-01-02 Micron Technology, Inc. Apparatus and method for program level parallelism in a VLIW processor
JP4197755B2 (ja) * 1997-11-19 2008-12-17 富士通株式会社 信号伝送システム、該信号伝送システムのレシーバ回路、および、該信号伝送システムが適用される半導体記憶装置
US6212650B1 (en) * 1997-11-24 2001-04-03 Xilinx, Inc. Interactive dubug tool for programmable circuits
DE69827589T2 (de) * 1997-12-17 2005-11-03 Elixent Ltd. Konfigurierbare Verarbeitungsanordnung und Verfahren zur Benutzung dieser Anordnung, um eine Zentraleinheit aufzubauen
DE69841256D1 (de) * 1997-12-17 2009-12-10 Panasonic Corp Befehlsmaskierung um Befehlsströme einem Prozessor zuzuleiten
US6567834B1 (en) * 1997-12-17 2003-05-20 Elixent Limited Implementation of multipliers in programmable arrays
US6105106A (en) * 1997-12-31 2000-08-15 Micron Technology, Inc. Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times
US6216223B1 (en) * 1998-01-12 2001-04-10 Billions Of Operations Per Second, Inc. Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
US6198304B1 (en) * 1998-02-23 2001-03-06 Xilinx, Inc. Programmable logic device
US6374286B1 (en) * 1998-04-06 2002-04-16 Rockwell Collins, Inc. Real time processor capable of concurrently running multiple independent JAVA machines
US6084429A (en) * 1998-04-24 2000-07-04 Xilinx, Inc. PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays
JP3123977B2 (ja) * 1998-06-04 2001-01-15 日本電気株式会社 プログラマブル機能ブロック
US6137307A (en) * 1998-08-04 2000-10-24 Xilinx, Inc. Structure and method for loading wide frames of data from a narrow input bus
US6205458B1 (en) * 1998-09-21 2001-03-20 Rn2R, L.L.C. Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith
US6215326B1 (en) * 1998-11-18 2001-04-10 Altera Corporation Programmable logic device architecture with super-regions having logic regions and a memory region
US6044030A (en) * 1998-12-21 2000-03-28 Philips Electronics North America Corporation FIFO unit with single pointer
US6757847B1 (en) * 1998-12-29 2004-06-29 International Business Machines Corporation Synchronization for system analysis
US6381624B1 (en) * 1999-04-29 2002-04-30 Hewlett-Packard Company Faster multiply/accumulator
US7007096B1 (en) * 1999-05-12 2006-02-28 Microsoft Corporation Efficient splitting and mixing of streaming-data frames for processing through multiple processing modules
US6211697B1 (en) * 1999-05-25 2001-04-03 Actel Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure
US6757892B1 (en) * 1999-06-24 2004-06-29 Sarnoff Corporation Method for determining an optimal partitioning of data among several memories
JP3420121B2 (ja) * 1999-06-30 2003-06-23 Necエレクトロニクス株式会社 不揮発性半導体記憶装置
US6204687B1 (en) * 1999-08-13 2001-03-20 Xilinx, Inc. Method and structure for configuring FPGAS
US6625654B1 (en) * 1999-12-28 2003-09-23 Intel Corporation Thread signaling in multi-threaded network processor
US6487709B1 (en) * 2000-02-09 2002-11-26 Xilinx, Inc. Run-time routing for programmable logic devices
US6871341B1 (en) * 2000-03-24 2005-03-22 Intel Corporation Adaptive scheduling of function cells in dynamic reconfigurable logic
US6362650B1 (en) * 2000-05-18 2002-03-26 Xilinx, Inc. Method and apparatus for incorporating a multiplier into an FPGA
US6373779B1 (en) * 2000-05-19 2002-04-16 Xilinx, Inc. Block RAM having multiple configurable write modes for use in a field programmable gate array
US7340596B1 (en) * 2000-06-12 2008-03-04 Altera Corporation Embedded processor with watchdog timer for programmable logic
US6285624B1 (en) * 2000-07-08 2001-09-04 Han-Ping Chen Multilevel memory access method
US6542844B1 (en) * 2000-08-02 2003-04-01 International Business Machines Corporation Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits
US6754805B1 (en) * 2000-08-07 2004-06-22 Transwitch Corporation Method and apparatus for configurable multi-cell digital signal processing employing global parallel configuration
US6518787B1 (en) * 2000-09-21 2003-02-11 Triscend Corporation Input/output architecture for efficient configuration of programmable input/output cells
US6525678B1 (en) * 2000-10-06 2003-02-25 Altera Corporation Configuring a programmable logic device
US20020045952A1 (en) * 2000-10-12 2002-04-18 Blemel Kenneth G. High performance hybrid micro-computer
US6398383B1 (en) * 2000-10-30 2002-06-04 Yu-Hwei Huang Flashlight carriable on one's person
JP3636986B2 (ja) * 2000-12-06 2005-04-06 松下電器産業株式会社 半導体集積回路
EP1346280A1 (de) * 2000-12-20 2003-09-24 Koninklijke Philips Electronics N.V. Datenverarbeitungseinrichtung mit einer konfigurierbaren funktionseinheit
US6847370B2 (en) * 2001-02-20 2005-01-25 3D Labs, Inc., Ltd. Planar byte memory organization with linear access
US7210129B2 (en) * 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
WO2002082267A1 (en) * 2001-04-06 2002-10-17 Wind River Systems, Inc. Fpga coprocessing system
JP3580785B2 (ja) * 2001-06-29 2004-10-27 株式会社半導体理工学研究センター ルックアップテーブル、ルックアップテーブルを備えるプログラマブル論理回路装置、および、ルックアップテーブルの構成方法
US6868476B2 (en) * 2001-08-27 2005-03-15 Intel Corporation Software controlled content addressable memory in a general purpose execution datapath
US6874108B1 (en) * 2001-08-27 2005-03-29 Agere Systems Inc. Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock
US7216204B2 (en) * 2001-08-27 2007-05-08 Intel Corporation Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
US6854073B2 (en) * 2001-09-25 2005-02-08 International Business Machines Corporation Debugger program time monitor
US6798239B2 (en) * 2001-09-28 2004-09-28 Xilinx, Inc. Programmable gate array having interconnecting logic to support embedded fixed logic circuitry
US7000161B1 (en) * 2001-10-15 2006-02-14 Altera Corporation Reconfigurable programmable logic system with configuration recovery mode
US7567997B2 (en) * 2003-12-29 2009-07-28 Xilinx, Inc. Applications of cascading DSP slices
US8495122B2 (en) * 2003-12-29 2013-07-23 Xilinx, Inc. Programmable device with dynamic DSP architecture
US7472155B2 (en) * 2003-12-29 2008-12-30 Xilinx, Inc. Programmable logic device with cascading DSP slices
US7038952B1 (en) * 2004-05-04 2006-05-02 Xilinx, Inc. Block RAM with embedded FIFO buffer
JP4396446B2 (ja) * 2004-08-20 2010-01-13 ソニー株式会社 情報処理装置および方法、並びにプログラム

Also Published As

Publication number Publication date
JP2004517386A (ja) 2004-06-10
US20040128474A1 (en) 2004-07-01
US7595659B2 (en) 2009-09-29
WO2002029600A2 (de) 2002-04-11
AU2002220600A1 (en) 2002-04-15
WO2002029600A3 (de) 2003-05-15
AU2060002A (en) 2002-04-22

Similar Documents

Publication Publication Date Title
ATE437476T1 (de) Zellenanordnung mit segmentierter zwischenzellstruktur
DE50008983D1 (de) Brennstoffzellensystem mit zugeordneter Wasserstofferzeugungsanlage
DE69929731D1 (de) Polymerelektrolyt-Brennstoffzelle
DE60038074D1 (de) Festpolymerelektrolytbrennstoffzelle-Kogenerationssystem
DE60143833D1 (de) Brennstoffzellen-Antriebssystem
DE10084837T1 (de) Befeuchtungssystem für einen Brennstoffzellen-Stromerzeuger
DE60040897D1 (de) Strömungskanäle in Stromabnehmerplatten von Brennstoffzellen
DE69920279D1 (de) Gespülte anode, brennstoffzelle mit geringen rückständen
DE60044076D1 (de) Strömungskanäle in Stromabnehmerplatten von Brennstoffzellen
DE60045159D1 (de) Polymer-elektolyt-brennstoffzelle
DE60038853D1 (de) Brennstoffzelle
DE69930194D1 (de) Brennstoffzellenanlage
EP0929077A3 (de) Halbleiterspeicher mit eingebautem parallelen Bitprüfmodus
DE59710354D1 (de) IO- UND SPEICHERBUSSYSTEM FÜR DFPs SOWIE BAUSTEINE MIT ZWEI- ODER MEHRDIMENSIONALEN PROGRAMMIERBAREN ZELLSTRUKTUREN
DE19982721T1 (de) Polymer-Elektrolyt-Brennstoffzellenstapel
DE59802714D1 (de) Interkonnektor für sofc-brennstoffzellenstapel
TW358210B (en) A memory device having a hierarchical bit line
DE69221248D1 (de) Zelleinheiten für Festoxidbrennstoffzellen und Energiegenerator, der diese Zelleinheiten verwendet
DE59901314D1 (de) Brennstoffzellensystem
ATA184399A (de) Brennstoffzelle
DE50004314D1 (de) Leitungsverbinder insbesondere für Kraftstoffleitungen
DE59409325D1 (de) Hochtemperatur-Brennstoffzelle mit chromhaltigen Verbindungselementen zwischen elektrochemisch aktiven Platten
NO20021737D0 (no) Enhetsdannet brenselcelle med fast oksid
DE59704481D1 (de) Kühlsystem für eine brennstoffzellenbatterie
DE60137667D1 (de) Brennstoffzellenstapel mit Kühlzellen

Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee