AU2002340879A1 - Method for the translation of programs for reconfigurable architectures - Google Patents

Method for the translation of programs for reconfigurable architectures

Info

Publication number
AU2002340879A1
AU2002340879A1 AU2002340879A AU2002340879A AU2002340879A1 AU 2002340879 A1 AU2002340879 A1 AU 2002340879A1 AU 2002340879 A AU2002340879 A AU 2002340879A AU 2002340879 A AU2002340879 A AU 2002340879A AU 2002340879 A1 AU2002340879 A1 AU 2002340879A1
Authority
AU
Australia
Prior art keywords
translation
programs
reconfigurable architectures
reconfigurable
architectures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002340879A
Inventor
Frank May
Armin Nuckel
Martin Vorbach
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PACT XPP Technologies AG
Original Assignee
PACT XPP Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/967,847 external-priority patent/US7210129B2/en
Priority claimed from PCT/EP2002/002398 external-priority patent/WO2002071248A2/en
Application filed by PACT XPP Technologies AG filed Critical PACT XPP Technologies AG
Publication of AU2002340879A1 publication Critical patent/AU2002340879A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/447—Target code generation
AU2002340879A 2001-08-16 2002-08-16 Method for the translation of programs for reconfigurable architectures Abandoned AU2002340879A1 (en)

Applications Claiming Priority (19)

Application Number Priority Date Filing Date Title
DE10139170 2001-08-16
DE10139170.6 2001-08-16
DE10142903.7 2001-09-03
DE10142903 2001-09-03
DE10144732.9 2001-09-11
DE10144732 2001-09-11
DE10145792 2001-09-17
DE10145792.8 2001-09-17
US09/967,847 US7210129B2 (en) 2001-08-16 2001-09-28 Method for translating programs for reconfigurable architectures
US09/967,847 2001-09-28
DE10154260 2001-11-05
DE10154260.7 2001-11-05
DE10207225.6 2002-02-21
DE10207225 2002-02-21
AU2002257615 2002-03-05
PCT/EP2002/002398 WO2002071248A2 (en) 2001-03-05 2002-03-05 Methods and devices for treating and/or processing data
EP0209131 2002-08-15
EPPCT/EP02/09131 2002-08-15
PCT/EP2002/010065 WO2003017095A2 (en) 2001-08-16 2002-08-16 Method for the translation of programs for reconfigurable architectures

Publications (1)

Publication Number Publication Date
AU2002340879A1 true AU2002340879A1 (en) 2003-03-03

Family

ID=41210636

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002340879A Abandoned AU2002340879A1 (en) 2001-08-16 2002-08-16 Method for the translation of programs for reconfigurable architectures

Country Status (4)

Country Link
JP (1) JP2005508029A (en)
AU (1) AU2002340879A1 (en)
CA (1) CA2458199A1 (en)
WO (1) WO2003017095A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
EP2043000B1 (en) 2002-02-18 2011-12-21 Richter, Thomas Bus systems and reconfiguration method
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
AT501479B8 (en) * 2003-12-17 2007-02-15 On Demand Informationstechnolo DIGITAL COMPUTER DEVICE
DE102005005073B4 (en) * 2004-02-13 2009-05-07 Siemens Ag Computer device with reconfigurable architecture for the parallel calculation of arbitrary algorithms
JP5141151B2 (en) * 2007-09-20 2013-02-13 富士通セミコンダクター株式会社 Dynamic reconfiguration circuit and loop processing control method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5794062A (en) * 1995-04-17 1998-08-11 Ricoh Company Ltd. System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization
US5966534A (en) * 1997-06-27 1999-10-12 Cooke; Laurence H. Method for compiling high level programming languages into an integrated processor with reconfigurable logic

Also Published As

Publication number Publication date
WO2003017095A2 (en) 2003-02-27
JP2005508029A (en) 2005-03-24
CA2458199A1 (en) 2003-02-27
WO2003017095A3 (en) 2004-10-28

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase