AU8417591A - Interface system for data transfer with remote peripheral independently of host processor backplane - Google Patents

Interface system for data transfer with remote peripheral independently of host processor backplane

Info

Publication number
AU8417591A
AU8417591A AU84175/91A AU8417591A AU8417591A AU 8417591 A AU8417591 A AU 8417591A AU 84175/91 A AU84175/91 A AU 84175/91A AU 8417591 A AU8417591 A AU 8417591A AU 8417591 A AU8417591 A AU 8417591A
Authority
AU
Australia
Prior art keywords
data transfer
host processor
interface system
remote peripheral
processor backplane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU84175/91A
Inventor
Daryl B Elam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TEKSTAR SYSTEMS Corp
Original Assignee
TEKSTAR SYSTEMS CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TEKSTAR SYSTEMS CORP filed Critical TEKSTAR SYSTEMS CORP
Publication of AU8417591A publication Critical patent/AU8417591A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G06F9/3881—Arrangements for communication of instructions and data
AU84175/91A 1990-07-16 1991-07-16 Interface system for data transfer with remote peripheral independently of host processor backplane Abandoned AU8417591A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US55414090A 1990-07-16 1990-07-16
US554140 1990-07-16

Publications (1)

Publication Number Publication Date
AU8417591A true AU8417591A (en) 1992-02-18

Family

ID=24212203

Family Applications (1)

Application Number Title Priority Date Filing Date
AU84175/91A Abandoned AU8417591A (en) 1990-07-16 1991-07-16 Interface system for data transfer with remote peripheral independently of host processor backplane

Country Status (2)

Country Link
AU (1) AU8417591A (en)
WO (1) WO1992001987A1 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0683578A (en) * 1992-03-13 1994-03-25 Internatl Business Mach Corp <Ibm> Method for controlling processing system and data throughput
US5325401A (en) * 1992-03-13 1994-06-28 Comstream Corporation L-band tuner with quadrature downconverter for PSK data applications
US5898877A (en) * 1996-02-29 1999-04-27 Sanyo Electric Co., Ltd. Processor using special instruction set to enhance exception handling
EP0928452A1 (en) * 1996-09-25 1999-07-14 Advanced Micro Devices, Inc. Multimedia data controller
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US5944801A (en) * 1997-08-05 1999-08-31 Advanced Micro Devices, Inc. Isochronous buffers for MMx-equipped microprocessors
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2005010632A2 (en) * 2003-06-17 2005-02-03 Pact Xpp Technologies Ag Data processing device and method
US7693257B2 (en) 2006-06-29 2010-04-06 Accuray Incorporated Treatment delivery optimization

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246637A (en) * 1978-06-26 1981-01-20 International Business Machines Corporation Data processor input/output controller
US4309754A (en) * 1979-07-30 1982-01-05 International Business Machines Corp. Data interface mechanism for interfacing bit-parallel data buses of different bit width
US4591973A (en) * 1983-06-06 1986-05-27 Sperry Corporation Input/output system and method for digital computers
US4860244A (en) * 1983-11-07 1989-08-22 Digital Equipment Corporation Buffer system for input/output portion of digital data processing system
US4953930A (en) * 1989-03-15 1990-09-04 Ramtech, Inc. CPU socket supporting socket-to-socket optical communications

Also Published As

Publication number Publication date
WO1992001987A1 (en) 1992-02-06

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