WO2014203477A1 - 電子装置およびその製造方法 - Google Patents

電子装置およびその製造方法 Download PDF

Info

Publication number
WO2014203477A1
WO2014203477A1 PCT/JP2014/002924 JP2014002924W WO2014203477A1 WO 2014203477 A1 WO2014203477 A1 WO 2014203477A1 JP 2014002924 W JP2014002924 W JP 2014002924W WO 2014203477 A1 WO2014203477 A1 WO 2014203477A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
mold resin
electronic device
electronic component
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2014/002924
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
典久 今泉
祐紀 眞田
竹中 正幸
慎也 内堀
賢吾 岡
太助 福田
圭太郎 中間
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to US14/894,637 priority Critical patent/US9941182B2/en
Publication of WO2014203477A1 publication Critical patent/WO2014203477A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present disclosure relates to an electronic device in which an electronic component is mounted on one side of a substrate, and the electronic component and the one side of the substrate are sealed with a mold resin, and a method for manufacturing the electronic device.
  • Patent Document 1 proposes the following manufacturing method.
  • a multiple substrate in which a plurality of substrates are integrally connected and partitioned by a dicing line is prepared, and an electronic component is mounted on one surface of each substrate in the multiple substrate.
  • a mold resin for sealing one surface of the multiple substrate together with the electronic component is formed.
  • a groove is formed in a portion of the mold resin located on the dicing line, and the groove is tapered from the opening toward the depth. That is, a groove portion having a V-shaped cross section is formed in a portion of the mold resin located on the dicing line.
  • the electronic component is mounted on one surface side of the substrate, and the electronic component and the one surface side of the substrate are made of the mold resin.
  • a sealed electronic device is manufactured.
  • the cutting direction is set to be parallel to the normal direction to one surface of the multiple substrate.
  • the cutting time can be shortened.
  • the groove portion has a V-shaped cross section, and the side wall of the groove portion is inclined with respect to the normal direction to one surface of the multiple substrate. For this reason, when cutting the mold resin with the dicing blade, the dicing blade is brought into contact with the side wall of the groove, but the cutting direction and the side wall of the groove are non-perpendicular, so that the dicing blade easily slides along the side wall of the groove.
  • the dicing blade may meander.
  • This indication aims at providing the electronic device which can suppress that a dicing blade meanders at the time of cutting mold resin with a dicing blade, and its manufacturing method in view of the above-mentioned point.
  • the electronic device is configured as follows.
  • a substrate an electronic component mounted on one surface of the substrate, and a mold resin that seals the one surface of the substrate together with the electronic component, the other surface (also referred to as the first substrate surface) on the opposite side (first surface)
  • the second substrate surface is also exposed from the mold resin.
  • At least one side surface between the one surface and the other surface of the substrate is a cut surface cut together with the mold resin, and the mold resin is cut together with the substrate and is a surface that is flush with the cut surface.
  • the portion constituting the surface is connected to the surface that is the same plane, has a surface parallel to one surface of the substrate, and is thinner than the portion that seals the electronic component.
  • the mold resin has a surface that is cut together with the substrate, and a surface that is connected to the surface and parallel to one surface of the substrate. That is, the mold resin is cut by contacting the dicing blade with a surface parallel to one surface of the substrate. For this reason, the cutting direction and the surface on which the dicing blade contacts are perpendicular to each other, and the dicing blade can be prevented from meandering.
  • a method for manufacturing an electronic device is configured as follows.
  • a dicing blade is placed along the dicing line from the one surface side of the multiple substrate. The cutting process which divides
  • segments a multiple substrate is performed by cut
  • each mold resin for sealing one surface of the substrate is connected and integrated at a portion located on the dicing line, and a groove is formed at the portion located on the dicing line.
  • the thickness of the portion located on the dicing line is made thinner than the portion that seals the electronic component
  • the bottom surface of the groove is parallel to one surface of the multiple substrate
  • the width of the bottom surface is longer than the thickness of the dicing blade.
  • the dicing blade is brought into contact with the bottom surface of the groove to cut the mold resin.
  • the bottom surface of the groove portion is made parallel to one surface of the multiple substrate, the width of the bottom surface is made longer than the thickness of the dicing blade, and the mold resin is cut by bringing the dicing blade into contact with the bottom surface of the groove portion. Yes. For this reason, a cutting direction and the bottom face of a groove part become perpendicular, and it can control that a dicing blade meanders.
  • FIG. 1 is a cross-sectional view of an electronic device according to a first embodiment of the present disclosure
  • FIG. 2 is a cross-sectional view of an electronic device having a cross section different from that of FIG. 1 in the first embodiment of the present disclosure
  • FIG. 3 is a plan view of the electronic device shown in FIGS. 1 and 2 in the first embodiment of the present disclosure
  • It is sectional drawing which shows the manufacturing process of the electronic device shown in FIG. It is a top view of FIG.4 (c), It is an enlarged view of the area
  • FIG. 16 is a diagram illustrating a cross section different from that of FIG. 12 and FIG. 15 for an electronic device according to a third embodiment of the present disclosure
  • FIG. 16 is a plan view of the electronic device shown in FIGS. 12, 13 and 15;
  • FIG. 14 is a diagram illustrating a cross section different from that of FIG. 12 and FIG. 13 regarding an electronic device according to a third embodiment of the present disclosure; It is a top view of the work in the molding process of Drawing 4 (c) about the electronic device in a 3rd embodiment of this indication, It is sectional drawing of the electronic device in the modification of 3rd Embodiment of this indication, It is a figure which shows a different cross section from FIG. 17 about the electronic device in the modification of 3rd Embodiment of this indication, FIG. 19 is a plan view of the electronic device shown in FIGS.
  • FIG. 25 is a plan view of the electronic device shown in FIG. 24.
  • 3 is a cross-sectional view showing a state where an electronic device is accommodated in a magazine 6.
  • the electronic device is preferably mounted on a vehicle such as an automobile and applied as a device for driving each device for the vehicle.
  • the electronic device is configured to include a substrate 10, electronic components 20 and 30 mounted on the substrate 10, a mold resin 40 that seals the electronic components 20 and 30, and the like.
  • Yes. 1 is a cross-sectional view taken along the line II in FIG. 3
  • FIG. 2 is a cross-sectional view taken along the line II-II in FIG.
  • the substrate 10 has one surface 11 (also referred to as the first substrate surface 11) on which the electronic components 20 and 30 are mounted and the mold resin 40 is disposed, and the other surface 12 (second substrate surface 12) opposite to the one surface 11.
  • the planar shape is a rectangular plate-like member.
  • the substrate 10 according to the present embodiment is a wiring substrate based on a resin such as an epoxy resin, and is configured by, for example, a through substrate or a build-up substrate.
  • a wiring pattern (not shown) constituted by inner layer wiring or surface layer wiring is formed on the substrate 10.
  • This wiring pattern (surface layer wiring) is sealed with the mold resin 40 together with the electronic components 20 and 30 and extends to the outside of the mold resin 40.
  • the electronic components 20 and 30 are mounted on the substrate 10 and are electrically connected to the wiring pattern, and surface mounting components, through-hole mounting components, and the like are used.
  • the semiconductor element 20 and the passive element 30 are exemplified as the electronic components 20 and 30.
  • Examples of the semiconductor element 20 include a power element such as a microcomputer, a control element, or an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).
  • the wire 21 and a die bond material 22 such as solder are connected to the land 15 of the substrate 10.
  • examples of the passive element 30 include a chip resistor, a chip capacitor, and a crystal resonator.
  • the passive element 30 is connected to the land 15 of the substrate 10 by a die bond material 31 such as solder.
  • the land 15 is connected to the wiring pattern or is constituted by a part of the wiring pattern. Therefore, the electronic components 20 and 30 are electrically connected to the wiring pattern formed on the substrate 10 and can be electrically connected to an external circuit through the through hole 13 connected to the wiring pattern.
  • the mold resin 40 is made of a thermosetting resin such as an epoxy resin, and is formed by a transfer molding method using a mold or a compression molding method.
  • a so-called half mold structure is formed in which the one surface 11 side of the substrate 10 is sealed with the mold resin 40 and the other surface 12 side of the substrate 10 is exposed without being sealed with the mold resin 40.
  • the mold resin 40 of the present embodiment will be specifically described. As shown in FIGS. 1 to 3, the mold resin 40 has a rectangular shape on the top surface of the portion that seals the electronic components 20 and 30.
  • the mold resin 40 is formed only on the inner side of both sides so as to expose two opposite sides that are perpendicular to the longitudinal direction (up and down direction in FIG. 3) of the one surface 11 of the substrate 10. That is, the mold resin 40 is formed such that the through holes 13 and the fixing holes 14 formed at both ends in the longitudinal direction of the substrate 10 are exposed.
  • the mold resin 40 is disposed in a portion excluding both ends of two sides (two sides extending in the vertical direction on the paper surface in FIG. 3) parallel to the longitudinal direction of the one surface 11 of the substrate 10.
  • the mold resin 40 includes a first surface 40a located on the electronic components 20 and 30, and a side that is parallel to the longitudinal direction of the first surface 11 of the substrate 10 relative to the first surface 40a (outside the first surface 40a). And a second surface 40b located on the side.
  • the first and second surfaces 40 a and 40 b are parallel to the one surface 11 of the substrate 10.
  • the length of the second surface 40b in the longitudinal direction of the substrate 10 is longer than the length of the first surface 40a in the longitudinal direction of the substrate 10.
  • the distance between the second surface 40b and the one surface 11 of the substrate 10 is shorter than the distance between the first surface 40a and the one surface 11 of the substrate 10. That is, in the mold resin 40, the thickness of the portion 42 formed in the vicinity of the side parallel to the longitudinal direction on the one surface 11 of the substrate 10 is made thinner than the thickness of the portion covering the electronic components 20 and 30. In the present embodiment, the thickness of the portion formed in the vicinity of the side parallel to the longitudinal direction on the one surface 11 of the substrate 10 is set to 0.5 to 1.5 mm.
  • a portion (surface) on the side parallel to the longitudinal direction of the one surface 11 of the substrate 10 in the mold resin 40 is a third surface 40c that is flush with the side surface 10a of the substrate 10 having the side.
  • the side surface 10a of the substrate 10 and the third surface 40c of the mold resin 40 are cut surfaces (cut resin surfaces) formed by a cutting process described later, and the electronic device of the present embodiment includes the side surface 10a and the third surface. There are two 40c.
  • the mold resin 40 has a fourth surface 40d that connects the first surface 40a and the second surface 40b, and a fifth surface 40e that connects the first surface 40a and the one surface 11 of the substrate 10.
  • the fourth surface 40 d is a tapered surface that is inclined with respect to the normal direction to the one surface 11 of the substrate 10.
  • the fifth surface 40 e is a tapered surface in which the portion on the first surface 40 a side is inclined with respect to the normal direction to the one surface 11 of the substrate 10, and the portion on the one surface 11 side of the substrate 10 is relative to the one surface 11 of the substrate 10.
  • the surface is parallel to the normal direction. The reason why the portion of the fifth surface 40e on the one surface 11 side of the substrate 10 is a surface parallel to the normal direction to the one surface 11 of the substrate 10 is to facilitate observation of the peeled state of the mold resin 40.
  • a multiple substrate 100 in which a plurality of substrates 10 are integrally connected in a plane and each substrate 10 is partitioned by a dicing line 101 is prepared.
  • the multiple substrate 100 of this embodiment has four substrates 10. Further, a through hole 13 and a fixing hole 14 are formed in a portion of each substrate 10 that is not sealed with the mold resin 40 in a cross section different from that shown in FIG. In FIG. 4, the longitudinal direction of each substrate 10 is the depth direction of the paper surface in FIG. 4.
  • the electronic components 20, 30 are mounted on the lands 15 of the substrates 10, respectively, and the lands 15, the electronic components 20, 30 are Are appropriately electrically connected.
  • the transfer molding method or the compression mold using the mold 200 is performed so that the electronic parts 20, 30 and the one surface 100 a side of the multiple substrate 100 are sealed.
  • Mold resin 40 is formed by a method or the like. In FIG. 5, the mold 200 is omitted.
  • a gold 201 having a concave portion 201 forming the outer shape of the mold resin 40 formed on one surface 200a and a protruding portion 202 formed on a portion of the concave portion 201 facing the dicing line 101 of the multiple substrate 100.
  • a mold 200 is prepared.
  • the electronic components 20 and 30 are disposed in the recess 201, and the mold resin 40 is brought into contact with the outer edge of the multiple substrate 10 so that the bottom surface of the recess 201 and the one surface 100a of the multiple substrate 100 are parallel to each other. Is molded.
  • the mold resin 40 is also formed on the dicing line 101, and the portions formed on each substrate 10 are connected and integrated at the portions formed on the dicing line 101. Further, the front end surface in the protrusion direction of the protrusion 202 (hereinafter simply referred to as the front end surface) is parallel to the bottom surface of the recess 201, and the width (the length in the left-right direction in FIG. The width and the thickness of a dicing blade 210 described later are set longer.
  • the mold resin 40 in which the groove portion 41 is formed by the protruding portion 202 is formed in a portion located on the dicing line 101 and a portion in contact with the dicing line 101 in each substrate 10.
  • the thickness of the portion positioned on the dicing line 101 and the portion in contact with the dicing line 101 in each substrate 10 is made thinner than the portion for sealing the electronic components 20 and 30.
  • the bottom surface of the groove 41 is parallel to the one surface 100a of the multiple substrate 100, and the width is made longer than the thickness of the dicing blade 210 described later.
  • the distance between the front end surface of the protrusion 202 and the one surface 100a of the multiple substrate 100 is preferably 0.5 to 1.5 mm. That is, it is preferable that the thickness of the mold resin 40 located on the dicing line 101 and each substrate 10 on the portion in contact with the dicing line 101 is 0.5 to 1.5 mm.
  • the resin flow is inhibited between the front end surface of the protruding portion 202 and the first surface 100a of the multiple substrate 100. This is because voids or the like may occur in the mold resin 40.
  • the dicing line 101 at the end of the multiple substrate 100 is changed in the step of FIG. This is because the dicing blade 210 may meander when cutting.
  • the dicing line 101 at the end of the multiple substrate 100 is a dicing line 101 that is not located between adjacent substrates 10, and is located at both ends of the five dicing lines 101 in FIG. 4. This is the dicing line 101 to be used.
  • the meandering occurs when the thickness of the mold resin 40 is greater than 1.5 mm, because the portion located on the opposite side of the substrate 10 from the dicing line 101 is cut. This is because fluctuations in time become large.
  • the multiple substrate 100 is cut along the dicing line 101 by bringing the dicing blade 210 into contact with only the bottom surface of the groove 41 so as not to touch the side surface. Then, each substrate 10 is divided. Thereby, the electronic device is manufactured.
  • the cutting direction of the dicing blade 210 and the surface with which the dicing blade 210 abuts are perpendicular. For this reason, it can suppress that the dicing blade 210 meanders.
  • the bottom surface of the groove 41 is formed on the dicing line 101 and on the portion of each substrate 10 that is in contact with the dicing line 101. For this reason, the second surface 40b of the mold resin 40 is constituted by the bottom surface of the groove 41 remaining when the multiple substrate 10 is cut.
  • the mold resin 40 in which the groove portion 41 is formed by the protruding portion 202 is formed on the portion located on the dicing line 101 and the portion of each substrate 10 in contact with the dicing line 101. .
  • the thickness of the portion located on the dicing line 101 and the portion in contact with the dicing line 101 in each substrate 10 is made thinner than the portion for sealing the electronic components 20 and 30.
  • the bottom surface of the groove 41 is parallel to the one surface 100a of the multiple substrate 100, and the width is longer than the thickness of a dicing blade 210 described later.
  • the cutting direction and the mold resin 40 with which the dicing blade 210 abuts are perpendicular to each other, and the dicing blade 210 can be prevented from meandering.
  • the thickness of the portion constituting the third surface 40c is made thinner than the thickness of the portion constituting the electronic components 20 and 30. For this reason, compared with the case where mold resin 40 is made constant by the thickness of the part which seals electronic parts 20 and 30, between the part which constitutes the 3rd surface 40c among substrate 10 and mold resin 40. The stress generated between them can be reduced, and the mold resin 40 can be prevented from peeling off.
  • the portion constituting the second surface 40 b of the mold resin 40 has two sides parallel to the longitudinal direction of the one surface 11 of the substrate 10. Of the regions in the vicinity of (two sides extending in the left-right direction in FIG. 8), only the region in the vicinity of the center of the two sides is formed. That is, the length of the second surface 40b in the longitudinal direction of the substrate 10 is shorter than that of the first surface 40a. The outside of the substrate 10 in the vicinity of the central part of the two sides is exposed from the mold resin 40.
  • the length of the second surface 40b in the longitudinal direction of the substrate 10 is 1/5 to 2/3 of the length of the substrate 10 in the longitudinal direction. .
  • the through hole 13 and the surface layer wiring are formed in a portion exposed from the mold resin 40 in the region near the two sides parallel to the longitudinal direction of the substrate 10.
  • the molding resin 40 formed on each substrate 10 is connected only on the center portion of the dicing line 101. It is manufactured by forming the mold resin 40.
  • the length in the longitudinal direction of the portion of the substrate 10 connecting the mold resin 40 formed on each substrate 10 is the longitudinal direction of the substrate 10. Is preferably about 1/5 to 2/3.
  • the length of the substrate 10 in the longitudinal direction is shorter than 1/5, the resin flow is inhibited between the front end surface of the protruding portion 202 and the one surface 100a of the multiple substrate 100, and voids or the like are generated in the mold resin 40. This is because there is a possibility. Further, when the length in the longitudinal direction of the substrate 10 is longer than 2/3, the portion exposed from the mold resin 40 in the region near the two sides parallel to the longitudinal direction in the substrate 10 is reduced, and the through holes 13 and the like are formed. This is because it is difficult to secure a sufficient space for formation.
  • the mold resin 40 located on the dicing line 101 is reduced, the total amount of the mold resin 40 can be reduced, and the cost can be reduced.
  • the through hole 13 etc. can be formed in the part which is not sealed with the mold resin 40 near the two sides parallel to the longitudinal direction in the substrate 10, and the area of the substrate 10 can be effectively utilized.
  • a portion of the substrate 10 that is not sealed with the mold resin 40 in the vicinity of two sides parallel to the longitudinal direction can be used as an air vent (air vent portion), and generation of voids in the mold resin 40 can be suppressed.
  • a third embodiment of the present disclosure will be described with reference to FIGS. 2 and 12 to 16.
  • the configuration of a portion (hereinafter, referred to as a thin portion 42) made thinner than the thickness of the portion covering the electronic components 20, 30 in the mold resin 40 is changed with respect to the first embodiment.
  • the thin portion 42 is a portion that covers the electronic components 20 and 30 in the mold resin 40 described in the first embodiment, and is in the vicinity of a side that is parallel to the longitudinal direction of the one surface 11 of the substrate 10. It is the part formed in. Since other aspects are basically the same as those in the first embodiment, only portions different from those in the first embodiment will be described here.
  • the cross-sectional view of the electronic device having a cross section different from those in FIGS. 12, 13, and 15 is the same as the cross section in the first embodiment.
  • the thin portion 42 is positioned in the longitudinal direction of the first surface 11 of the substrate 10 when viewed from the direction normal to the first surface 11 of the substrate 10. In the entire range, the fourth surface 40d was extended to the end of the first surface 11 of the substrate 10. However, in the present embodiment, as shown in FIGS. 12 to 15, the thin portion 42 has the fourth surface 40 d only in a part of the entire range where the fourth surface 40 d is located in the longitudinal direction of the one surface 11 of the substrate 10. To the end of one surface 11 of the substrate 10.
  • the sealing region in which the thin portion 42 is formed and the thin portion 42 in the direction of the boundary line between the one surface 11 of the substrate 10 and the cut surface (third surface 40c) of the mold resin 40 It has the part 5 by which the exposed area
  • this portion 5 is referred to as an alternately arranged portion 5.
  • the sealing region refers to a region where the one surface 11 of the substrate 10 is sealed by the thin portion 42 when viewed from the direction of the normal to the one surface 11 of the substrate 10.
  • the exposed region refers to a region where the one surface 11 of the substrate 10 is exposed to the outside without being sealed by the thin portion 42 when viewed from the normal direction to the one surface 11 of the substrate 10.
  • one electrode (hereinafter referred to as a first electrode) 16 is disposed in each of a plurality of exposed regions disposed on the one surface 11 of the substrate 10. These first electrodes 16 are configured as electrodes having different potentials. Therefore, in the present embodiment, a plurality of first electrodes 16 that are electrodes having different potentials are provided on one surface 11 of the substrate 10 in different exposed regions in the alternately arranged portions 5.
  • the first electrode 16 is electrically connected to the electronic components 20 and 30 via a wiring pattern (not shown) provided on the substrate 10 and is connected to an external device (motor or the like) via a wiring (not shown). Is electrically connected.
  • the thickness of the mold resin 40 located in the sealing region arranged between the two first electrodes 16 arranged in different exposed regions and having different potentials is made larger than the thickness of the two first electrodes 16. Yes.
  • the thickness of the mold resin 40 is 0.5 to 1.5 mm
  • the thickness of the two first electrodes 16 is 0.1 to 1.0 mm.
  • the mold resin 40 formed on each substrate 10 is intermittently diced in the longitudinal direction of the one surface 11 of the substrate 10. They are connected by a line 101.
  • the sealing region in which the thin portion 42 is formed and the thin portion 42 are formed in the direction of the boundary line between the one surface 11 of the substrate 10 and the cut surface (third surface 40c). Interleaved portions 5 are arranged alternately with exposed areas that are not.
  • a plurality of first electrodes 16 are provided on one surface 11 of the substrate 10 so that the first electrodes 16 that are electrodes having different potentials are arranged in different exposed regions.
  • the first electrode 16 is disposed in a portion of the surface 11 of the substrate 10 where the thin portion 42 is removed, so that the first surface 11 does not have to be increased without increasing the area of the surface 11 of the substrate 10.
  • the electrode 16 can be disposed, and the electronic device can be reduced in size.
  • at least three sides around each of the plurality of first electrodes 16 is a sealing region. In the sealing region, the substrate 10 and the mold resin 40 are connected to each other.
  • the periphery is compared to the case where the periphery is exposed to the outside without being sealed at all. Therefore, it is possible to provide an electronic device with high strength and excellent vibration resistance.
  • the mold resin 40 is disposed between the two first electrodes 16 having different potentials disposed in different exposed regions on the one surface 11 of the substrate 10. As a result, the creepage distance between the two first electrodes 16 is increased, so that in the electronic device according to the present embodiment, the insulation can be improved, and the leakage current hardly flows.
  • the thickness of the mold resin 40 positioned in the sealing region disposed between the first electrodes 16 having different potentials disposed in different exposed regions is different from that of the first resin 16 having different potentials. It is configured to be thicker than the thickness of one electrode 16.
  • the spatial distance between the two first electrodes 16 having different potentials arranged in different exposed regions becomes long.
  • the thermal distance becomes long.
  • the insulation can be improved and the leakage current hardly flows.
  • the thin portion 42 includes a portion in which the thin portion 42 extends from the fourth surface 40d to the end of the one surface 11 of the substrate 10 in the longitudinal direction of the one surface 11 of the substrate 10, and the fourth surface 40d.
  • the electronic components 20 and 30 are sealed across the exposed region where the thin portion 42 does not extend from the fourth surface 40d at all.
  • a sealing region may be disposed in contact with the exposed region.
  • Each of the plurality of first electrodes 16 includes a portion of the mold resin 40 that is located in the sealing region of the alternately arranged portion 5, a portion that seals the electronic components 20 and 30, and the electronic components 20 and 30. You may be surrounded by the part located in the sealing area
  • such an electronic device is manufactured by forming the mold resin 40 so that the thin portion 42 extends along the dicing line 101 in the molding step of FIG. Is possible.
  • FIG. 1 A fourth embodiment of the present disclosure will be described with reference to FIGS. 2, 12, and 21 to 23.
  • FIG. the shape of the thin portion 42 is changed with respect to the third embodiment, and the other parts are basically the same as those of the third embodiment. Therefore, the portions different from the third embodiment are here. Only that will be described.
  • the cross-sectional view of the electronic device having a cross section different from that in FIG. 21 is the same as the cross section in the third embodiment.
  • the thin portions 42 are respectively arranged on both sides of a portion of the mold resin 40 that seals the electronic components 20 and 30.
  • the thin portion 42 is not arranged in the range where the through hole 13 is located in the longitudinal direction of the one surface 11 of the substrate 10.
  • the thin portions 42 arranged on both sides as described above have through holes (hereinafter referred to as second holes) in the longitudinal direction of the one surface 11 of the substrate 10. It is extended so that it may also be arranged in the area where the electrode 13 is located.
  • the thin portions 42 respectively disposed on both sides as described above are disposed so as to include from end to end in the longitudinal direction of the first surface 11 of the substrate 10 of the second electrode 13.
  • the thin-walled portions 42 arranged on both sides as described above, respectively, in the direction of the boundary line between the one surface 11 of the substrate 10 and the cut surface (third surface 40c), the electronic component 20 of the mold resin 40, A mold protrusion 43 protruding outward from the portion sealing 30 is provided.
  • a second electrode 13 which is an electrode different from the first electrode, is provided on one surface 11 of the substrate 10.
  • the periphery of the second electrode 13 is a sealing region, the periphery can have higher strength, and the electronic device can be more excellent in vibration resistance.
  • the method of manufacturing the electronic device using the multiple substrate 100 in which the four substrates 10 are integrated has been described.
  • how many substrates 10 are included in the multiple substrate 100 ? Also good.
  • eight substrates 10 are integrated, and each substrate 10 is divided by a dicing line 101 extending in a longitudinal direction and a direction perpendicular to the longitudinal direction. It may be manufactured.
  • three side surfaces 10 a serving as cut surfaces are formed on the substrate 10 and a third surface 40 c serving as a cut surface is formed on the mold resin 40. Three are formed.
  • any number of substrates 10 may be included in the multiple substrate 100.
  • the fourth surface 40d that connects the first surface 40a and the second surface 40b and the fifth surface 40e that connects the first surface 40a and the one surface 11 of the substrate 10 correspond to the one surface 11 of the substrate 10.
  • the surface may be parallel to the normal direction.
  • the fourth surface 40d and the fifth surface 40e are surfaces whose first surface 40a side is parallel to the normal direction to the one surface 11 of the substrate 10, and are on the second surface 40b side or the one surface 11 side of the substrate 10.
  • the portion may be a tapered surface inclined with respect to the normal direction to the one surface 11 of the substrate 10.
  • the position of the leftmost dicing line 101 in the left-right direction in the cross section is set such that the distance from the left end of the thin portion 42 to the dicing line 101 is that of the thin portion 42. It is particularly preferable to set the position to be 1/2 or more of the thickness. In this case, it is easy to ensure the stability of the portion that becomes the end material by cutting (the end portion of the multiple substrate 100), and during the cutting, the end material is caused to flow away from the dicing line and the dicing blade meanders. It becomes difficult to happen.
  • a configuration having the mold protrusion 43 as in the fourth embodiment may be adopted.
  • the same effect as in the fourth embodiment can be obtained. That is, even in this case, since the periphery of the second electrode 13 is a sealing region, the periphery has higher strength, and an electronic device with more excellent vibration resistance can be obtained.
  • the second surface 40 b parallel to the first surface 11 of the substrate 10 is formed on the entire periphery of the outer edge of the mold resin 40 as viewed from the direction of the normal to the first surface 11 of the substrate 10.
  • the thin portion 42 may be thinner than the thickness of the portion covering the electronic components 20 and 30. That is, the entire periphery of the outer edge of the mold resin 40 may be the second surface 40b that is a flat surface.
  • the outer edge of the mold resin 40 is a flat surface, inspection by ultrasonic flaw detection is possible, and peeling of the mold resin 40 from the substrate 10 at the end of the mold resin 40 can be detected.
  • the outer edge of the mold resin 40 is a thin portion 42
  • the substrate 10 and the mold resin 40 are compared with the case where the thickness of the portion of the mold resin 40 that seals the electronic components 20 and 30 is constant. Can be reduced, and peeling of the mold resin 40 can be suppressed.
  • the flat second surface 40b is brought into contact with the support surface 6a of the magazine 6. Can be accommodated.
  • the mold resin 40 may be peeled off from the substrate 10.
  • the weight of the substrate 10 is a force in a direction to bring the substrate 10 and the mold resin 40 closer to each other. Therefore, the mold resin 40 is difficult to peel from the substrate 10.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Geometry (AREA)
  • Dicing (AREA)
PCT/JP2014/002924 2013-06-21 2014-06-03 電子装置およびその製造方法 Ceased WO2014203477A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/894,637 US9941182B2 (en) 2013-06-21 2014-06-03 Electronic device and method for manufacturing same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2013-130304 2013-06-21
JP2013130304 2013-06-21
JP2014-065942 2014-03-27
JP2014065942A JP6115505B2 (ja) 2013-06-21 2014-03-27 電子装置

Publications (1)

Publication Number Publication Date
WO2014203477A1 true WO2014203477A1 (ja) 2014-12-24

Family

ID=52104229

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2014/002924 Ceased WO2014203477A1 (ja) 2013-06-21 2014-06-03 電子装置およびその製造方法

Country Status (3)

Country Link
US (1) US9941182B2 (enExample)
JP (1) JP6115505B2 (enExample)
WO (1) WO2014203477A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6194804B2 (ja) 2014-01-23 2017-09-13 株式会社デンソー モールドパッケージ
EP3613075B1 (en) * 2017-05-02 2020-11-18 ABB Schweiz AG Resin encapsulated power semiconductor module with exposed terminal areas
KR102825809B1 (ko) * 2020-07-10 2025-06-27 삼성전자주식회사 언더필이 구비된 반도체 패키지 및 이의 제조 방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003204018A (ja) * 2002-01-08 2003-07-18 Hitachi Cable Ltd 半導体装置及びその製造方法
JP2012238725A (ja) * 2011-05-12 2012-12-06 Toshiba Corp 半導体装置とその製造方法、およびそれを用いた半導体モジュール
US20130037966A1 (en) * 2011-08-10 2013-02-14 Freescale Semiconductor, Inc Semiconductor device die bonding

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01175240A (ja) 1987-12-28 1989-07-11 Sharp Corp 半導体チップの製造方法
US5834336A (en) * 1996-03-12 1998-11-10 Texas Instruments Incorporated Backside encapsulation of tape automated bonding device
JP3569386B2 (ja) 1996-05-27 2004-09-22 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法およびそれにより得られるモジュール基板ならびに電子機器
DE19640304C2 (de) * 1996-09-30 2000-10-12 Siemens Ag Chipmodul insbesondere zur Implantation in einen Chipkartenkörper
JP3859318B2 (ja) 1997-08-29 2006-12-20 シチズン電子株式会社 電子回路のパッケージ方法
JP2000040711A (ja) 1998-07-23 2000-02-08 Sony Corp 樹脂封止型半導体装置とその製造方法
JP2002110718A (ja) 2000-09-29 2002-04-12 Hitachi Ltd 半導体装置の製造方法
JP2002190565A (ja) 2000-12-20 2002-07-05 Taiyo Yuden Co Ltd ハイブリッドic及びその製造方法
JP2005161695A (ja) * 2003-12-03 2005-06-23 Towa Corp 樹脂封止装置及び樹脂封止方法
JP4477976B2 (ja) * 2004-09-30 2010-06-09 株式会社ルネサステクノロジ 半導体装置の製造方法
WO2006129926A1 (en) 2005-06-02 2006-12-07 Tsp Co., Ltd. Mold for manufacturing semiconductor device and semiconductor device manufactred using the same
JP2007109831A (ja) 2005-10-13 2007-04-26 Towa Corp 電子部品の樹脂封止成形方法
FR2893764B1 (fr) * 2005-11-21 2008-06-13 St Microelectronics Sa Boitier semi-conducteur empilable et procede pour sa fabrication
JP2007281207A (ja) 2006-04-07 2007-10-25 Renesas Technology Corp 半導体装置の製造方法
JP4836661B2 (ja) * 2006-05-17 2011-12-14 Towa株式会社 電子部品の樹脂封止成形方法及び樹脂封止成形用金型
JP4376884B2 (ja) * 2006-09-20 2009-12-02 シャープ株式会社 半導体装置及び、半導体装置の製造方法
JP2008082768A (ja) 2006-09-26 2008-04-10 Kobe Steel Ltd 熱式流量センサ
TWI336502B (en) * 2006-09-27 2011-01-21 Advanced Semiconductor Eng Semiconductor package and semiconductor device and the method of making the same
JP4926869B2 (ja) 2007-07-26 2012-05-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5157456B2 (ja) * 2008-01-08 2013-03-06 富士通セミコンダクター株式会社 半導体装置及び半導体装置の製造方法
JP2009170476A (ja) * 2008-01-11 2009-07-30 Panasonic Corp 半導体装置および半導体装置の製造方法
DE102008052393B3 (de) 2008-10-21 2010-02-25 Continental Automotive Gmbh Massenstromsensorvorrichtung
JP2011077199A (ja) * 2009-09-29 2011-04-14 Sumitomo Bakelite Co Ltd 半導体パッケージおよび半導体装置
JP5419230B2 (ja) * 2011-08-01 2014-02-19 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP5994613B2 (ja) * 2012-12-05 2016-09-21 株式会社デンソー 電子装置の取付構造体
CN106158778B (zh) * 2015-03-12 2020-07-17 恩智浦美国有限公司 具有侧面接触垫和底部接触垫的集成电路封装
US9443830B1 (en) * 2015-06-09 2016-09-13 Apple Inc. Printed circuits with embedded semiconductor dies

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003204018A (ja) * 2002-01-08 2003-07-18 Hitachi Cable Ltd 半導体装置及びその製造方法
JP2012238725A (ja) * 2011-05-12 2012-12-06 Toshiba Corp 半導体装置とその製造方法、およびそれを用いた半導体モジュール
US20130037966A1 (en) * 2011-08-10 2013-02-14 Freescale Semiconductor, Inc Semiconductor device die bonding

Also Published As

Publication number Publication date
US9941182B2 (en) 2018-04-10
JP6115505B2 (ja) 2017-04-19
JP2015026811A (ja) 2015-02-05
US20160104653A1 (en) 2016-04-14

Similar Documents

Publication Publication Date Title
JP6138500B2 (ja) パワー半導体装置
CN105047635B (zh) 附带散热板的引脚框架及其制造方法、以及半导体装置及其制造方法
CN111341731A (zh) 半导体装置
JP6226068B2 (ja) 半導体装置
JP2020038914A (ja) 半導体装置
EP2571047A2 (en) Insulating ring for packaging, insulating ring assembly and package
JP2015195415A (ja) 半導体装置および半導体装置の製造方法
US9905490B2 (en) Semiconductor device
JP6115505B2 (ja) 電子装置
JP6165025B2 (ja) 半導体モジュール
US9980407B2 (en) Electronic device, and electronic structure provided with electronic device
JP2021072329A (ja) パワー半導体装置
US9455208B2 (en) Semiconductor device
KR102212340B1 (ko) 렌즈 삽입부 내에 접합 홈을 구비하는 칩 기판
WO2016143317A1 (ja) 電子装置及びその製造方法
JP2016157786A (ja) 放熱構造体
JP2009171732A (ja) 電力変換装置
JP5124329B2 (ja) 半導体装置
WO2017175538A1 (ja) ケース、半導体装置、ケースの製造方法
JP2014116513A (ja) 電子装置
JP6171841B2 (ja) 半導体装置
US20180166620A1 (en) Electronic device
JP2013175551A (ja) 半導体装置
JP2017183657A (ja) 半導体装置
JP2009231743A (ja) 半導体装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14814592

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 14894637

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14814592

Country of ref document: EP

Kind code of ref document: A1