WO2009028298A1 - スピン注入磁化反転mtjを用いた不揮発性sram/ラッチ回路 - Google Patents

スピン注入磁化反転mtjを用いた不揮発性sram/ラッチ回路 Download PDF

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Publication number
WO2009028298A1
WO2009028298A1 PCT/JP2008/063787 JP2008063787W WO2009028298A1 WO 2009028298 A1 WO2009028298 A1 WO 2009028298A1 JP 2008063787 W JP2008063787 W JP 2008063787W WO 2009028298 A1 WO2009028298 A1 WO 2009028298A1
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WO
WIPO (PCT)
Prior art keywords
spin
bistable circuit
latch circuit
magnetization reversal
mtj2
Prior art date
Application number
PCT/JP2008/063787
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English (en)
French (fr)
Inventor
Shuichiro Yamamoto
Satoshi Sugahara
Original Assignee
Tokyo Institute Of Technology
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Publication date
Application filed by Tokyo Institute Of Technology filed Critical Tokyo Institute Of Technology
Priority to JP2009530030A priority Critical patent/JP5170706B2/ja
Priority to CN2008801113033A priority patent/CN101821810B/zh
Priority to US12/674,860 priority patent/US8295079B2/en
Publication of WO2009028298A1 publication Critical patent/WO2009028298A1/ja

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/0081Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell

Abstract

 本発明は、データを記憶する双安定回路30と、双安定回路30に記憶されたデータを強磁性電極フリー層の磁化方向に応じ不揮発的にストアする強磁性トンネル接合素子MTJ1およびMTJ2と、を具備し、強磁性トンネル接合素子MTJ1およびMTJ2に不揮発的に記憶されたデータを双安定回路30にリストア可能である記憶回路である。本発明によれば、双安定回路30へのデータの書き込みおよび読み出しを高速に行うことができる。また、電源が遮断されても強磁性トンネル接合素子MTJ1およびMTJ2に不揮発的にストアされたデータを双安定回路30にリストアすることが可能である。
PCT/JP2008/063787 2007-08-31 2008-07-31 スピン注入磁化反転mtjを用いた不揮発性sram/ラッチ回路 WO2009028298A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009530030A JP5170706B2 (ja) 2007-08-31 2008-07-31 スピン注入磁化反転mtjを用いた不揮発性sram/ラッチ回路
CN2008801113033A CN101821810B (zh) 2007-08-31 2008-07-31 利用电流感应磁化反转mtj的非易失性sram/锁存电路
US12/674,860 US8295079B2 (en) 2007-08-31 2008-07-31 Nonvolatile SRAM/latch circuit using current-induced magnetization reversal MTJ

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007225697 2007-08-31
JP2007-225697 2007-08-31
JP2007-227261 2007-09-03
JP2007227261 2007-09-03

Publications (1)

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WO2009028298A1 true WO2009028298A1 (ja) 2009-03-05

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PCT/JP2008/063787 WO2009028298A1 (ja) 2007-08-31 2008-07-31 スピン注入磁化反転mtjを用いた不揮発性sram/ラッチ回路

Country Status (4)

Country Link
US (1) US8295079B2 (ja)
JP (1) JP5170706B2 (ja)
CN (1) CN101821810B (ja)
WO (1) WO2009028298A1 (ja)

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