WO2005027606A1 - 両面配線ガラス基板の製造方法 - Google Patents
両面配線ガラス基板の製造方法 Download PDFInfo
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- WO2005027606A1 WO2005027606A1 PCT/JP2004/012720 JP2004012720W WO2005027606A1 WO 2005027606 A1 WO2005027606 A1 WO 2005027606A1 JP 2004012720 W JP2004012720 W JP 2004012720W WO 2005027606 A1 WO2005027606 A1 WO 2005027606A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/422—Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor
Definitions
- the present invention relates to a method for manufacturing a double-sided wiring glass substrate, and more particularly, to a method for manufacturing a double-sided wiring glass substrate provided with wiring on the front and back surfaces and mounted with various electronic components.
- a substrate using a ceramic substrate, a glass epoxy substrate, a glass substrate, or the like as a core substrate material is known.
- a photosensitive glass substrate on which holes and grooves can be formed by using a photolithography method is often used.
- a wiring substrate using a photosensitive glass substrate for example, through holes formed in the photosensitive glass substrate using a photolithography method and a wiring groove are filled with a conductive paste by a screen printing method.
- a multilayer wiring board formed by stacking and firing a plurality of similarly formed boards see Patent Document 1.
- a conductive film was formed on the inner wall of the through hole and the wiring by using a plating method, and a resin insulating material was formed inside the through hole after the formation of the conductive film and between the wiring.
- a build-up multilayer wiring board see Patent Document 2.
- a wiring board on which such electronic components and the like are mounted has a firing temperature of 400 ° C of an inorganic bonding paste usually used when bonding the electronic components and the like to the wiring board. Since the temperature may be extremely high as described above, it is required to have high heat resistance. Secondly, high-density wiring is required in order to mount many small electronic components, especially very small ones using MEMS. Third, in order to increase the mounting density, it is required that the wiring be formed on the front and back surfaces of the substrate.
- Patent Document 1 JP-A-63-128699 (page 4, column 2, line 6, line 19)
- Patent Document 2 Japanese Patent Application Laid-Open No. 2001-44639 (Paragraph No. [0030]-[0084], FIGS. 1 to 6)
- the present invention has been made in view of the above points, and provides a method for manufacturing a double-sided wiring glass substrate having high heat resistance and having fine wiring formed at high density on the front and back surfaces.
- the purpose is to:
- the present invention has an electric wiring formed on the front and back surfaces of a glass substrate, and a metal-filled through hole communicating with the front and back surfaces of the glass substrate, A method for manufacturing a double-sided wiring glass substrate, wherein each of the electric wirings formed on the front and back surfaces of the glass substrate is electrically connected to each other through a metal filled in the through-hole.
- a method for manufacturing a double-sided wiring glass substrate is provided.
- the metal to be filled in the through hole is copper, nickel, gold, silver, platinum or the like.
- the present invention provides a method for producing a double-sided wiring glass substrate, characterized by comprising at least one of palladium, chromium, and aluminum.
- a photosensitive glass substrate is used as the glass substrate, and in the first step, a latent image is formed in a portion where the through-hole is formed through a photomask in the glass substrate.
- Double-sided wiring glass comprising: exposing the exposed portion to heat to crystallize the exposed portion; and dissolving and removing the crystallized portion to form the through-hole.
- the through-hole is formed by an electroless plating method while leaving a void communicating with the front and back surfaces of the glass substrate in the center of the through-hole.
- the metal is deposited on the side wall of the glass substrate, one of the openings of the voids on the front and back surfaces of the glass substrate is closed with a metal by an electrolytic plating method, and then one of the openings is closed by an electrolytic plating method.
- a method for manufacturing a double-sided wiring glass substrate is provided, wherein metal is deposited in the gap from the opening toward the other opening, and the metal is filled in the through hole.
- the electroless plating is performed.
- the metal is deposited on the side wall of the through-hole while leaving a void in the center of the through-hole by a method, and then, the electrolytic solution is applied to one of the closed openings by the electrolytic plating method.
- a method for manufacturing a double-sided wiring glass substrate is provided, wherein a metal is deposited in a void portion and the metal is filled in the through hole.
- a metal deposited by an electroless plating method and a metal deposited by an electrolytic plating method are different types of metals, and the method for manufacturing a double-sided wiring glass substrate is characterized in that: Is provided.
- FIG. 1 is a cross-sectional view of an example of a double-sided wiring glass substrate according to the first embodiment.
- FIG. 2 is a sectional view of an exposure step according to the first embodiment.
- FIG. 3 is a cross-sectional view of a step of removing an exposed crystallized part according to the first embodiment.
- FIG. 4 is a cross-sectional view of a step of forming an ion-blocking layer according to the first embodiment.
- FIG. 5 is a cross-sectional view of a step of forming a preliminary adhesion reinforcing layer according to the first embodiment.
- FIG. 6 is a cross-sectional view of an electroless plating step according to the first embodiment.
- FIG. 7 is a sectional view of an opening closing step according to the first embodiment.
- FIG. 8 is a first sectional view of an electroplating step according to the first embodiment.
- FIG. 9 is a second cross-sectional view of the electroplating step of the first embodiment.
- FIG. 10 is a third sectional view of the electroplating step of the first embodiment.
- FIG. 11 is a cross-sectional view of a metal layer removing step according to the first embodiment.
- FIG. 12 is a cross-sectional view of a step of forming an adhesion reinforcing layer according to the first embodiment.
- FIG. 13 is a cross-sectional view of a wiring forming step according to the first embodiment.
- FIG. 14 is a sectional view of an electrode layer forming step according to the second embodiment.
- FIG. 15 is a first cross-sectional view of an electroplating step according to the second embodiment.
- FIG. 16 is a sectional view of an electroless plating step according to the second embodiment.
- FIG. 17 is a first cross-sectional view of a metal layer removing step according to the second embodiment.
- FIG. 18 is a second sectional view of the electroplating step of the second embodiment.
- FIG. 19 is a third sectional view of the electroplating step of the second embodiment.
- FIG. 20 is a second sectional view of the metal layer removing step according to the second embodiment.
- FIG. 1 is a cross-sectional view of an example of a double-sided wiring glass substrate according to the first embodiment.
- the double-sided wiring glass substrate 1 uses a photosensitive glass substrate 2 as its core substrate.
- the photosensitive glass substrate 2 is provided with a through hole 3 penetrating therethrough, and an ion blocking layer 4 on the front and back surfaces for suppressing leakage of alkali metal ions contained in the photosensitive glass substrate 2.
- the through-hole 3 is filled with a copper film layer 5 made of metallic copper (Cu), and the copper film layer 5 also penetrates the ion blocking layer 4.
- a copper film layer 6 serving as a wiring is formed in a predetermined wiring pattern via an adhesion reinforcing layer 7, and is formed on the copper film layer 5 and on the copper film layer 5.
- the front side and the back side of the double-sided wiring glass substrate 1 are electrically connected to each other by the part of the adhesion strengthening layer 7 and the copper film layer 6 thus formed.
- the photosensitive glass substrate 2 is excellent as a core substrate material of a wiring substrate in terms of its smoothness, rigidity, insulation, workability, and the like. This property is the same for chemically strengthened glass such as soda lime glass, crystallized glass, alkali-free glass, and aluminosilicate glass, and these can be used for the core substrate of the double-sided wiring glass substrate 1.
- the ion blocking layer 4 includes a silicon nitride (Si N) layer (hereinafter referred to as “sputtered silicon nitride layer”) 4a formed by a sputtering method, and silicon oxide (Si ⁇ ) formed by a sputtering method. (Hereinafter referred to as “sputtered silicon oxide layer”) 4b.
- the ion blocking layer 4 has a two-layer structure in which a sputtered silicon oxide layer 4b is stacked on a sputtered silicon nitride layer 4a formed on the front and back surfaces of the photosensitive glass substrate 2.
- the ion blocking layer 4 is not always an essential component.
- the adhesion reinforcing layer 7 includes a chromium (Cr) layer formed by a sputtering method (hereinafter referred to as a "sputtered chromium layer”) 7a, and a mixed layer of chromium and copper formed by a sputtering method (hereinafter referred to as a "sputtered chromium layer”). 7b) and a copper layer formed by a sputtering method (hereinafter, referred to as a “sputtered copper layer”) 7c.
- the adhesion reinforcing layer 7 has a three-layer structure in which a sputtered chromium layer 7a, a sputtered chromium copper layer 7b, and a sputtered copper layer 7c are sequentially stacked on the sputtered silicon oxide layer 4b.
- the copper film layer 6 serving as a wiring is formed on the sputtered copper layer 7c, and a part of the copper film layer 6 is connected to the copper film layer 5 filled in the through hole 3 via the adhesion reinforcing layer 7, You.
- a more detailed configuration of the double-sided wiring glass substrate 1 and a method of manufacturing the same will be described.
- the manufacturing process of the double-sided wiring glass substrate 1 is roughly divided into a through hole forming step, an ion blocking layer forming step, a through hole filling step, an adhesion reinforcing layer forming step, and a wiring forming step.
- FIG. 2 is a cross-sectional view of an exposure step according to the first embodiment.
- FIG. 3 is an exposure-crystallized part removing step according to the first embodiment.
- a region corresponding to a portion where the through-hole 3 is formed (hereinafter, referred to as a “through-hole forming portion”) is formed.
- a photomask (not shown) having an opening only is placed in close contact with the photosensitive glass substrate 2 in this state.
- the photosensitive glass substrate 2 is not particularly limited as long as it exhibits photosensitivity.
- the photosensitive glass substrate 2 preferably contains at least one of gold (Au), silver (Ag), cuprous oxide (Cu ⁇ ) or cerium oxide (Ce ⁇ ) as a photosensitive component. It is more preferable to include two or more types.
- SiO As such a photosensitive glass substrate 2, for example, SiO: 55
- Those containing 0.01% -0.2% as a photosensitizer can be used.
- the photomask is not particularly limited as long as the photomask can be in close contact with the photosensitive glass substrate 2 and selectively expose the through-hole forming portion.
- a photomask for example, a photomask in which a light-shielding pattern is formed of a transparent thin glass sheet such as a chromium film, which is substantially impermeable to exposure light such as ultraviolet light, can be used.
- the light-sensitive glass substrate 2 is subjected to a heat treatment.
- the heat treatment is preferably performed at a temperature between the transition point and the yield point of the photosensitive glass substrate 2 to be used. At a temperature lower than the transition point, the heat treatment effect is not sufficiently obtained, and at a temperature higher than the yield point, the photosensitive glass substrate 2 shrinks and the exposure is performed. This is because dimensional accuracy may be reduced.
- the heat treatment time is preferably about 30 minutes to 5 hours.
- the through-hole-formed portion irradiated with ultraviolet light is crystallized, and as shown in FIG. 2, the exposed crystallized portion 3a is formed in the through-hole formed portion of the photosensitive glass substrate 2. Is formed. Thereafter, by spraying an etching solution such as dilute hydrofluoric acid at a predetermined concentration on the photosensitive glass substrate 2 on which the exposed crystallized portion 3a is formed, the exposed crystallized portion 3a is selectively dissolved and removed, As shown in FIG. 3, a through hole 3 is formed in the photosensitive glass substrate 2.
- an etching solution such as dilute hydrofluoric acid
- a desired number of through holes 3 having an aspect ratio of about 10 can be simultaneously formed in the photosensitive glass substrate 2.
- a photosensitive glass substrate 2 having a thickness of about 0.3 mm and 1.5 mm is used, a plurality of through holes 3 of about 30 ⁇ m and about 150 ⁇ m can be simultaneously formed at desired positions. This makes it possible to reduce the size of the wiring pattern and increase the efficiency of the through-hole forming step.
- the land width is made extremely small or the land width is made zero with the aim of increasing the wiring density, a sufficiently large space between the through holes 3 can be secured. .
- a through hole can be formed by, for example, laser irradiation.
- FIG. 4 is a cross-sectional view of the step of forming the ion-blocking layer according to the first embodiment.
- the photosensitive glass substrate 2 contains alkali metal ions such as lithium ions (Li + ) and potassium ions (K + ). If these alkali metal ions leak into the wiring metal of the double-sided wiring glass substrate 1 and water is further adsorbed on the wiring metal, the wiring metal is ionized between the circuits to which the voltage is applied, and the wiring metal is ionized again. Ion migration which is reduced and precipitated is generated. In the worst case, this ion migration The formed metal forms a wiring that is directed from one circuit to the other circuit, resulting in a short circuit between the circuits. Such short-circuit failure becomes remarkable when the wiring interval is small, and it is necessary to suppress ion migration in order to form fine wiring with high density.
- alkali metal ions such as lithium ions (Li + ) and potassium ions (K + ).
- an ion blocking layer 4 is formed on the front and back surfaces of the photosensitive glass substrate 2 to suppress leakage of alkali metal ions from the photosensitive glass substrate 2 to the copper film layer 6 and the adhesion reinforcing layer 7. Further, by forming the ion blocking layer 4, even if the photosensitive glass substrate 2 has a small thickness, it is possible to secure a sufficient insulation resistance between the front and back surfaces.
- a dealkalization treatment for removing alkali metal ions contained in the front and back surfaces of the photosensitive glass substrate 2 is performed.
- the photosensitive glass substrate 2 is immersed in an electrolytic solution such as a sulfuric acid aqueous solution, and a voltage is applied to the photosensitive glass substrate 2 to remove alkali metal ions contained in the front and back regions. Elute into the electrolyte.
- an ion blocking layer 4 is formed on the front and back surfaces of the photosensitive glass substrate 2 as shown in FIG.
- the ion-blocking layer 4 can be made of either an organic material or an inorganic material, has insulating properties, and has a small expansion coefficient difference from the photosensitive glass substrate 2. Excellent in electrical properties, such as conductivity, dielectric constant and dielectric loss tangent, are preferred. Materials satisfying such requirements include silicon oxide, silicon nitride, and aluminum oxide. Silicon oxide and silicon nitride are more preferable because they have a high insulation withstand voltage at which defects such as pinholes are formed.
- a sputtering method As a film forming method, it is more preferable to use a sputtering method from the viewpoint that a good adhesion can be obtained without particular limitation, such as a sputtering method, a vacuum evaporation method, and a CVD (Chemical Vapor D mark osition) method.
- a sputtering method As shown in FIG. 4, first, a sputtered silicon nitride layer 4a having a thickness of about 0.05 zm was formed on each of the front and back surfaces of the photosensitive glass substrate 2 after the dealkalization treatment, and a film was formed thereon.
- An ion blocking layer 4 is formed by forming a sputtered silicon oxide layer 4b having a thickness of about 0.05 zm.
- the ion blocking layer 4 is formed after the dealkalization treatment. However, the ion blocking layer 4 may be formed without performing the alkali removal treatment.
- the ion blocking layer 4 has a two-layer structure. A single layer or a single layer may be used depending on the material used. Can have a structure of three or more layers. Further, the formation of the ion blocking layer 4 can be omitted by performing only the decalcifying process of the photosensitive glass substrate 2 according to the use environment or required characteristics of the double-sided wiring glass substrate 1.
- the ion blocking layer 4 becomes unnecessary by subjecting the photosensitive glass substrate 2 which is not essential to the following crystallization treatment to the following. That is, in the crystallization process, the entirety of the photosensitive glass substrate 2 in which the through-holes 3 are formed is irradiated with ultraviolet rays, and then heat treatment is performed. Thereby, the entire photosensitive glass substrate 2 is crystallized.
- the heat treatment temperature is preferably set at a temperature equal to or higher than the crystallization temperature of the photosensitive glass substrate 2 and equal to or lower than the softening point, for example, at 850 ° C. for 2 hours.
- the step of crystallizing the entire photosensitive glass substrate 2 performed after the formation of the through holes 3 is referred to as a “glass substrate modifying step”.
- FIG. 5 to 11 are explanatory views of the through hole filling step
- FIG. 5 is a cross-sectional view of the preliminary adhesion reinforcing layer forming step of the first embodiment
- FIG. FIG. 7 is a cross-sectional view of the plating step
- FIG. 7 is a cross-sectional view of the opening closing step of the first embodiment
- FIG. 8 is a first cross-sectional view of the electrolytic plating step of the first embodiment
- FIG. FIG. 10 is a second cross-sectional view of the electrolytic plating step of the first embodiment
- FIG. 10 is a third cross-sectional view of the electrolytic plating step of the first embodiment
- FIG. 11 is a diagram of the metal layer removing step of the first embodiment. It is sectional drawing.
- a preliminary adhesion reinforcing layer 17 is formed on the ion blocking layer 4.
- the preliminary adhesion reinforcing layer 17 is formed on the front and back surfaces of the substrate at the same time as the through hole 3 at the time of forming the plating metal layer on the through hole 3 using the plating method described below, which is performed to fill the metal into the through hole 3. It is formed to prevent the peeled metal layer from peeling off.
- the plating metal layer formed on the front and back surfaces of the substrate is eventually removed during this through-hole filling step, but if peeling off from the front and back surfaces of the substrate occurs before the removal, the metal layer is formed in the through-hole 3 at that time.
- Metal layer can be peeled off at the same time, resulting in poor conduction. This is because the performance becomes higher.
- the adhesion between the metal layer formed at the same time on the through hole 3 and the front and back surfaces of the substrate, that is, the metal filling the through hole 3 and the ion blocking layer 4 is not very good, the preliminary adhesion force on the ion blocking layer 4
- the reinforcing layer 17 is formed to increase the adhesion strength of the metal layer and prevent its peeling.
- the preliminary adhesion reinforcing layer 17 is a layer having good adhesion between the metal filling the through hole 3 and both the ion blocking layer 4 and the ion blocking layer 4 formed by sputtering, vacuum deposition, CVD or the like.
- the preliminary adhesion reinforcing layer 17 includes a first layer having a material strength having good adhesion with the ion blocking layer 4, a third layer made of a material having good adhesion with the metal filling the through hole 3, and A three-layer structure in which the second layer containing both the material of the first layer and the material of the third layer is laminated on the ion blocking layer 4 in the order of the first layer, the second layer, and the third layer. it can.
- a two-layer structure in which the second layer is omitted can be used.
- a material having good adhesion to both may be formed as a single layer.
- the preliminary adhesion reinforcing layer 17 can have a single-layer, two-layer or three-layer structure.
- the preliminary adhesion reinforcing layer 17 may be made of a metal material such as chromium, tantalum, or titanium. it can.
- the preliminary adhesion reinforcing layer 17 is made of chromium, a sputtered chromium layer 17a having good adhesion to the sputtered silicon oxide layer 4b, a sputtered copper layer 17c having good adhesion to copper, and an intervening layer therebetween.
- the sputtered chromium copper layer 17b has a three-layer structure.
- the pre-adhesion-strengthening layer 17 may have the same configuration when the ion-blocking layer 4 is not formed, that is, when it is formed on the photosensitive glass substrate 2.
- the thickness of each metal layer constituting the preliminary adhesion reinforcing layer 17 is not particularly limited.For example, when chromium is used as described above, the thickness of the sputtered chromium layer 17a is about 0.04 z mO.lzm, It is sufficient that the thickness of the sputter chromium copper layer 17b as the intermediate layer is about 0.04 z mO. 1 ⁇ m. It is sufficient that the thickness of the sputtered copper layer 17c is about 0.5 ⁇ m-l.5 ⁇ m.
- the through-holes 3 are filled with copper.
- the plating method is used to fill the through holes 3 with copper.
- the electroless plating method and the electrolytic plating method are used in combination.
- the electroless plating is mainly used for the purpose of making the walls of the through holes 3 of the photosensitive glass substrate 2 conductive, and the electrolytic plating is mainly performed by the electroless plating due to the high deposition rate and good film heat resistance. After the walls of the through-holes 3 are made conductive, they are used for efficiently depositing and filling copper inside the through-holes 3.
- a thin copper electroless plating layer (hereinafter, referred to as “electroless plating copper layer”) 5 a having a thickness of 1 ⁇ m or less is formed on the wall of the through hole 3 by an electroless plating method. Form.
- the electroless plating copper layer 5a is formed on the pre-adhesion strength-enhancing layer 17 formed on the front and back surfaces of the substrate together with the through-hole 3 wall surface.
- the pre-adhesion-strengthening layer 17 prevents the electroless plating copper layer 5a from peeling off from the front and back surfaces of the substrate.
- an insulating adhesive tape 10 is attached so as to cover the opening of the through hole 3 on one of the front and back surfaces of the substrate.
- the surface on which the adhesive tape 10 is forked is referred to as the substrate surface, and the opposite surface is referred to as the substrate back surface.
- This adhesive tape 10 prevents copper from adhering to the substrate surface in the next electrolytic plating step.
- the opening of the through-hole 3 may be closed with an adhesive tape 10 using other force.
- an electrolytic plating layer of copper (hereinafter, referred to as “electrolytic plating copper layer”) by an electrolytic plating method. 5b is formed, and the opening of the through hole 3 on the back surface of the substrate is closed by the electrolytic plating copper layer 5b.
- the electrolytic plating here is carried out, for example, by energizing in a plating bath containing a copper sulphate aqueous solution, which is a plating liquid, with the copper plate as the anode, the substrate as the cathode, and the backside of the substrate facing the copper plate. It is preferable to do so.
- the formation of the electrolytic plating copper layer 5b depends on the diameter of the through-hole 3, but is performed under a condition of a relatively higher current density of about 1 A / dm 2 to 5AZdm 2 than usual. Since this current density also depends on the plating solution concentration, its value should be set appropriately. Generally, when the plating solution concentration is high, a higher current density can be set than when the plating solution concentration is low. Electrolysis plating should be performed under such current density conditions. Thus, the opening of the through hole 3 can be closed by the electrolytic plating copper layer 5b. Hereinafter, this plating process will be referred to as “opening blockage”.
- the adhesive tape 10 is peeled off, and the electroless plating copper layer 5a and the preliminary adhesion reinforcing layer 17 formed on the substrate surface side are removed. Then, the ion blocking layer 4 is exposed.
- a method for removing each of these metal layers there are a lapping method, an etching method, a method using a combination of the lapping method and the etching method, and the like.
- an electrolytic plating copper layer 5b is further formed by an electrolytic plating method, and the inside of the through hole 3 is filled with the electrolytic plating copper layer 5b.
- the electroplating is performed by energizing the copper plate as an anode and the substrate as a cathode in, for example, an aqueous copper sulfate solution in the same manner as in the above electroplating.
- the electroplating is performed in a state where the substrate surface side, that is, the opening side of the through-hole 3 after peeling off the adhesive tape 10 is not closed, faces the copper plate.
- Formation of the electrolytic plated copper layer 5b here depending on the size Ya plated fluid concentrations of the through-hole 3, 0. 2A / dm 2 - under the condition of 0. 8A / dm 2 about a relatively low current density To do.
- the electroplated copper layer 5b is sequentially formed on the electroplated copper layer 5b previously formed inside the through-hole 3, and the through-hole 3 is formed. It is possible to avoid a situation in which the opening is closed before all the metal copper is filled. Further, since the ion blocking layer 4 is insulative, the electrolytic plating copper layer 5b is not formed on the ion blocking layer 4. As described above, by performing the electroplating at different current densities, it becomes possible to fill the through-hole 3 with metallic copper from the closed opening side. Hereinafter, this plating process is referred to as “filling plating”.
- the electrolytic plating copper layer 5b may be formed so as to protrude also on the substrate surface side. FIG. 10 shows a state after such a protruding portion is removed by a lap method or the like. .
- the electrolytic plating copper layer 5b After filling the through hole 3 with the electrolytic plating copper layer 5b, the electrolytic plating copper layer 5b, the electroless plating copper layer 5a, and the preliminary adhesion reinforcing layer 17 formed on the back surface of the substrate were removed, and FIG. As shown, the ion blocking layer 4 is exposed.
- a method for removing each of these metal layers there are a lapping method, an etching method, a method using a combination of the lapping method and the etching method, and the like.
- an electroless plated copper layer 5a and an electrolytic plated copper layer 5b are formed in the through hole 3.
- the through-hole 3 is filled with the copper film layer 5 made of metallic copper.
- the electrolytic plating copper layer 5b is formed after the formation of the electroless plating copper layer 5a and the through-hole 3 is filled with metallic copper, the through-hole 3 can be efficiently filled without gaps.
- the ion blocking layer 4 is removed when the preliminary adhesion reinforcing layer 17 is removed in FIG. No. 4 shows no state, that is, a state where the substrate after the photosensitive glass substrate 2 is crystallized is exposed.
- FIG. 12 is a cross-sectional view of the step of forming the adhesion reinforcing layer according to the first embodiment.
- the adhesion reinforcing layer 7 is formed on the exposed ion blocking layer 4.
- the adhesion-strengthening layer 7 is for ensuring adhesion between the ion-blocking layer 4 and the copper film layer 6 to be formed later as wiring, and its material, layer structure, forming method, etc. are as described above. The same as in the case of the adhesion reinforcing layer 17. The same applies when the ion blocking layer 4 is not formed.
- the adhesion-strengthening layer 7 has the following differences in thickness. That is, it is desirable that the thickness of each metal layer constituting the adhesion reinforcing layer 7 be as thin as possible in consideration of the amount of side etching when forming a wiring pattern by etching described later. However, if the thickness of each metal layer constituting the adhesion reinforcing layer 7 is too small, care must be taken because the adhesion reinforcing layer 7 is removed before the wiring is formed by the processing performed at the time of forming the wiring. . For example, when chromium is used for the adhesion reinforcing layer 7, the thickness of the sputtered chromium layer 7a is desirably about 0.-0. Lxm. Also, a sputtered chromium copper layer which is an intermediate layer
- the thickness of 7b is preferably 0.04 x m—0.1 l x m.
- the thickness of the sputtered copper layer 7c is preferably about 0.5 ⁇ m 1.5 zm. As a result, a very thin adhesion enhancing layer 7 having a total thickness of 2 ⁇ m or less is formed.
- FIG. 13 is a cross-sectional view of a wiring forming step according to the first embodiment.
- the copper film layer 6 is formed by using the key method.
- the thickness of the copper film layer 6 is desirably as thin as possible in consideration of the amount of side etching as in the case of the adhesion reinforcing layer 7.
- the temperature coefficient of the copper film layer 6 and the coefficient of thermal expansion of the photosensitive glass substrate 2 will be different if the temperature change of the double-sided wiring glass substrate 1 is repeated depending on the use environment. The difference causes metal fatigue in the copper film layer 6. Therefore, in order to ensure the connection reliability of the copper film layer 6 against such metal fatigue, the copper film layer 6 needs to have a certain thickness.
- the thickness of the copper film layer 6 is desirably about 1 111-20 111, and more preferably about 4 zm 7 zm. If the thickness of the copper film layer 6 is less than lxm, the risk of disconnection of the copper film layer 6 due to the above metal fatigue increases, and if the thickness of the copper film layer 6 exceeds 20 ⁇ m, the wiring pattern becomes It becomes difficult to miniaturize.
- a wiring pattern is formed by photolithography and etching.
- a resist pattern corresponding to the wiring pattern of the double-sided wiring glass substrate 1 is formed by a photolithography method.
- the copper film layer 6, the sputtered copper layer 7c, the sputtered chromium copper layer 7b, and the sputtered chromium layer 7a in the region not covered with the resist are removed by etching to form a wiring pattern.
- a double-sided wiring glass substrate 1 having the configuration shown in FIG. 1 is obtained.
- the resist used here may be a liquid resist, a dry film resist, or an electrodeposition resist.
- the resist type may be either a positive type or a negative type. However, in general, a positive type resist has higher resolution and is more suitable for forming a fine wiring pattern. I have.
- the configuration of the double-sided wiring glass substrate of the second embodiment is the same as that of the double-sided wiring glass substrate 1 of the first embodiment. However, there are many differences in the manufacturing method.
- the manufacturing process of the double-sided wiring glass substrate according to the second embodiment is roughly divided into a through-hole forming process, a glass substrate modifying process, a through-hole filling process, an adhesion reinforcing layer forming process, and a wiring forming process. It is composed of steps. Of these steps, the through-hole forming step, the glass substrate reforming step, the adhesion reinforcing layer forming step, and the wiring forming step are the same as those in the first embodiment. This will be described with reference to FIGS.
- FIG. 14 is a cross-sectional view of an electrode layer forming step according to the second embodiment
- FIG. 15 is a sectional view of the second embodiment
- FIG. 16 is a cross-sectional view of an electroless plating step of the second embodiment
- FIG. 17 is a first cross-sectional view of a metal layer removing step of the second embodiment
- FIG. 18 is a second sectional view of the electrolytic plating step of the second embodiment
- FIG. 19 is a third sectional view of the electrolytic plating step of the second embodiment
- FIG. 20 is the second embodiment.
- FIG. 5 is a second cross-sectional view of the metal layer removing step of FIG.
- an electrode layer 27 is formed on one surface of the crystallized glass substrate 21.
- the surface on which the electrode layer 27 is formed is referred to as the back surface of the substrate, and the opposite surface is referred to as the substrate surface.
- the material selection and the method of forming the electrode layer 27 are the same as those of the preliminary adhesion reinforcing layer 17 in the first embodiment.
- the preliminary adhesion strengthening layer 17 is formed for the purpose of enhancing the adhesion between the electroless plating copper layer 5a and the ion blocking layer 4, or the photosensitive glass substrate 2 or the substrate after crystallization. 27 functions as an electrode when the electrolytic plating copper layer 5b is formed.
- the electrode layer 27 can have a three-layer structure of, for example, a sputtered chromium layer 27a, a sputtered chromium copper layer 27b, and a sputtered copper layer 27c, as shown in FIG.
- the thickness of the sputtering layer 27a is about 0.04-0.1 / im
- the thickness of the sputtered chromium copper layer 27b as the intermediate layer is about 0.04-0.1 / im
- the thickness of 27c is sufficient if it is about 0.5-1.5 ⁇ 5 ⁇ m.
- the opening of the through hole 3 on the back surface side of the crystallized glass substrate 21 is closed with the electrolytic plating copper layer 5b by the opening closing method.
- Current density conditions for forming the electrolytic plated copper layer 5b similarly to the outlet obstruction plated conditions of the first embodiment, 1A / dm 2 - carried out under the conditions of 5A / dm 2 about the current density To do.
- power is supplied in a plating bath with the back surface of the substrate facing the anode.
- an electroless plating copper layer 5a is formed by an electroless plating method. As shown in FIG. 16, the electroless plating copper layer 5 a is deposited not only on the side wall of the through hole 3 but also on the surface of the crystallized glass substrate 21.
- the electroless plated copper layer 5a deposited on the surface side of the crystallized glass substrate 21 is removed by a lapping method or the like.
- an electrolytic plating copper layer 5b is deposited on the surface side of the crystallized glass substrate 21. This is to prevent that.
- the electrolytic plating copper layer was further formed by the filling plating.
- the through hole 3 is filled together with the electroless plating copper layer 5a and the electrolytic plating copper layer 5b previously formed inside the through hole 3.
- Current density conditions at this time as in the first embodiment, to perform under the conditions of 0. 2A / dm 2 -0. 8A / dm 2 about a relatively low current density.
- current is supplied in a plating bath with the surface of the substrate facing the anode.
- the electrolytic plating copper layer 5b may be formed so as to protrude also to the substrate surface side. Remove.
- a double-sided wiring glass substrate having the same configuration as that shown in FIG. 1 can be obtained by going through the adhesion reinforcing layer forming step and the wiring forming step.
- both the metal formed by the electroless plating method and the metal formed by the electrolytic plating method are copper is described. It is also possible to use different types of metal, such as copper, and nickel formed by electroless plating.
- PEG3 (trade name) manufactured by HOYA CORPORATION was used as a photosensitive glass substrate serving as a core substrate of a double-sided wiring glass substrate.
- This PEG3 is composed of Si ⁇ : 78.0% by weight, Li 0: 10.0% by weight, Al O: 6.0% by weight, K 0: 4.0% by weight, Na
- the manufacturing process includes a through hole forming step, an ion blocking layer forming step, a through hole filling step, an adhesion reinforcing layer forming step, and a wiring forming step.
- the details will be described below in the order of steps.
- a photomask was brought into close contact with the photosensitive glass substrate 2, and a portion where a through-hole was formed was irradiated with ultraviolet light through the photomask to form a latent image corresponding to the exposed portion.
- the photomask used was a quartz glass substrate with a desired through-hole array pattern formed by a chromium / chromium oxide layer.
- the light source used was a deep UV lamp, and the irradiation energy was 800 mJ / cm 2 . Thereafter, a heat treatment was performed at a temperature of about 400 ° C. to crystallize the portion where the through hole was formed, thereby forming an exposure crystallized portion 3a (FIG. 2).
- dilute hydrofluoric acid about 10% solution
- dilute hydrofluoric acid about 10% solution
- a positive voltage of about 20 V is applied thereto for about 10 minutes, and the photosensitive glass substrate 2 is removed from the photosensitive glass substrate 2 by force. Processing was performed. Stainless steel was used for the negative electrode at this time.
- an approximately 0.05 zm thick SiN film is formed on the front and back surfaces of the photosensitive glass substrate 2 using a normal RF sputtering apparatus to form a sputtered silicon nitride layer 4a. After that, a 31 ° film having a thickness of about 0.05111 was formed thereon to form a sputtered silicon oxide layer 4b (FIG. 4).
- a chromium film having a thickness of about 0.05 ⁇ m is formed on the sputtered silicon oxide layer 4b to form a sputtered chromium layer 17a on the sputtered chromium layer 17a.
- a chromium copper alloy film (chromium: about 4% / copper: about 96%) of .05 / im is formed to form a sputtered chromium copper layer 17b, and a film thickness of about 1.5 /
- a copper film of “im” was formed to form a sputtered copper layer 17 c, which was used as a preliminary adhesion reinforcing layer 17.
- a copper film having a thickness of about 0. 3 beta m was formed by electroless plated method to form an electroless plated copper layer 5a ( Figure 6).
- This electroless plating process was performed in the order of pretreatment, soft etching, pre-dip, catalyst application, catalyst activation, and electroless plating.
- the pretreatment is for cleaning the photosensitive glass substrate 2 after the formation of the preliminary adhesion reinforcing layer 17, and is performed using a commercially available cleaning solution, Melplate PC-321 manufactured by Meltex Corporation. did.
- the soft etching is for removing an oxide film formed on the surface of the preliminary adhesion reinforcing layer 17, and was soft-etched using a commercially available soft etching solution, Enplate E_462 manufactured by Meltex Corporation. .
- Predip is to immerse the photosensitive glass substrate 2 with the pre-adhesion strengthening layer 17 in a pre-dip solution in order to protect the catalyst bath in the next process.
- Enplate PC-236 manufactured by Meltex Co., Ltd. was used.
- the catalyst is provided by adsorbing the catalyst onto the photosensitive glass substrate 2 having the pre-adhesion strength reinforcing layer 17 in order to precipitate electroless copper plating. Processed.
- the catalyst activation is for activating the adsorbed catalyst, and the treatment was carried out using a commercially available Enplate PA-360 manufactured by Meltex.
- the electroless plating was for forming the electroless plating copper layer 5a, and commercially available Melplate Cu-390 manufactured by Meltex Co., Ltd. was used as the plating solution.
- an adhesive tape 10 is attached to the substrate surface to close the opening of the through hole 3 on the substrate surface side (FIG. 7). Then, the opening of the through hole 3 on the back surface of the substrate to which the adhesive tape 10 was not attached was closed with the electrolytic plating copper layer 5b (FIG. 8).
- the electrolytic plating solution used was a commercially available one, and is a REBCO 300 (trade name) manufactured by Uemura Kogyo Co., Ltd., a copper sulfate-based plating solution.
- the current density at the time of the electroplating was set to 3 A / dm 2, and electricity was passed in a plating bath with the back surface of the substrate facing the anode. Under these conditions, an electrolytic plating copper layer 5b having a thickness of 30 zm was formed on the flat portion on the back surface of the substrate.
- the adhesive tape 10 was peeled off, and the adhesive tape 10 was first applied.
- the electroless plating copper layer 5a and the sputtered copper layer 17c on the substrate surface were mechanically removed by a lap method.
- the sputtered chromium copper layer 17b and the sputtered chromium layer 17a were removed by etching using a chemical containing potassium potassium as a main component, thereby exposing the ion blocking layer 4 to the substrate surface.
- an electrolytic plating copper layer 5b was further formed by filling plating, and the through-hole 3 was filled together with the electrolytic plating copper layer 5b previously formed inside the through-hole 3 (FIGS. 9 and 10).
- plated solution used is the same as that used during the opening closed plated, the current density is 0. 5A / dm 2, lower than the current density in the through-hole closed plated current Set to a value.
- electricity was supplied in a plating bath with the substrate surface side facing the anode.
- an electrolytic plating copper layer 5b, an electroless plating copper layer 5a, a sputtered copper layer 17c, and a sputtering chromium formed on the back surface of the substrate using a chemical containing ferric chloride as a main component.
- the chromium in the sputtered chromium copper layer 17b and the chromium in the sputtered chromium layer 17a were removed by etching using a chemical containing potassium ferricyanide as a main component.
- the ion blocking layer 4 was exposed on the front and back surfaces of the substrate, and the through-hole 3 was filled with the copper film layer 5 of metallic copper including the electroless plated copper layer 5a and the electrolytic plated copper layer 5b (FIG. 11).
- a chromium film having a thickness of about 0.05 ⁇ m is formed on the exposed sputtered silicon oxide layer 4b, and a sputtered chromium layer 7a is formed on the sputtered chromium layer 7a.
- a chromium copper alloy film (chromium: about 4% / copper: about 96%) of .05 / im is formed, and a sputtered chromium copper layer 7b is formed on the sputtered chromium copper layer 7b with a thickness of about 1.5 xm copper. Films were formed to form sputtered copper layers 7c, respectively, to form the adhesion reinforcing layer 7. These films were formed continuously without exposure to the atmosphere. ( Figure 12).
- a copper film having a thickness of about 5 ⁇ m was formed by an electrolytic plating method, and a copper film layer 6 serving as a wiring was formed (FIG. 13).
- the plating solution used was a commercially available copper sulfate plating solution (Power Pergium ST-901 manufactured by Meltex Co.), and the current density condition was 3AZ dm 2 .
- a positive type liquid resist (Microposit SJR5440 manufactured by Shipley Co.) is applied on the surface of the copper film layer 6 with a spinner to a thickness of about 10 ⁇ m, and then a photomask on which a desired wiring pattern is drawn is formed. And exposed with a mask aligner. The exposure amount at this time was about 1000 mj / cm 2 .
- chromium etching of the sputtered chromium copper layer 7b and the sputtered chromium layer 7a was performed using a chemical containing potassium ferricyanide as a main component, and a line width of about 20 mm.
- a wiring pattern having a zm, an interval of about 20 ⁇ m, and a land width of about 120 ⁇ m was formed.
- Example 2 This example is the same as Example 1 except that the conditions of the electroless plating method in the through hole filling step of Example 1 and the metal species formed by the electroless plating method are different. I will.
- a nickel film having a thickness of about 0.3 ⁇ m was formed by an electroless plating method.
- the electroless plating process is basically the same as the process of pretreatment, soft etching, pre-dip, catalyst application, catalyst activation, and electroless plating described in Example 1, except for the last electroless plating process.
- Melplate NI-865 manufactured by Meltex Co., Ltd. was used as a plating solution for the electroless plating of the nickel film.
- the manufacturing process includes a through-hole forming step, a glass substrate modifying step, a through-hole filling step, an adhesion reinforcing layer forming step, and a wiring forming step.
- the through-hole forming step, the adhesion-strengthening layer forming step, and the wiring forming step are the same as in Example 1, and therefore, the glass substrate modifying step and the through-hole filling step will be described in detail below. I do.
- the entire photosensitive glass substrate 2 in which the through-holes 3 were formed was irradiated with ultraviolet rays at about 700 mj / cm 2 , and then heat-treated at a temperature of about 850 ° C. for about 2 hours.
- the entire photosensitive glass substrate 2 was crystallized, and a crystallized glass substrate 21 was formed.
- a chromium film having a thickness of about 0.05 zm is formed on the rear surface side of the crystallized glass substrate 21 by using a normal sputtering apparatus to form a sputtered chromium layer 27a.
- a chromium copper alloy film having a thickness of about 0.05 ⁇ m is formed on the sputtered chromium layer 27a to form a sputtered chromium copper layer 27b.
- An electrode layer 27 was formed by forming a 5 ⁇ m copper film to form a sputtered copper layer 27c (FIG. 14). Note that these metal films were continuously formed without being exposed to the air.
- an electrolytic plating copper layer 5 b is formed by an opening closing method, and the opening of the through hole 3 on the side of the crystallized glass substrate 21 on which the electrode layer 27 is formed is closed. ( Figure 15).
- the electrolytic plating conditions at this time were the same as the conditions for the opening closing plating shown in Example 1.
- an electroless plating copper layer 5a was formed inside the through-hole 3 by an electroless plating method.
- the electroless plating conditions were the same as in Example 1.
- the thickness of the electroless plating copper layer 5a inside the through hole 3 was about 3 ⁇ (FIG. 16).
- the electroless plated copper layer 5a attached to the surface side of the crystallized glass substrate 21, that is, the surface side on which the electrode layer 27 was not formed was removed by a lap method (FIG. 17).
- the electrolytic plated copper layer 5b is formed inside the through-hole 3 by a filing plating, and the through-hole 3 is filled. ( Figures 18 and 19).
- the filling condition at this time was the same as the filling condition in Example 1.
- the electrolytic plating copper layer 5b (FIG. 19) protruding to the substrate surface side was removed using a lap method.
- Example 3 This example is the same as Example 3 except that the conditions of the electroless plating method in the through hole filling step of Example 3 and the metal species formed by the electroless plating method are different. I will.
- a nickel film having a thickness of about 0.3 ⁇ was formed by an electroless plating method.
- the electroless plating process is basically the same as the process described in Example 1, which is performed in the order of pretreatment, soft etching, pre-dip, catalyst application, catalyst activation, and electroless plating.
- Melplate NI-865 manufactured by Meltex Co., Ltd. was used as a plating solution for the electroless plating of the nickel film.
- the same plating liquid was used for the opening blockage and the subsequent filling plating.
- a more suitable plating liquid for example, It is also possible to use a plating solution having a different plating metal ion concentration.
- the through holes for electrically connecting the front and back surfaces are filled with metal, so that the front and back surfaces of the substrate can be reliably conducted.
- the double-sided wiring glass substrate of the present invention does not use a conventional resin as a filler for the through-hole, so that high heat resistance of the entire substrate can be realized.
- the plating method is used for filling the metal into the through hole, the through hole can be reliably filled with the metal.
- the double-sided wiring glass substrate of the present invention enables high-density mounting of electronic components and the like with high connection reliability.
- the method for producing a double-sided wiring glass substrate of the present invention in which a through hole is filled with metal can be applied to a multilayer wiring substrate, and a double-sided wiring substrate using a ceramic substrate or a glass epoxy substrate as a core substrate, or It is also applicable to a multilayer wiring board.
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- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Description
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JP2005513846A JP4134172B2 (ja) | 2003-09-09 | 2004-09-02 | 両面配線ガラス基板の製造方法 |
EP04772674.0A EP1667510B1 (en) | 2003-09-09 | 2004-09-02 | Method for manufacturing double-sided printed glass board |
US11/370,241 US7993509B2 (en) | 2003-09-09 | 2006-03-08 | Manufacturing method of double-sided wiring glass substrate |
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US11/370,241 Continuation US7993509B2 (en) | 2003-09-09 | 2006-03-08 | Manufacturing method of double-sided wiring glass substrate |
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JP2017145502A (ja) * | 2016-02-15 | 2017-08-24 | ローム アンド ハース エレクトロニック マテリアルズ エルエルシーRohm and Haas Electronic Materials LLC | スルーホールを充填してボイド及び他の欠陥を低減する方法 |
WO2019107251A1 (ja) * | 2017-11-30 | 2019-06-06 | 凸版印刷株式会社 | ガラスコア、多層配線基板、及びガラスコアの製造方法 |
US11894594B2 (en) | 2017-12-15 | 2024-02-06 | 3D Glass Solutions, Inc. | Coupled transmission line resonate RF filter |
JP2022553186A (ja) * | 2019-10-14 | 2022-12-22 | スリーディー グラス ソリューションズ,インク | 高温プリント回路基板の基板 |
US11908617B2 (en) | 2020-04-17 | 2024-02-20 | 3D Glass Solutions, Inc. | Broadband induction |
Also Published As
Publication number | Publication date |
---|---|
EP1667509A4 (en) | 2009-05-20 |
TW200514488A (en) | 2005-04-16 |
KR20060054454A (ko) | 2006-05-22 |
US20060201201A1 (en) | 2006-09-14 |
CN1849856B (zh) | 2011-06-15 |
JPWO2005027605A1 (ja) | 2007-11-15 |
TWI247567B (en) | 2006-01-11 |
TW200517034A (en) | 2005-05-16 |
CN100512603C (zh) | 2009-07-08 |
KR100826068B1 (ko) | 2008-04-29 |
US20060201818A1 (en) | 2006-09-14 |
US7993509B2 (en) | 2011-08-09 |
US8002959B2 (en) | 2011-08-23 |
TWI255677B (en) | 2006-05-21 |
KR100826067B1 (ko) | 2008-04-29 |
EP1667510A4 (en) | 2009-05-20 |
EP1667509A1 (en) | 2006-06-07 |
EP1667510B1 (en) | 2013-11-06 |
CN1849856A (zh) | 2006-10-18 |
WO2005027605A1 (ja) | 2005-03-24 |
CN1849857A (zh) | 2006-10-18 |
KR20060058128A (ko) | 2006-05-29 |
JPWO2005027606A1 (ja) | 2007-11-15 |
EP1667510A1 (en) | 2006-06-07 |
JP4134172B2 (ja) | 2008-08-13 |
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