WO2004055898A1 - 固体撮像素子およびその製造方法 - Google Patents
固体撮像素子およびその製造方法 Download PDFInfo
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- WO2004055898A1 WO2004055898A1 PCT/JP2003/015939 JP0315939W WO2004055898A1 WO 2004055898 A1 WO2004055898 A1 WO 2004055898A1 JP 0315939 W JP0315939 W JP 0315939W WO 2004055898 A1 WO2004055898 A1 WO 2004055898A1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14629—Reflectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
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- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
Definitions
- Solid-state imaging device and method of manufacturing the same
- the present invention relates to a solid-state imaging device having a waveguide structure and a method for manufacturing the same.
- the MOS sensor is one of the solid-state imaging devices that have been actively developed in recent years. Unlike the CCD sensor, this MOS sensor does not read out the charge accumulated in the light receiving section from the imaging area by reading the inside of the base, but instead stores the electric charge (voltage) near the light receiving section. ) The signal is read out to the signal line, and is read out of the imaging region through the signal line.
- the signal line is called an output signal line and is disposed above the base. In addition to this output signal line, a signal line that supplies a signal to the readout electrode to read out the charge accumulated in the light receiving section first, a reset signal line to erase the charge in the pixel, etc.
- signal lines are arranged above a flattening film that covers elements such as readout electrodes on the substrate.
- the light receiving portion and signal lines in one pixel must be contained within a small area, and the signal lines are formed in multiple layers above the flattening film.
- the signal line may be located at a position protruding above the light receiving unit.
- FIG. 27 is a side sectional view showing an example of a waveguide structure according to the related art.
- the waveguide 20 provided in the flattening film 11 covering the readout electrode 15 extends to the light receiving section 1. Was guiding the incident light.
- the present invention is a solid-state imaging device devised to achieve the above object and a method of manufacturing the same.
- the solid-state imaging device includes: a plurality of light receiving units formed in a base, receiving incident light to generate electric charges; and a flattening layer for flattening a predetermined element formed on the base. And a plurality of signal lines formed on the flattening layer; and a waveguide for guiding incident light to the light receiving portion through a space between the plurality of signal lines.
- the present invention provides a step of forming an insulating film on a substrate having a light receiving section, a step of forming an opening in a portion of the insulating film corresponding to the light receiving section, Performing a step of forming a waveguide by embedding a material, wherein the waveguide guides incident light from the outside to the light-receiving unit.
- the resist shape in the photo resist patterning for forming the opening is formed into a forward tapered shape, and the resist is formed by etching.
- the forward tapered shape is transferred when the opening is formed, and a forward tapered shape portion is provided in which the size of the planar shape viewed from the light incident direction becomes smaller from the light incident side surface toward the light receiving portion side. It is characterized in that a formed opening is formed.
- the present invention provides a step of forming an insulating film on a substrate having a light receiving section, a step of forming an opening in a portion of the insulating film corresponding to the light receiving section, Performing a step of forming a waveguide by embedding a material, wherein the waveguide guides incident light from the outside to the light-receiving unit.
- the etching condition in the etching process for forming the opening is an etching condition for forming a forward tapered shape while suppressing isotropic etching, and a plane viewed from the light incident direction.
- An opening having a forward tapered one-shaped portion whose size decreases from the surface on the light incident side toward the light receiving portion is formed.
- the present invention is a method for manufacturing a solid-state imaging device in which a hole formed by embedding a high-refractive-index layer in a low-refractive-index layer is provided on a light-receiving section, Forming a layer, forming an opening in the low-refractive-index layer, and embedding the high-refractive-index layer in the opening a plurality of times to form the hole.
- the present invention provides a photoelectric conversion unit formed on a semiconductor substrate, an upper layer film provided on the semiconductor substrate via a gate insulating film, and a light receiving region of the photoelectric conversion unit from an upper surface of the upper layer film.
- a method for manufacturing a solid-state imaging device having a hole formed over a gate insulating film and a waveguide embedded in the hole, wherein the hole formed in the upper layer film includes at least a part of the waveguide. Embedding a first high-refractive-index material containing hydrogen, and subjecting the first high-refractive-index material to a heat treatment in a hydrogen atmosphere. Releasing hydrogen from the bending material to the photoelectric conversion unit side. BRIEF DESCRIPTION OF THE FIGURES
- FIG. 1 is a side sectional view showing an example of a schematic configuration of a solid-state imaging device according to the present invention.
- FIG. 2 is a side sectional view showing an example of a schematic configuration of a solid-state imaging device according to a first embodiment (hereinafter, referred to as “embodiment 1”) of the present invention.
- FIG. 3 is an explanatory view (part 1) showing a specific example of the planar shape of the forward tapered portion of the solid-state imaging device according to the present invention.
- FIG. 4 is an explanatory view (part 2) illustrating a specific example of the planar shape of the forward tapered portion of the solid-state imaging device according to the present invention.
- FIG. 5 is an explanatory view (part 3) illustrating a specific example of the planar shape of the forward tapered portion of the solid-state imaging device according to the present invention.
- FIG. 6 is a side sectional view (part 1) illustrating another example of the schematic configuration of the solid-state imaging device according to the present invention.
- FIG. 7 is a side cross-sectional view (part 1) illustrating another example of the schematic configuration of the solid-state imaging device according to the present invention.
- FIG. 8 is a side sectional view (part 1) for explaining the outline of the method for manufacturing a solid-state imaging device according to the present invention.
- FIG. 9 is a side sectional view (part 2) for explaining the outline of the method for manufacturing a solid-state imaging device according to the present invention.
- FIG. 10 is a side sectional view (part 3) for describing the outline of the method for manufacturing the solid-state imaging device according to the present invention.
- FIG. 11 is a side sectional view (part 4) for explaining the outline of the method for manufacturing a solid-state imaging device according to the present invention.
- FIG. 12 is a side sectional view (part 5) for describing the outline of the method for manufacturing the solid-state imaging device according to the present invention.
- FIGS. 13A to 13K are side sectional views for explaining the method for manufacturing the solid-state imaging device according to the second embodiment of the present invention.
- 14A to 14K are side sectional views for explaining a method for manufacturing a solid-state imaging device according to Embodiment 3 of the present invention.
- FIGS. 158 to 15K are side sectional views illustrating the method for manufacturing the solid-state imaging device according to the fourth embodiment of the present invention.
- FIGS. 16A to 16K are side cross-sectional views illustrating the method for manufacturing the solid-state imaging device according to the fifth embodiment of the present invention.
- FIG. 17 is a schematic sectional view showing the configuration of the solid-state imaging device according to Embodiment 6 of the present invention.
- FIG. 18 is an enlarged cross-sectional view illustrating a problem that occurs between layers.
- FIG. 19 is an explanatory diagram that defines the diameter of each layer between layers.
- FIG. 20 is a schematic cross-sectional view illustrating a case where the side wall of the upper layer of the hole is tapered in the configuration shown in FIG.
- FIG. 21 is a schematic cross-sectional view illustrating a case where holes are formed in three layers in the configuration shown in FIG.
- FIG. 22 is a schematic cross-sectional view for explaining a case where the side wall of the two layers has a tapered shape in the configuration shown in FIG.
- 23A to 23K are manufacturing process diagrams illustrating a method for manufacturing a solid-state imaging device according to Example 7 of the present invention.
- FIG. 24 is a sectional view illustrating a solid-state imaging device according to Example 8 of the present invention.
- FIGS. 25A and 25B are explanatory diagrams showing reflection paths of light incident into the waveguides of the solid-state imaging device shown in FIG.
- FIGS. 26A through 26F illustrate Example 9 of the present invention, and are shown in FIG. It is sectional drawing which shows each manufacturing method of a solid-state image sensor.
- FIG. 27 is a side sectional view showing an example of a conventional waveguide structure. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a side sectional view showing an example of a schematic configuration of a solid-state imaging device according to the present invention.
- a gate insulating film 2 As shown in the example in the figure, in a solid-state imaging device having a waveguide structure, a gate insulating film 2, an element isolation insulating film 3, and a surface are provided on a basic body having a light receiving section 1 functioning as a photodiode on the surface layer side.
- An insulating film 5 is formed via a topper SiN film (etch stopper film) 4.
- This insulating film 5 is composed of a plurality of layers.
- This insulating film 5 may include a plurality of different materials.
- the lower layer of the multiple layers of the insulating film 5 plays the role of covering the readout gate 6 formed on the base and required for reading out the signal charge from the light receiving section 1 and flattening the upper surface. I have. That is, the lower layer is a planarization film.
- a multilayer signal line 7 is formed above the flattening film.
- the signal line 7 is formed around the light receiving unit 1 or at a position protruding above the light receiving unit 1.
- a conductive plug 8 is formed along with the signal line 7.
- FIG. 1 only one line indicating that the insulating film 5 includes a plurality of layers is shown. The boundary of each layer may exist in other places, but is omitted because it is not necessary to explain the embodiment of the present invention.
- a waveguide 9 that guides incident light to the light receiving portion 1 through the space between the multilayer signal lines 7 is formed at a position corresponding to the light receiving portion 1 in the insulating film 5.
- An on-chip lens 13 is provided above the insulating film 5 via a passivation 10, a flattening film 11, and a color filter 12.
- the waveguide 9 forms, for example, an opening (hole) that extends from the light incident side to the light receiving section 1 through the insulating film 5 from the light incident side to the light receiving section 1, and a plasma CVD (chemical vapor deposition) is formed in the opening.
- It is formed by embedding a light transmissive material such as Muroi-Dai-Kai (P-SiN) by the method.
- the waveguide 9 does not merely optically connect the light receiving section 1 and the on-chip lens 13 but also forms the waveguide 9 and the insulating film.
- the incident light having an incident angle larger than the critical angle is totally reflected, and the light collection rate to the light receiving unit 1 is also increased.
- the incident light can be increased.
- the light can be guided to the light receiving section 1 with high efficiency.
- FIG. 2 is a side sectional view showing an example of a schematic configuration of a solid-state imaging device according to a first embodiment (hereinafter, referred to as “embodiment 1”) of the present invention.
- the same components as those of the conventional solid-state imaging device are denoted by the same reference numerals.
- the solid-state imaging device described here has a gate insulating film 2, an element isolation insulating film 3, and a stop S i N on a substrate provided with a light receiving section 1 functioning as a photodiode.
- An insulating film 5 is formed via a film (etch stopper film) 4.
- a read gate 6 necessary for reading signal charges from the light receiving portion 1, a multilayer signal line 7, a conductive plug 8 associated with the signal line 7, and the like are embedded.
- a waveguide 20 made of a light-transmitting material is provided at a position corresponding to the light receiving section 1 in the insulating film 5. Is formed.
- an on-chip lens 13 is disposed via a passivation 10, a flattening film 11, and a color filter 12.
- the waveguide 20 is formed of a light-transmitting material having a higher refractive index than the insulating film 5.
- the solid-state imaging device described here is different from the conventional solid-state imaging device (see FIG. 27) in the shape of the waveguide 20. That is, the waveguide structure is different from the conventional case.
- the waveguide has a forward tapered portion.
- the forward tapered portion is a tapered portion in which the size of the planar shape as viewed from the light incident direction gradually decreases from the light incident side surface of the insulating film 5 toward the light receiving portion 1 side. .
- the forward tapered portion is formed over the entire area of the waveguide 20 as shown in the figure, but it is not necessary to form the forward tapered part over the entire area. It may be formed at least in a part of the waveguide 20 toward the light receiving section 1 toward the light receiving section. More specifically, only the light incident side of the signal line 7 (see A in the figure), which is the largest extending over the light receiving portion 1 among the multilayer signal lines 7, that is, from the light incident side surface of the insulating film 5, It is also conceivable that a forward tapered portion is provided only at a depth reaching the signal line 7 and the other portion is not a tapered shape but a straight shape.
- the forward tapered portion has a planar shape corresponding to the signal line 7 formed in the insulating film 5, particularly the signal line 7 extending over the light receiving portion 1, instead of the planar shape of the light receiving portion 1. Is desirable.
- planar shape of the forward tapered portion of the waveguide 20 will be described with reference to specific examples. 3 to 5 are explanatory diagrams showing specific examples of the planar shape of the forward tapered portion.
- FIG. 3 a case where the planar shape of the light receiving unit 1 is a square will be described as an example.
- the planar shape of the waveguide 20 is also a square shape corresponding to the light receiving unit 1, but if there is a signal line 7 extending over the light receiving unit 1, the signal line 7 As a result, the penetration of light is hindered, and the light arrival surface (light receiving surface) becomes narrower.
- the shape of the opening 20a on the light incident side of the forward tapered portion is rectangular.
- the shape of the opening 20b on the light receiving unit 1 side is a planar shape corresponding to the signal line 7 protruding above the light receiving unit 1. In this way, the light incident from the opening 20a can be focused to the opening 20b without being blocked by the signal line 7, and as a result, the incident light can be efficiently received. It is possible to reach part 1.
- the forward tapered portion does not necessarily need to have a taper shape having one taper angle, and may be, for example, a combination of taper shapes having two or more different taper angles.
- the forward tapered portion on the light receiving section 1 side is formed in the same manner as in FIG. 4 described above.
- FIG. 6 and 7 are side sectional views showing another example of the schematic configuration of the solid-state imaging device according to the present invention, in which a taper shape having two or more taper angles having different forward taper portions is combined. It is a figure showing the example of. In the figure, the same components as those of the solid-state imaging device described above (see FIG. 2) are described. Have the same reference numerals.
- the waveguide 20 in the solid-state imaging device has a planar shape of the waveguide 20 from the light incident side to the side of the signal line 7a (see A in the figure). It is conceivable to have a first inclined portion 20d that is inclined so that the angle becomes gradually smaller. At this time, the waveguide 20 has, in addition to the first inclined portion 20d, a second inclined portion 20e inclined at an angle different from the first inclined portion 20d. . However, instead of the second inclined portion 20e, a non-inclined portion (not shown) having no inclination may be provided.
- the first inclined portion 20 d of such a waveguide 20 has an inclination angle corresponding to the positional relationship between at least two signal lines 7 a and 7 b overlapping in the stacking direction (vertical direction). It is assumed that That is, the inclination angle is specified according to the position of the end of each of the upper and lower signal lines 7a and 7b. For example, as shown in the figure, the end of the lower signal line 7a protrudes significantly above the light receiving section 1, whereas the end of the upper signal line 7b is positioned above the light receiving section 1.
- the inclination angle of the first inclined portion 20d is assumed to be greatly inclined with respect to the optical axis direction of the incident light. Become.
- the angle of inclination of the first inclined portion 20d does not necessarily have to match the angle formed by the ends of the signal lines 7a and 7b on the light receiving portion 1 side, and the positional relationship between the signal lines 7a and 7b What is necessary is just to correspond to.
- the opening on the light incident side is formed.
- the amount of light condensed is small, so that the signal line 7 can be formed near the light receiving section 1.
- the waveguide structure using the waveguide 20 having the first inclined portion 20 d as described above is used, the light collection efficiency to the light receiving portion 1 can be improved. Become.
- the signal line 7 near the light receiving section 1 in an image sensor such as a metal oxide semiconductor (MS) image sensor (a so-called CMOS sensor or the like).
- MS metal oxide semiconductor
- CMOS complementary metal oxide semiconductor
- the waveguide 20 in the solid-state imaging device has a side wall surface composed of a first side surface portion 20 f and a second side surface portion 20 g. It is conceivable to gradually reduce the planar shape of the waveguide 20 by using 20 f and the second side surface portion 20 g. At this time, it is assumed that the first side surface portion 20f is formed in a shape different from that of the second side surface portion 20g. At least the first side surface portion 20f has a plurality of inclined portions 20h and 20i having different inclination angles.
- the plurality of inclined portions 20 h and 20 i are configured in the same manner as the first inclined portion 20 d and the second inclined portion 20 e (or the non-inclined portion) described above. That is, at least one of the plurality of inclined portions 20, 20 i has a positional relationship between at least two signal lines 7 a and 7 b that overlap in the stacking direction (vertical direction). It is assumed that the lower signal line 7 a is formed such that its end portion protrudes greatly above the light receiving section 1.
- the signal line 7 could not be formed in the vicinity of the light receiving section 1 because the amount of condensed light was small in the conventional waveguide structure, but the waveguide 2 having the first side face 20 f as described above was not used. If a waveguide structure using 0 is used, the light collection efficiency to the light receiving section 1 can be improved. In addition, it is possible to solve the problem that the wiring formation position is restricted due to the increase in the area of the light receiving unit 1 and the reduction in the area of the pixel circuit unit. This is particularly noticeable when the end of the signal line 7a is configured to protrude significantly above the light receiving section 1.
- FIG. 8 to 12 are side sectional views for describing a method for manufacturing a solid-state imaging device according to the present invention.
- a method for manufacturing the solid-state imaging device shown in FIG. 2 will be described as an example.
- a stopper SIN film 4 serving as an etch stopper film at the time of etching the waveguide opening is formed.
- the gate insulating film 2 is formed on the light receiving section 1.
- SiN is used as a film forming material thereof in consideration of a selection ratio at the time of etching the waveguide.
- An oxide film may be used as the insulating film 5. The procedure up to this point is substantially the same as the conventional solid-state imaging device manufacturing procedure.
- a photoresist film 21 is patterned on the upper surface side of the insulating film 5 to form an opening for the waveguide 20.
- the photo resist film 21 changes the cross-sectional resist shape of the patterned opening portion in order to realize the waveguide 20 having the forward tapered shape portion.
- the shape is tapered.
- This forward tapered shape can be realized by using a well-known technique generally used when forming the photoresist film 21.
- the angle of the forward tapered shape and the like may be specified according to the shape of the forward tapered portion to be formed.
- an opening 22 is formed by etching as shown in FIG. As a result, an opening 22 is formed in a portion of the insulating film 5 corresponding to the light receiving portion 1 (above the light receiving portion 1).
- the photoresist film 21 has a forward tapered shape
- the opening 22 formed by the etching is a forward tapered portion in which the size of the planar shape viewed from the light incident direction decreases toward the light receiving portion 1 from the light incident side surface. Is obtained.
- the etching condition in the etching process may be the etching condition for forming a forward tapered shape while suppressing isotropic etching.
- the isotropic etching is suppressed by forming a sidewall protective film by using a gas having a high deposition property such as a CF-based gas typified by C 4 F 8 as the etching process condition.
- the opening 22 to be formed has a forward tapered shape.
- not only the type of gas used, but also the resist exposure conditions, the flow rate and pressure of the etching gas, and the RF bias voltage are appropriately selected and adjusted to suppress isotropic etching. It is possible to realize a tapered shape. That is, by adjusting the etching conditions in the etching process, the openings 22 formed by the etching have forward tapered portions.
- the resist shape is a forward tapered shape
- the etching condition in the etching process is the etching condition for suppressing the isotropic etching
- the etching condition for forming a forward tapered shape, or a combination thereof It has a forward tapered portion.
- the angle, depth, and the like of the forward tapered portion can be set to desired angles, depths, and the like by adjusting the resist shape, etching conditions, and the like.
- the resist shape, the etching conditions, and the like can be adjusted by using a well-known technique, and thus a detailed description thereof is omitted here.
- a light-transmitting material is embedded in the opening 22 to form a waveguide 20.
- the waveguide 20 is formed by embedding a light-transmitting material such as P-SiN by a high-density plasma CVD method.
- the opening 22 has a forward tapered shape. That is, the frontage portion (uppermost portion) of the opening 22 is widened by the forward tapered portion. Therefore, when embedding the light transmissive material, the supply of radicals into the opening 22 is promoted, and the light transmissive material spreads evenly in the opening 22.
- the light transmissive material when the light transmissive material is embedded, even if a deposit adheres to the vicinity of the frontage of the opening 22, the frontage is not blocked by the deposit because the frontage is wide. From these facts, it is possible to satisfactorily embed the light transmissive material in the opening 22 having the forward tapered shape even if it has a high aspect ratio.
- a global planarization process is performed by an etch pack method or a CMP (Chemical Mechanical Polishing) method. Is applied.
- the passivation 10, the flattening film 11, the color filter 12, and the on-chip lens 13 are sequentially formed by a procedure substantially similar to the conventional solid-state imaging device manufacturing procedure, and the solid-state imaging device is fabricated. Finalize.
- the waveguide 20 has the forward tapered portion. That is, the opening 22 for forming the waveguide 20 has a forward tapered shape in which the size of the planar shape becomes smaller from the light incident side to the light receiving side. ing. Therefore, when forming the waveguide 20 by embedding the light transmissive material in the openings 22, the embedding property of the light transmissive material is improved as compared with the conventional case. In addition, the frontage of the opening 22 is not blocked by the sediment. As a result, it is possible to satisfactorily embed the light-transmitting material even in the opening 22 having a high aspect ratio. Variations can be reduced.
- the forward tapered portion allows the light incident side of the waveguide 20 to be large and the light receiving portion 1 to be small, so that the optimal waveguide shape for the structure of the solid-state imaging device can be formed.
- This also improves the light collection. That is, by increasing the light incident side of the waveguide 20, it is possible to increase the amount of light incident on the waveguide 20.
- the light receiving section 1 side of the waveguide 20 is small, incident light can be efficiently taken into the waveguide 20 and, for example, light emitted in an oblique direction can be easily collected on the light receiving section 1. . As a result, the light condensing property on the light receiving section 1 is improved.
- the signal line is Avoid interference with 7 mag
- the tapered portion allows the frontage of the opening 22 to be widened. That is, since the distance between the waveguide 20 and the signal line 7 can be widened by the forward tapered portion, it is possible to avoid the occurrence of wiring shaving when the opening 22 is etched. It is also possible to improve the reliability of the element and suppress the generation of particles due to the reaction product with the signal line 7.
- the forward tapered portion of the waveguide 20 when the forward tapered portion of the waveguide 20 is arranged only on the light incident side of the signal line 7 that protrudes the largest on the light receiving section 1, the order is The tapered portion will be provided only in the necessary part.
- the other portions may have a straight shape instead of a tapered shape, which is very suitable for improving the efficiency of condensing light on the light receiving section 1.
- the forward tapered portion is not formed in the planar shape of the light receiving portion 1 but in the signal line 7 formed in the insulating film 5, in particular, the signal line 7 extending over the light receiving portion 1. Since the incident light is not blocked by the signal line 7 if it has a corresponding planar shape, it is possible to efficiently reach the light receiving section 1 and is very suitable for improving the light collection efficiency It becomes something. In addition, since the wiring can be prevented from being scraped when the opening 22 is etched, the reliability of the solid-state imaging device can be improved.
- the forward tapered portion is formed such that the resist shape in the photo resist pattern jung is a forward tapered shape, or the etching condition in the etching process is changed.
- a forward tapered portion is formed by adjusting the etching conditions, the conditions can be changed during the etching. Therefore, even if, for example, a forward tapered portion is provided only in one part, or a combination of two or more different taper angles is formed, only one etching process is required. It can be easily realized.
- the solid-state imaging device and the method of manufacturing the same described in this embodiment may be, for example, a CCD (Charge Coupled Device) type or a CMOS (Complementary Metal Oxide Semiconductor) type.
- CCD Charge Coupled Device
- CMOS Complementary Metal Oxide Semiconductor
- the present invention can be applied to any solid-state imaging device having a waveguide structure and a method for manufacturing the same.
- the present invention has been described with the preferred specific examples, but it is needless to say that the present invention is not limited to the present embodiment.
- the planar shape of the light receiving section 1 and the waveguide 20 and the multilayer wiring structure are only specific examples.
- FIGS. 13A to 13K are side sectional views for explaining a method for manufacturing the solid-state imaging device according to the second embodiment of the present invention. Note that, here, for simplicity of the description, the configuration of an element region, an element isolation region, and the like formed on a silicon substrate serving as a base is not shown. In the second embodiment, first, as shown in FIG.
- a mask is used to form a waveguide portion using a lithographic technique on a silicon substrate 111 composed of an interlayer film 142 with lines.
- the interlayer films are all SiO 2 films, and the film thicknesses are 450 nm for the poly interlayer film 114, 150 nm for the first signal line interlayer film 115, and 150 nm for the first signal line interlayer film.
- the interlayer film between the signal line and the second signal line is 122 nm
- the interlayer film between the second signal line and the third signal line is 200 nm
- the interlayer film above the third wiring is It is 300 nm.
- the signal lines 1 16, 1 2 3, 1 3 3 are all Cu wiring
- the thickness of all layers is 200 nm.
- the Cu diffusion preventing films 12 1 and 14 1 are all SiC films and have a thickness of 50 nm.
- the lowermost SiN film 113 also has a thickness of 5 O nm.
- the interlayer film 142 on the uppermost wiring is isotropically processed. Further, as shown in FIG. 13D, the interlayer film in the region where the waveguide is to be formed is processed by anisotropic etching to form the waveguide 15.
- the resist 15 1 used in the lithography technique is removed as shown in FIG. 13E.
- a metal film 1553 serving as an outer tube of the waveguide is formed to a thickness of 50 nm, and then, as shown in FIG. 13G, the entire metal film 1553 is etched.
- the metal film 153 serving as the outer tube of the waveguide is left only on the side surface.
- Aluminum was used as the metal film 153 in this example.
- the low refractive index film is used for the side wall, May be a clad structure in which a high refractive index film is embedded.
- an insulating film 154 is embedded in the waveguide 152 by a high-density plasma CVD method.
- the insulating film 154 is a transparent film that transmits visible light. Specifically, in this example, a normal SiO 2 film was used.
- planarization is performed by the CMP method, and the insulating film 154 formed on portions other than the waveguide is removed.
- the high-density plasma CVD method was used as an example to embed the transparent insulating film 154 in the waveguide 152. It is also possible to embed 154. In this case, if planarization can be achieved simultaneously by the application method, the planarization process by the CMP method can be eliminated.
- the method of manufacturing the solid-state imaging device in the second embodiment is as described above, in the subsequent steps, it is conceivable to form an on-chip lens so that light is sufficiently incident on the waveguide 152. That is, as shown in FIG. 13J, the SIN film 161, the color filter 162, and the on-chip lens 163 are formed on the flattened transparent insulating film 154. It does not matter.
- the transparent insulating film 154 is buried by a high-density plasma CVD method and then planarized by a CMP method, but as shown in FIG.
- a film 155 made of a material having a higher refractive index than the buried insulating film 154, for example, a SiN film is formed thereon, and the film 155 is conducted. It is also conceivable to form a concave lens by etching back or flattening by CMP so that it remains only in the upper part of the wave path, so that light can be efficiently collected on the waveguide. Further, in the second embodiment, the case where the metal film 1553 is formed immediately after opening the portion to be the waveguide is described, but after forming the insulating film, for example, 50 nm, the metal film 1553 is formed. It is also possible to form. In this case, the withstand voltage between the signal line and the waveguide is secured.
- FIGS. 14A to 14K are side sectional views for explaining Example 3 of the method for manufacturing a solid-state imaging device according to the present invention. Note that, also here, for simplicity of the description, the configuration of an element region, an element isolation region, and the like formed on a silicon substrate serving as a base is not shown.
- a diode 2 12 for performing photoelectric conversion a SiN film 2 13, a poly interlayer film 2 14, a first signal line 2 16, a first signal line interlayer film 2 15, (1) Cu diffusion prevention film applied to wiring 2 2 1, interlayer film 2 between first signal line and second signal line 2 2, 2nd signal line 2 2 3, Cu diffusion applied to 2nd wiring Prevention film 2 3 1, Interlayer film 2 3 between 2nd signal line and 3rd signal line 2 3 2 3rd signal line 2 3 3, Diffusion prevention film of Cu applied to 3rd wiring 2 4 1 3rd wiring
- lithographic technology was applied to the silicon substrate 211 composed of an interlayer film 242 and a signal line disposed above it.
- the resist 251 which will be a mask, is patterned.
- the interlayer / wiring configuration is the same as in the second embodiment.
- the interlayer film 242 on the uppermost wiring is processed. Specifically, an opening is formed in the interlayer film 242 on the uppermost wiring so as to have a size that covers part or all of the signal lines 216, 223, 233.
- the insulating film 243 is formed.
- the insulating film 243 is processed by RIE (Reactive Ion Etching) so that the insulating film 243 remains only on the side surface of the opening as shown in FIG. 14D.
- RIE Reactive Ion Etching
- a 200 nm-thick SiN film was formed as the insulating film 243.
- the waveguide is lithographically sized to have a sufficient distance to the signal line 2 16, 32, 23, and 33 to secure the dielectric strength.
- Reference numeral 252 in the figure is a register.
- the resist 252 is peeled off, and after the peeling, as a metal film 2553 serving as an outer tube of the waveguide, for example, aluminum Is deposited to a thickness of 5 nm.
- a metal film 2553 serving as an outer tube of the waveguide
- the metal film 25 3 is entirely etched and packed, and the metal film 25 3 serving as the outer tube of the waveguide is left only on the side surface.
- the metal film 253 may have a clad structure in which a low refractive index film is used for a side wall and the inside is filled with a high refractive index film.
- an insulating film 254 is embedded in the waveguide by a high-density plasma CVD method.
- the insulating film 254 is a transparent film that transmits visible light. Specifically, in this example, a normal SiO 2 film was used.
- planarization is performed by the CMP method, and the insulating film 254 formed on portions other than the waveguide is removed.
- an on-chip lens may be formed so that light is sufficiently incident on the waveguide. That is, as shown in FIG. 14J, the SIN film 261, the color filter 262, and the on-chip lens 263 are formed on the flattened transparent insulating film 24. It does not matter.
- the transparent insulating film 254 is buried by the high-density plasma CVD method and then planarized by the CMP method.
- the metal film 253 is formed immediately after opening the portion to be the waveguide is described, but after forming the insulating film, for example, 50 nm, the metal film 253 is formed. It is also possible to form. In this case, the withstand voltage between the signal line and the waveguide is secured.
- FIG. 15A to FIG. 15K are side sectional views for explaining Example 4 of the method for manufacturing a solid-state imaging device according to the present invention. Note that, also here, for simplicity of the description, the configuration of an element region, an element isolation region, and the like formed on a silicon substrate serving as a base is not shown.
- the resist 3 is applied to the condensing lens formed on the diode 312 by the lithography technique. Putter the 1 3a. Then, by heat treatment, the resist 313a is rounded as shown in FIG. 15B. After that, when the SIN film 3 13 and the resist 3 13 a are processed at the same etching rate, a condenser lens is formed on the diode 3 12 as shown in Fig. 15C. Will be.
- the formation of the SIN film 313 as an interlayer film under the wiring After the formation of the condensing lens, the formation of the SIN film 313 as an interlayer film under the wiring, the formation of contacts with the diffusion layer and the gate electrode (not shown), the formation of the interlayer film 3 of the first signal line, and the like.
- the structure shown in FIG. 15D is obtained by forming the Cu diffusion prevention film 341 and the interlayer film 342 between the third wiring and the signal line disposed thereon.
- the wiring / interlayer structure is the same as that of the second embodiment.
- a resist 351 serving as a mask is patterned in order to form a portion serving as a waveguide using lithography technology, as shown in FIG. 15E.
- the interlayer film 342 on the uppermost wiring is isotropically processed by using the resist 351.
- the interlayer film 342 is, for example, 300 nm.
- the interlayer film in the region where the waveguide is formed is processed by anisotropic etching to form the waveguide.
- the resist 351 used in the lithography technique was removed, and an aluminum film of 50 nm was used as the metal film 353 that becomes the outer tube of the waveguide. Form a film.
- the metal film 353 is etched and packed, and the metal film 353 serving as the outer tube of the waveguide is left only on the side surface.
- Aluminum was used as the metal film 153 in this example.
- the metal film 353 may have a cladding structure in which a low refractive index film is used for a side wall and the inside is filled with a high refractive index film.
- an insulating film 354 is embedded in the waveguide by high-density plasma CVD.
- the insulating film 354 is a transparent film that transmits visible light. Specifically, in this example, a normal SiO 2 film was used.
- planarization is performed by the CMP method, and the insulating film 354 formed on portions other than the waveguide is removed.
- the case where the high-density plasma CVD method is used to embed the transparent insulating film 354 in the waveguide has been described as an example. It is also conceivable to perform embedding. In this case, if the planarization can be achieved simultaneously by the coating method, the planarization process by the CMP method can be eliminated.
- the method of manufacturing the solid-state imaging device in the fourth embodiment is as described above, in the subsequent steps, it is conceivable to form an on-chip lens so that light is sufficiently incident on the waveguide. That is, as shown in FIG. 15K, the SIN film 361, the color filter 362, and the on-chip lens 363 are formed on the flattened transparent insulating film 3554. It does not matter.
- the insulating film buried by the high-density plasma CVD method is not planarized by CMP and has a refractive index higher than that of the buried insulating film 354 in the upper layer, as in Examples 2 and 3.
- a high material may be formed, and the concave lens may be combined so that the film remains only in the upper part of the waveguide.
- the metal film 353 is formed immediately after opening the portion to be the waveguide is described, but the metal film 253 is formed after forming the insulating film, for example, 50 nm. It is also possible to form. In this case, the withstand voltage between the signal line and the waveguide is secured.
- FIG. 16A to FIG. 16K are side sectional views for explaining Example 5 of the method for manufacturing a solid-state imaging device according to the present invention. Note that, also here, for simplicity of the description, the configuration of an element region, an element isolation region, and the like formed on a silicon substrate serving as a base is not shown.
- the configuration in which the condensing lens is disposed immediately above the diode 3 12 has been described as an example.
- the condensing lens is disposed at a location away from the diode 4 12.
- the lens 454 may be provided, and in this case, damage during processing of the condenser lens 454 can be prevented from reaching the diode 412.
- the condenser lens 454 has a structure in which a convex lens and a concave lens that are considered to have higher light-collecting properties than a hemispherical lens are combined. Therefore, in a fifth embodiment, a description will be given of a manufacturing procedure in the case where a condenser lens 454 having a structure in which a convex lens and a concave lens are combined is used.
- Example 5 first, as shown in FIG. 16B, the element and its isolation region (both not shown), a diode 4 12 for photoelectric conversion, a SiN film 4 13, a poly interlayer film 4 On the silicon substrate 411 on which the 14 has been formed, the resist 4114a is patterned by lithography technology so as to correspond to the lens region formed on the diode 412. Then, as shown in FIG. 16C, the poly interlayer film 414 is isotropically added using the resist 414 a. Then, a concave lens is formed. Then, as shown in FIG. 16D, the resist 414 a used for forming the concave lens is peeled off. Further, as shown in FIG. 16E, the SiN film 414 b is removed.
- the material forming the lens is not limited to the SiN film, but needs to be a material having a higher refractive index than the poly interlayer film 4 14.
- a SiO 2 film is used as the poly interlayer film.
- the SiN film 414b is planarized by the CMP method.
- a resist 414 c is patterned by a lithography technique on a portion of the condenser lens formed on the diode 412 for performing photoelectric conversion, and as shown in FIG. 16H
- the heat treatment is performed to round the resist 414c.
- an interlayer film 415 of the first signal line is formed.
- the state before forming the first signal line is obtained as shown in FIG. 16K.
- the solid-state imaging device shown in FIG. 16A is formed through the process of forming the Cu wiring by the ordinary dual damascene method and the process of forming the waveguide shown in the second and third embodiments.
- the signal line has a three-layer structure as an example, but the present invention is not necessarily limited to the case of three-layer wiring. Further, in the second to fifth embodiments, the case where Cu is applied as the wiring has been described, but it is needless to say that the present invention is not limited to the Cu wiring.
- CMOS sensor solid-state imaging device
- FIG. 17 shows a schematic configuration in the case where the present invention of Example 6 is applied to a solid-state imaging device (CMOS sensor).
- CMOS sensor solid-state imaging device
- a cross section corresponding to one pixel of the solid-state imaging device is shown.
- a light receiving section 504 for receiving incident light is formed in a predetermined area in the semiconductor substrate 502 separated by the element isolation region 503,
- a read gate 506 is formed via a gate insulating film 505, and a conductive plug 507 connected to a signal line described later is formed in the insulating film 508. .
- the signal line 509 is formed in two layers (a first signal line 591, and a second signal line 592), and a conductive plug 5 is provided between the signal lines 591, 92. Connected by 07. Above the uppermost signal line 592, a color filter 5 1 2 is formed on the insulating film 5 08 via a passivation film 5 10 and a planarization film 5 1 1, and a color filter 5 1 2 An on-chip lens 5 13 is formed at a position corresponding to the upper light receiving section 5 04.
- a hole 514 is formed on the light receiving portion 504 to the lower end of the passivation film 510 so as to connect the light receiving portion 504 to the on-chip lens 513.
- a high-refractive-index layer for example, a plasma SiN film formed by a high-density plasma CVD method
- 16 is an insulating film (for example, Si 0 2 8)
- An etching stop film for example, a SiN film having a high selectivity with respect to 8.
- a solid-state imaging device 501 having a structure for increasing the light collection efficiency of incident light is configured.
- the configuration is such that the holes 514 are formed of a plurality of layers.
- the hole 514 is formed of, for example, two layers 514A and 514B.
- the upper surface of the layer 514 A is formed, for example, so as to be flush with the upper surface of the flattened insulating film 508 shown by a broken line below the signal line 591.
- the upper surface of the layer 514B is formed so as to be flush with the upper surface of the flattened insulating film 508 below the passivation film 510, for example.
- the hole has a high refractive index layer. Since the hole 514 is formed with a plurality of layers 514 A and 514 B in which the siN film 515 is embedded, the plasma S in each of the layers 514 A and 514 B is formed.
- the embedding property of the iN film 515 is better than the embedding property of the conventional plasma SiN film, and no cavity is generated in the plasma SiN film 515.
- the holes 514 are formed by the plurality of layers 514A and 514B, for example, there is a concern about a problem of displacement between the layers.
- a resist mask for forming the second layer 514 B is formed by using lithography technology
- the figure shows As shown in the enlarged view of the vicinity of the interlayer in Fig. 18, the connection between the layers 5 14A and 5 14B on the side walls of the vertically connected layers 5 14A and 5 14B As a result, a step 5 2 1 is formed.
- the step 5 2 is formed at the connection section 5 20 between the respective layers 5 14 A and 5 14 B.
- the light (arrow X in the figure) incident from the upper part of the hole 514 goes from the plasma SiN film 515 embedded therein to the insulating film 508.
- the light is refracted at the step 5 21 and proceeds into the insulating film 508 (arrow Y in the figure), or the light is totally reflected at the step 5 2 1 and the hole 5 1 It proceeds upward in 4 and is diffused from the surface to the outside (arrow Z in the figure).
- the light is totally reflected again at the interface between the surface of the hole 514 and the upper layer (for example, the passivation film 510) and returns to the inside of the hole 514.
- step 521 reduces the light-collecting ability of the incident light to the light-receiving part 504, thereby lowering the light-collecting efficiency.
- the diameters of the adjacent layers 5A and 5B are made different. That is, as shown in FIG. 19, the lower diameter Bd of the upper layer 514B is formed smaller than the upper diameter Ad of the lower layer 514A. Thereby, the decrease in the light collection efficiency described above can be improved.
- the diameter of the mask may be reduced accordingly.
- the amount of displacement that occurs at the level of lithography is at most about 0.1 ⁇ m, and therefore, for example, during the lithography process for forming the upper layer 514 B, the lower diameter B d Should be controlled to be 0.2 ⁇ m (0.1 X 2) smaller than the upper diameter Ad of the lower layer 5 14 A.
- a high refractive index layer is not formed by embedding a high refractive index layer in one deep hole as in the related art, but is a high refractive index layer in the hole. Since the holes 514 are formed with a plurality of layers 514 A and 514 B in which the SiN film 515 is embedded, the plasma in each of the layers 514 A and 514 B is formed. The embedding property of the SiN film 515 is better than that of the conventional plasma SiN film in one layer 547. This makes it possible to provide a solid-state imaging device having holes with good embedding properties in which no voids are formed in the plasma SiN film 515.
- the lower diameter B d of the upper layer 5 14 B is formed smaller than the upper diameter Ad of the lower layer 5 14 A. Therefore, it is possible to provide a solid-state imaging device in which unnecessary reflection or refraction does not occur at the connection section 520 and the light-collecting efficiency is not reduced.
- annealing in the plasma SiN film 515 is performed by annealing.
- the plasma SiN film 515 in the hole 514 has no void and has a sufficient volume. A sufficient amount of hydrogen can be supplied from 515 to the light receiving section 504, and the effect of suppressing the generation of white spots can be sufficiently exhibited.
- the distribution of the high-refractive-index layer in the hole was poor, and the high-refractive-index layer was easily peeled off. Since no cavity is formed in the hole 514, the coverage of the SiN film 515 as the high refractive index layer in the hole 514 can be improved.
- At least one of the layers 514A and 514B constituting the hole 514 may have a tapered side wall.
- the side wall of the layer 5 14 B formed at the uppermost portion has a tapered shape, for example, as compared with the configuration shown in FIG. 17.
- Light can be easily taken into the hole 5 14.
- the embedding property of the plasma SiN film 515 in the layer 514B is further improved.
- the hole 5 14 is formed by two layers 5 14 A and 5 14 B.
- the hole 5 14 FIG. 21 shows a configuration formed by 14A, 514B, and 514C.
- the upper surfaces of the respective layers 5 14 A, 5 14 B, and 5 14 C are respectively the upper surfaces of the flattened insulating films 5 08 shown by broken lines below the first signal lines 5 91.
- the flattened insulating film 508 shown by the broken line below the second signal line 592 on the same plane as the upper surface of the passivation film 510, and on the same plane as the top surface of the passivation film 510. It is formed so as to be on the same plane as the upper surface of 08. That is, the upper surfaces of the respective layers 5 14 A, 5 14 B and 5 14 C and the upper surface of the planarized insulating film 508 are formed on the same plane.
- the layers 514 B and 514 C become shallower, and the embedment of the plasma SiN film 515 in the layers 514 B and 514 C is improved. Therefore, the embedding property in the hole 5 14 is further improved as compared with the configuration shown in FIG.
- each layer 5 14 A, 5 14 B, 5 14 C formed upward from the light receiving section 504 to the on-chip lens 5 13 can be prevented from gradually decreasing.
- the embedding property of the plasma SiN film 515 in the layers 514 B and 514 C is improved, and the burying property in the hole 514 is further improved.
- FIGS. 23A to 23J an embodiment of a method of manufacturing a solid-state imaging device according to a seventh embodiment of the present invention
- a method for manufacturing the solid-state imaging device shown in FIG. 17 will be described.
- a cross-sectional view corresponding to one pixel of the solid-state imaging device is shown, and portions corresponding to FIG. 17 are denoted by the same reference numerals.
- a light receiving section 504 for receiving incident light is formed in a predetermined area (element forming area) in the semiconductor substrate 502 separated by the element separating area 503.
- a gate insulating film 505 is formed on the light receiving section 504.
- a readout gate 506 and an etching stopper film 516 are formed on the light receiving portion 504 via a gut insulating film 505.
- the etching stopper film 516 when the opening 514 is formed in the insulating film 508 on the next etching stopper film 516, the insulating film composed of the SiO 2 film is used.
- An SiN film that can ensure a high etching selectivity with respect to the film 508 is used. This SiN film can be formed, for example, by using a low pressure CVD method.
- an insulating film 508 is formed on the entire surface including the readout gate 506, the etching stopper film 516, and the element isolation region 503, and a resist film (not shown) is formed on the insulating film 508. (Not shown).
- a resist film is formed as a resist mask having a pattern for forming the opening 541 using a known lithography technique, and then the insulating film 508 is etched and removed by anisotropic dry etching through the resist mask. I do. Thereafter, by removing the resist mask, a structure in which an opening 541 is formed in the insulating film 508 as shown in FIG. 23C is obtained.
- Et suchiya parallel plate type as the reaction gas, for example, C 4 F 8 gas, A r gas, Ru can be used 0 2 gas or the like.
- the reaction gas for example, C 4 F 8 gas, A r gas, Ru can be used 0 2 gas or the like.
- the etching stopper film 516 formed on the light receiving portion 504 has a high selectivity with the insulating film 508, the insulating film 504 is formed.
- the etching of 8 is stopped when it reaches the etching stopper film 516, and does not affect the surface of the light receiving section 504. Further, for example, the depth 14 Ah of the opening 541 can be uniformly formed without variation for each pixel.
- the opening 541 is formed before the signal line 509 described later is formed, the opening 541 is formed in comparison with the conventional case where the opening is formed after all the signal lines are formed.
- a depth of 4 1 14 A h can be formed shallowly. That is, an opening 541 having a low aspect ratio is formed.
- the insulating film including the opening 541 is removed.
- An SiN film 515 which is a high refractive index layer having a higher refractive index than the insulating film 508, is formed on the front surface of the 508, for example, a SiN film formed by a high-density plasma CVD method (plasma SiN film).
- the isotropic etching for removing the etching stopper film 516 can be performed by, for example, chemical dry etching using downflow plasma.
- the plasma is favorably formed without forming a cavity in the opening 541.
- the SiN film can be embedded.
- the plasma SiN film 515 is removed by etching to the surface of the insulating film 508 by using, for example, a CMP method or an etch-back method.
- the etching of the plasma SiON film 515 is performed by using the CMP method, the upper surface of the insulating film 508 is formed without the plasma 31 1 ⁇ film 515 remaining. Since the planarization is performed, it is not necessary to perform the planarization process again, for example, when forming a signal line in the next step.
- a conductive plug 507 and a signal line 509 are formed.
- a conductive plug 507 is formed at a predetermined position in the insulating film 508, and a first-layer signal line 591 is formed on the flattened insulating film 508. Then, an insulating film 508 is formed again on the entire surface including the signal line 591, and a flattening process is performed. Then, a conductive plug 507 is formed at a predetermined position, and the insulating film 508 is formed. A signal line 592 as a second layer is formed thereon. Then, an insulating film 508 is formed again on the entire surface including the signal line 592, and the insulating film 508 is planarized. Thus, a signal line 509 (first signal line 591 and second signal line 592) having a two-layer structure is formed.
- the signal line 509 has a two-layer structure. Such a process is repeated when the number of layers, the number of layers, the number of layers, the number of layers, the number of layers, the number of layers, and the number of signal lines 509 increase.
- a resist film (not shown) is formed on the insulating film 508, and the resist film is formed as a resist mask having a pattern for forming the opening 542 by using a lithography technique.
- the pattern for forming the opening 542 has a lower diameter 5 14 Bd corresponding to, for example, the amount of displacement in the lithography process (at most 0.2 m), and the process in FIG. ) Is formed to be smaller than the upper diameter 5 14 Ad of the lower opening 5 41 formed by.
- each of the openings 54 1 and 54 2 there is a difference of about 0.2 m in the diameter of each of the openings 54 1 and 54 2 .Since the difference is so small as 0.2 ⁇ m, for example, 54
- the same mask pattern as the resist mask used in the formation of 1 can be used. That is, the aperture diameter can be adjusted only by control in the lithography process.
- the insulating film 508 is etched away by anisotropic dry etching through the resist mask.
- an opening 542 is formed in the insulating film 508 as shown in FIG. 23G.
- the plasma SiON film 515 in the lower layer 514A functions as an etching stopper.
- This is as a reaction gas used for the anisotropic dry etching, the same C 4 F 2 gas to that described above, A r gas, 0 by using 2 gas or the like, plasma S i layers 5 1 in 4 A
- the lower diameter of the upper opening 542 is made smaller than the upper diameter of the lower opening 541.
- the lower diameter of the upper opening 542 there is no case in which the 514 Bd protrudes from the upper diameter 514 Ad of the lower opening 541, and the insulating film 508 is not partially etched.
- the depth 14Bh of the opening 542 can be formed to be shallower by the formation of the layer 514A in the previous stage, as described above.
- a high refractive index layer having a higher refractive index than the insulating film 508 is formed on the front surface of the insulating film 508 including the opening 542.
- a SiN film (so-called plasma SiN film) 15 is formed by a high-density plasma CVD method. Also at this time, since the opening 542 is shallow as described above, the plasma SiN film can be satisfactorily embedded in the opening 542.
- the plasma SiN film 515 is etched off to the surface of the insulating film 508 by using the CMP method or the etch pack method.
- the flattening process is performed such that the plasma SiN film 515 does not remain on the insulating film 508.
- the upper surface of the insulating film 508 is flat without the plasma SiON film 515 remaining.
- the signal line is formed in the next step, it is not necessary to perform the flattening process again.
- a layer 514B in which the plasma SiN film 515 is embedded is formed. Then, a hole 514 is formed together with the lower layer 514 A formed earlier.
- a passivation film is formed on the entire surface covering the surface of the insulating film 508 and the plasma SiN film 515 embedded in the hole 514.
- a color filter 5 12 is formed.
- an on-chip lens 5 13 is formed on the color filter 5 12 at a position corresponding to the hole 5 14 on the light receiving section 504.
- the openings 541, 542 are formed in the insulating film 508, and the plasma SiN film 515 is formed in each of the openings 541, 542.
- the hole 514 is formed by performing the step of embedding the hole a plurality of times, so that, for example, the depths 14 Ah and 14 Bh of the respective openings.
- the opening can be formed shallower than the depth h of the opening formed once (after all the signal lines are formed). That is, it is possible to form an opening having a lower aspect ratio than in the related art.
- the lower diameter 5 14 Bd of the opening 54 2 formed in the next step is made smaller than the upper diameter 5 14 Ad of the opening 54 1 formed in the previous step. Unnecessary reflection and refraction can be prevented from being generated at the connection portion 5220 of the 1 and 542.
- the side wall of at least one opening may be formed in a tapered shape.
- a resist pattern for forming the opening 542 is formed using a lithography technique in the step shown in FIG. 23G.
- the resist pattern is etched so as to have a tapered shape.
- C 4 F 8 gas is used, a favorable tapered shape can be easily formed by the effect of forming the side wall protective film by the CF-based buried material.
- the insulating film 508 and the plasma SiN film 515 are respectively removed. Can be performed once.
- the hole 514 is formed by forming the opening twice.
- the hole 514 may be formed three or more times depending on the balance between the embedding property and the number and depth of the signal lines.
- An opening can also be formed.
- the present invention is applied to a solid-state imaging device.
- the present invention can be applied to other solid-state imaging devices, for example, a CCD solid-state imaging device.
- Embodiment 8 of the present invention relates to a solid-state imaging device having a waveguide structure, in which two types of transparent films (polyimide resin (second high refractive index material), plasma nitride silicon (first high refractive index material)) are used.
- polyimide resin second high refractive index material
- plasma nitride silicon first high refractive index material
- the embedding property of the waveguide is improved, the increase in white spots due to metal diffusion from polyimide resin is suppressed, and the deterioration of transistor reliability is suppressed.
- FIG. 24 is a sectional view showing a solid-state imaging device according to Embodiment 8 of the present invention.
- the example shown is an example applied to a CMOS image sensor.
- Pixel transistors such as a photodiode (photoelectric conversion unit) 1 and a readout gate 604 are formed in a pixel region separated by an element isolation region 603 of a substrate 62 made of a semiconductor material.
- a transfer electrode (po 1 y Si electrode) 4 A of the read gate 604 is formed on the upper surface of the base body 62 via the gate insulating film 602, and the insulating film 621 is formed thereon.
- An etching stopper film 605 A is provided through the opening.
- the etching stopper film 605A is formed by a silicon nitride film (LP—silicon nitride) formed by low-pressure CVD.
- etching stopper film 605A a plurality of layers of wiring 608 and an insulating film 606 to be an upper layer film are provided.
- a conductive plug 607 is provided between the contact area of each wiring 608 and the contact area of the base body 620, and the wiring 608 of each layer is connected.
- Sio 2 is mainly used for the insulating film 606.
- a passivation film 610 is provided on the uppermost insulating film 606, and a power filter 612 and an on-chip lens 613 are provided thereon via a flattening film 611. Is provided.
- a hole 606 A is formed in the insulating film 606 from the uppermost surface to the gut insulating film 602 on the light receiving region of the photodiode 601, and is buried in the hole 606 A.
- the waveguide 609 is provided in the form shown in FIG.
- This waveguide 609 is composed of a first waveguide 609 A made of plasma-nitrided silicon with the core of the waveguide (waveguide) on the outside, and embedded in the cavity inside the first waveguide 609 A.
- the second waveguide 609 B is made of polyimide resin (PIQ).
- PIQ polyimide resin
- the first waveguide 609A has an open upper end, and a polyimide material is applied from above the first waveguide 609A to form the first waveguide.
- the second waveguide 609 B is buried from the opening of 609 A.
- polyimide-based resin is a lower refractive index than the plasma nitriding silicon, and has a refractive index higher than the surrounding S io 2.
- the embedding property can be improved compared to a waveguide made of plasma silicon nitride alone, and further, because the plasma silicon nitride and polyimide resin have high adhesion, excellent optical characteristics can be obtained. There is.
- the first waveguide 609 A is formed with a sufficient film thickness
- the second waveguide 609 B and the gut insulating film 602 are arranged in a sufficiently separated state, so that the It is formed so that the impurity metal of polyimide does not diffuse to the photodiode 61 side.
- hydrogen annealing treatment heat treatment in a hydrogen atmosphere
- the first waveguide 609 A (plasma silicon nitride) contains hydrogen, and is subjected to an anneal treatment (for example, at 400 ° C. for 60 minutes) in a hydrogen atmosphere, so that the photolithography can be performed.
- the supply of hydrogen into the diode 601 is promoted. Therefore, the metal diffused from the second waveguide 609 B into the photodiode 601 causes dangling bonds caused by crystal defects, and the termination effect of hydrogen appears, and white spots appear. A reduction effect is obtained.
- the hydrogen supply effect is increased, and the photo- Widening the distance to the diode 61 reduces white spots
- the refractive index of the first waveguide 609 A is higher than that of the second waveguide 609 B, so that the light collecting property is also improved.
- the thickness of the first waveguide 609 A is, for example, about 100 nm.
- the etching stopper film 605A is formed of silicon nitride which functions as an etching stopper when a hole 606A for obtaining a well structure of a waveguide is formed by etching.
- the etching stop film 605 A is left in a region other than the light receiving region of the photodiode 601 in this example, so that hydrogen annealing using plasma silicon nitride (hydrogen annealing) is performed.
- hydrogen annealing using plasma silicon nitride hydrogen annealing
- the hydrogen When the hydrogen is diffused into the photodiode 601 by the heat treatment in the atmosphere, it functions as a hydrogen absorbing film for preventing hydrogen from entering a transistor or the like in another region.
- the above-described hydrogen supply effect of the first waveguide 609 A is based on the fact that when an excessive amount of hydrogen is supplied to the source / drain region of the transistor, the drain avalanche effect is promoted and the reliability of the transistor (hot carrier) is increased. Adversely affect resistance.
- the silicon nitride (LP-silicon nitride) film formed by low-pressure CVD which forms the etching stopper film 605A, has a high hydrogen absorption effect. It is left in the area (especially the area covering the transistor) to prevent the intrusion of hydrogen.
- a silicon nitride film disposed outside the light receiving area of the etching stopper film 605A will be referred to as a hydrogen intrusion prevention film 605B.
- a hydrogen intrusion prevention film 605B prevents deterioration of characteristics of a transistor or the like due to diffusion of hydrogen and maintains proper operation characteristics.
- the hydrogen intrusion prevention film 605B is removed from the contact region of the transistor.
- the barrier metal layer made of Ti, TiN, etc. is formed inside the plug, Protected by hydrogen absorption effect.
- the etching stopper film 605A is completely removed, and the plasma silicon nitride of the first waveguide 609A is removed.
- the capacitor is brought into direct contact with the gut insulating film 602 to obtain the above-described hydrogen supply effect.
- the region where the hydrogen intrusion prevention film 605B is provided covers all regions of the active element such as a plurality of transistors provided on the semiconductor substrate (excluding the penetrating portion of the plug or the like). Or it may cover only some of the transistors.
- a transistor for example, a pixel transistor such as a readout gut
- a transistor for example, a pixel transistor such as a readout gut
- a silicon nitride film of B605B By surrounding the prevention film with a silicon nitride film of B605B, hydrogen can be effectively absorbed and penetration into the transistor can be prevented, and a very remarkable effect can be obtained.
- a pixel region and a peripheral circuit region are provided on the same chip, and although the transistors and the like in the peripheral circuit region are not as large as the transistors in the pixel region, there is a possibility that hydrogen may enter. Therefore, a hydrogen intrusion prevention film 605B may be provided on the upper surface of the transistor in the peripheral circuit region. Also, etching stopper film The 605 A and the hydrogen intrusion prevention film 605 B do not need to be continuous in the entire region, may be intermittently arranged, and the position where the hydrogen intrusion prevention film 605 B is provided However, as shown in FIG. 24, the present invention is not limited to the case where it is provided between the readout electrode 604 A and the upper layer film, and may be directly above the gut insulating film depending on the location.
- FIGS. 25A and 25B are explanatory diagrams showing reflection paths of light incident into the waveguide.
- FIG. 25A shows the state of light incident on the first waveguide 609A
- FIG. 25B shows the state of light incident on the second waveguide 609B.
- the light enters from the surface of the first waveguide 609 A shown in FIG. 25A and directly reaches the interface between the first waveguide 609 A and the insulating film 606.
- the incident light is reflected at the interface when its incident angle 01, that is, the angle 01 between the incident angle and the normal to the interface is greater than or equal to the critical angle.
- na the refractive index of medium a
- s in 0 a the refractive angle of medium a
- nb the refractive index of medium b
- sin 6 b medium b Is the refraction angle.
- the light incident from the first waveguide 609 A is insulative film 606 and the light incident at an incident angle of 0 2 or more. ⁇ Totally reflected at the interface of the second waveguide 609 B and enters the photodiode 601.
- the refractive index of the first waveguide 609 A is higher than the refractive index of the second waveguide 609 B and the second waveguide 609 A is determined by Snell's law.
- the critical angle between B and the insulating film 606 needs an incident angle of ⁇ 3 or more.
- FIGS. 26A to 26F are cross-sectional views showing respective manufacturing steps in the ninth embodiment.
- each element such as a photodiode 600 and a read gate 604 is formed on a substrate 620 in the same process as before, and a gate insulating layer is formed on the substrate 620.
- a film 602, a read electrode 604A, a lower insulating film 621, and the like are formed.
- a silicon nitride film 605 to be an etching stopper film 605 A and a hydrogen intrusion prevention film 605 B is formed on the entire upper layer.
- a silicon nitride film formed under reduced pressure CVD is used in consideration of an etching selectivity at the time of forming a hole.
- the upper layer film (insulating film 60 6, conductive plug 607, wiring 608, etc.).
- unnecessary portions of the nitrided silicon film 605 are selectively removed by, for example, dry etching in a contact hole forming step for the conductive plug 607, to form an etching stopper film 605A.
- a hydrogen intrusion prevention film 605 B is formed.
- a hydrogen-containing organic gas such as CH 2 F 2 or CHF 2 is used.
- a hole 606 A is formed in the upper layer film by etching.
- resist patterning is performed on the upper layer film, and etching stopper film 605
- Opening is performed by anisotropic dry etching using A as a stopper, then the resist is removed, the portion of the etching stopper film 605A corresponding to the waveguide is removed, and the gate insulating film 6 0 2 is exposed.
- plasma CVD is performed on the upper surface of the upper layer film (insulating film 606) to form a plasma silicon nitride film 609a.
- the portion is buried in the hole 606A to form a portion to be the first waveguide 609A.
- an annealing process is performed in a hydrogen atmosphere. This is done, for example, at 400 ° C. for 60 minutes. As a result, hydrogen is supplied to the photodiode 61.
- a polyimide film 609b is applied from above the plasma silicon nitride film 609a, and the polyimide film is applied to the cavity of the plasma silicon nitride film 609a.
- the portion to be the second waveguide 609 B of the above is buried. This is applied by spin coating at 300 rpm for 30 seconds.
- a hardening treatment is performed in a nitrogen or air atmosphere in order to secure an adhesive force with an underlayer (an oxide film or a nitride film). This is, for example, from 300 ° C to 350
- the plasma silicon nitride film 609 a and the polyimide film 609 b remaining on the upper surface of the upper film (insulating film 606) are down-converted. It is removed by low-plasma etching, and is etched back to the upper surface of the upper layer film (insulating film 606) to perform global flattening.
- the Porii Mi de film 6 0 9 b using a fluorine-based gas, a plasma silicon nitride film 6 0 9 & uses Rei_11? 2, A r, 0 2 gas.
- a passivation film 610, a flattening film 611, a color filter 612, and an on-chip lens 613 are sequentially formed in the same process as the conventional method. Complete the solid-state imaging device.
- the embedding property of the waveguide can be improved, and the light-collecting property can be improved and the variation in sensitivity characteristics can be reduced.
- the waveguide has a higher aspect ratio as the number of pixels increases and the number of pixels increases.
- the waveguide has the forward tapered portion. That is, an opening for forming a waveguide
- the portion has a forward tapered shape in which the size of the planar shape decreases from the light incident side surface toward the light receiving portion side. Therefore, it is possible to improve the embedding property of the light-transmitting material constituting the waveguide, thereby improving the light-collecting efficiency to the light-receiving portion, and to suppress the occurrence of wiring shaving, thereby improving the reliability of the solid-state imaging device. Can be secured.
- the solid-state imaging device of the present invention since the iL in which the high refractive index layer is satisfactorily embedded can be configured, the embedding property of the high refractive index layer in the hole can be improved as compared with the related art. It is possible to provide a solid-state imaging device having improved reliability, in which the covering property and the like are significantly improved.
- connection part since unnecessary reflection and refraction do not occur at the connection part, incident light can be guided into the light receiving part without leaking, and the light collection efficiency and sensitivity characteristics are further improved compared to the conventional solid An imaging device can be provided.
- a solid-state imaging device of the present invention it is possible to satisfactorily embed the high refractive index layers by reducing the depth of each opening. Thereby, a solid-state imaging device having high light-collecting efficiency can be manufactured. If the lower diameter of the upper opening is smaller than the upper diameter of the lower opening formed in the previous step, no stepped portion that generates unnecessary reflection or refraction will be formed. A solid-state imaging device with improved efficiency and sensitivity characteristics can be manufactured.
- the solid-state imaging device and the method of manufacturing the same of the present invention hydrogen contained in the first high refractive index material provided in the waveguide is released to the photoelectric conversion unit side, thereby containing hydrogen.
- a photoelectric conversion unit an increase in white spot due to metal diffusion from the waveguide to the photoelectric conversion unit can be suppressed, and there is an effect that image quality can be improved.
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Abstract
Description
Claims
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US10/538,943 US7442973B2 (en) | 2002-12-13 | 2003-12-12 | Solid-state imaging device and production method therefor |
KR1020117001532A KR101089684B1 (ko) | 2002-12-13 | 2003-12-12 | 고체 촬상 소자 및 그 제조방법 |
US12/127,434 US7842986B2 (en) | 2002-12-13 | 2008-05-27 | Solid-state imaging device and method for fabricating the same related application data |
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JP2002-362685 | 2002-12-13 | ||
JP2002362685A JP4427949B2 (ja) | 2002-12-13 | 2002-12-13 | 固体撮像素子及びその製造方法 |
JP2002373415 | 2002-12-25 | ||
JP2002-373745 | 2002-12-25 | ||
JP2002373745A JP4117545B2 (ja) | 2002-12-25 | 2002-12-25 | 固体撮像素子及びその製造方法 |
JP2002-373415 | 2002-12-25 | ||
JP2003-320920 | 2003-09-12 | ||
JP2003320920A JP4120543B2 (ja) | 2002-12-25 | 2003-09-12 | 固体撮像素子およびその製造方法 |
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US12/127,434 Continuation US7842986B2 (en) | 2002-12-13 | 2008-05-27 | Solid-state imaging device and method for fabricating the same related application data |
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Also Published As
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US7842986B2 (en) | 2010-11-30 |
TW200425492A (en) | 2004-11-16 |
KR20050085579A (ko) | 2005-08-29 |
KR20110011751A (ko) | 2011-02-08 |
KR20110010840A (ko) | 2011-02-07 |
US20060115230A1 (en) | 2006-06-01 |
US7442973B2 (en) | 2008-10-28 |
TWI236767B (en) | 2005-07-21 |
US20080265353A1 (en) | 2008-10-30 |
KR20110015473A (ko) | 2011-02-15 |
KR101089684B1 (ko) | 2011-12-07 |
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