US20020019117A1 - Silicon carbide and method of manufacturing the same - Google Patents

Silicon carbide and method of manufacturing the same Download PDF

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US20020019117A1
US20020019117A1 US09/924,872 US92487201A US2002019117A1 US 20020019117 A1 US20020019117 A1 US 20020019117A1 US 92487201 A US92487201 A US 92487201A US 2002019117 A1 US2002019117 A1 US 2002019117A1
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silicon carbide
silicon
impurity
layer
doping
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Hiroyuki Nagasawa
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Hoya Corp
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Hoya Corp
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Priority to US10/890,155 priority Critical patent/US7166523B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides

Definitions

  • This invention relates to silicon carbide and in particular, to a method of manufacturing a film of silicon carbide, a device including the silicon carbide, an ingot of silicon carbide, and the like.
  • the silicon carbide is used for a substrate material of a semiconductor device, a sensor, a dummy wafer in a semiconductor manufacturing process, an X-ray mask, a solar cell, and so on.
  • silicon carbide itself is a semiconductor which has a forbidden band as wide as 2.2 eV or more and which is formed by thermally, chemically, and mechanically stable crystals.
  • the Acheson method and the sublimation and recrystallization method (will be also called an improved Lely method).
  • the Acheson method is for reacting silicon on heated coke to deposit the silicon carbide on the surface of the coke while the sublimation and recrystallization method is for heating the silicon carbide obtained by the Acheson method to sublimate and thereafter recrystallize it.
  • the sublimation and recrystallization method is for heating the silicon carbide obtained by the Acheson method to sublimate and thereafter recrystallize it.
  • a liquid deposition method which melts silicon within a carbon crucible to pulling the silicon carbide with reacting floating carbon in the crucible with the silicon.
  • any other methods have also been proposed so as to obtain a silicon carbide film which has a high purity and reduced crystal defects.
  • CVD chemical vapor deposition
  • ALE atomic layer epitaxy
  • the silicon carbide is deposited on a surface of a substrate by thermally reacting a carbon source gas with another silicon source gas in a normal or a reduce pressure atmosphere.
  • silicon source molecules and carbon source molecules are alternately adsorbed on a substrate surface and epitaxial growth of the silicon carbide proceeds with crystallinity of the substrate kept unchanged in the silicon carbide.
  • the silicon carbide when used as a material of a semiconductor device, controlling an impurity is extremely important.
  • the silicon carbide be used as a substrate for a power semiconductor device of a discrete type, such as a Schottky-barrier diode.
  • the device has a series resistance or an on-resistance when the device is put in an on-state and the on-resistance is preferably small because of a reduction of a power loss within the device.
  • the substrate In order to decrease the on-resistance, the substrate must be doped with an impurity of an amount as large as 10 21 /cm 3 at maximum.
  • a breakdown voltage of a semiconductor device is generally proportional to ⁇ 0.5 power (namely, minus square root) of the impurity concentration. Taking this into account, the impurity concentration should be reduced to 1 ⁇ 10 14 /cm 3 at a portion of the device at which an electric field is concentrated.
  • a thermal diffusion method is used to dope the impurity into the substrate on manufacturing the semiconductor device which uses silicon as a base material.
  • the thermal diffusion method is for adding the impurity into the substrate by coating an impurity on a substrate surface or by exposing the substrate in an impurity atmosphere and by thereafter heating the substrate.
  • a thermal diffusion method can not be applied to a silicon carbide substrate. This is because a diffusion coefficient within the silicon carbide is extremely slow as compared with that within the silicon. This make it very difficult to diffuse an impurity to a depth (deeper than 1 ⁇ m with a concentration range between 1 ⁇ 10 14 and 1 ⁇ 10 21 /cm 3 ) which is available for manufacturing the semiconductor device.
  • an ion injection method is usually used to add an impurity to silicon carbide and is useful to widely control an impurity concentration.
  • restriction is inevitably imposed in the ion injection method on a distribution of impurity along a depth direction due to a range of injected ions.
  • the distribution of impurity depends on the range of the injected ions.
  • Japanese Unexamined Patent Publication No. Hei.11-503571, namely, 503571/1999 discloses a method of introducing a dopant into a semiconductor layer of silicon carbide.
  • the method should have a step of ion injecting a dopant into a semiconductor layer at a low temperature and a step of annealing the semiconductor layer at a high temperature.
  • the ion injecting step is performed at the low temperature so that an amorphous layer is formed near to a surface of the semiconductor while the annealing step is performed at the high temperature so that the dopant is diffused into an un-injected layer laid under the amorphous layer. Even when this method is used, it is difficult to diffuse the impurity with a high concentration over a whole of the substrate.
  • this method should further carry out ion injection (channeling injection) from a direction perpendicular to the silicon surface and another ion injection (random injection) from another direction oblique from the perpendicular direction by 7 degrees.
  • ion injection channeling injection
  • ion injection random injection
  • the temperature on the ion injection should be kept at a high temperature, such as 1200° C. or more.
  • trialkylboron should be used as an organic boron compound in a CVD process or a sublimation process. Specifically, let use be made of the organic boron compound which has, in a molecule, at least one boron atom chemically bonded to at least one carbon atom, when doping is carried out in a single crystal of silicon carbide by each of the CVD and the sublimation process.
  • the above-mentioned Publication points out that trialkylboron effectively acts as such an organic boron compound.
  • an impurity be doped with silicon carbide by using the sublimation and recrytallization method.
  • silicon carbide powder and an impurity source such as Al, B
  • an impurity source such as Al, B
  • a vapor pressure of the impurity source is very higher than that of the silicon carbide at a sublimation temperature.
  • an impurity concentration in the silicon carbide inevitably becomes high at a beginning of silicon carbide growth and becomes low at an end of the growth because the impurity source is wasted and extinct.
  • Such a variation of the impurity concentration gives rise to a variation of resisitivity among silicon carbide substrates when the silicon carbide formed by the sublimation and recrystallization method is sliced to obtain the silicon carbide substrates. This makes it difficult to realize a stable characteristic of a device.
  • the silicon carbide grown by the sublimation and recrystallization method does not always have a flat surface and a sharp pn junction or a flat pn junction can not be attained by the use of such silicon carbide.
  • a method to which this invention is applicable is for use in depositing a silicon carbide on a substrate from a vapor phase or a liquid phase.
  • the method comprises the steps of depositing a silicon layer on the substrate, doping the silicon layer with an impurity composed of at least one element selected from a group consisting of N, B, Al, Ga, In, P, As, Sb, Se, Zn, O, Au, V, Er, Ge, and Fe, to form a doped silicon layer, and carbonizing the doped silicon layer into a silicon carbide layer of the silicon carbide doped with the impurity.
  • the silicon layer depositing step, the doping step, and the carbonizing step are carried out during epitaxially growing a thin film on the substrate by the use of a chemical vapor deposition technique.
  • the silicon layer deposition step is carried out by using a gas of a silane group and a dichlorosilane group as a silicon raw material while the carbonizing step is carried out by the use of an unsaturated carbohydrate gas.
  • the silicon layer depositing step is followed by the doping step and the carbonizing step is carried out after the doping step.
  • the silicon layer depositing step and the doping step are simultaneously carried out and are followed by the carbonizing step.
  • the silicon layer depositing step and the doping step are simultaneously carried out while the carbonizing step is carried out when a predetermined time lapses after the start of both the silicon depositing and the doping steps.
  • the silicon carbide layer doped with the impurity is deposited to a desired thickness by repeating a process unit composed of the silicon depositing step, the doping step, and the carbonizing step a plurality of times.
  • an amount of impurity is varied during each doping step of the unit processes mentioned in the sixth aspect to provide a plurality of silicon carbide layers which have different impurity concentrations in a thickness direction, respectively.
  • the doping step controls an amount of impurity so that impurity concentrations in the silicon carbide fall within a range between 1 ⁇ 10 13 /cm 3 to 1 ⁇ 10 21 /cm 3 .
  • the doping step controls an amount of impurity so that an impurity concentration gradient falls within a range between 10 ⁇ 10 18 /cm 4 and 4 ⁇ 10 24 /cm 4 in a thickness direction of the silicon carbide layer.
  • the substrate has a surface which is structured by either one of a single crystal silicon, a silicon carbide of a cubic system, and a silicon carbide of a hexagonal system while the silicon carbide layer deposited on the surface of the substrate is structured by silicon carbide of a cubic system or a hexagonal system.
  • the method further comprises the step of removing the substrate from the silicon carbide layer after the formation of the doped silicon carbide, to leave a silicon carbide wafer.
  • the doping step of each process unit is carried out by varying a species of the impurities from one to another at each process unit to provide a pn junction in the doped silicon carbide layer.
  • the method further comprises the steps of using, as a seed crystal, the doped silicon carbide obtained in claim 1 and further growing a silicon carbide on the seed crystal by a vapor deposition method, a sublimation re-crystallization method, or a liquid deposition method.
  • a silicon carbide has a thickness and a region which has an impurity concentration gradient between 1 ⁇ 10 22 /cm 4 and 4 ⁇ 10 24 /cm 4 in the thickness direction.
  • a semiconductor device has the silicon carbide manufactured by the method according to the first aspect mentioned above.
  • a semiconductor device is structured by the silicon carbide according to the fourteenth aspect.
  • the impurity doped silicon is carbonized into the silicon carbide doped with the impurity.
  • this method it is possible to easily and accurately dope a desired impurity into the silicon with a high concentration because the impurity can easily be doped into the silicon in comparison with the silicon carbide. More specifically, the impurity and the impurity concentration are limited which can be doped into the silicon carbide while the silicon is easily doped with various kinds of impurities in a high concentration. This shows that impurity doping can be done to a high concentration which exceeds limits determined for a diffusion coefficient and a soluability of the impurity in the silicon carbide.
  • an amount of the impurity finally doped into the silicon carbide layer is coincident with an amount of the impurity previously doped into the silicon. Therefore, the amount of the impurity in the silicon carbide can be strictly controlled by impurity doping conditions, such as a doping amount of the impurity and a supply time, on forming the silicon layer. Moreover, it is to be noted that, since the diffusion coefficient of the impurity in the silicon carbide is by far lower than that in the silicon, it is possible to prevent an impurity distribution of the impurity in the silicon carbide from being disturbed due to inner diffusion.
  • a doping region of the impurity can be precisely controlled by considering a thickness of a previously deposited silicon layer and may exceed a thickness not thinner than 1 ⁇ m.
  • an impurity concentration in the silicon carbide can be readily varied over a very wide range, as mentioned in the eighth aspect of this invention. This makes it possible to apply this invention to a wide variety of semiconductors.
  • the silicon layer deposition step and the impurity doping step must be executed in the absence of any carbon material.
  • the impurity doping step may be carried out simultaneously with or after the silicon layer deposition step.
  • the carbonization step should be carried out after both the silicon deposition step and the impurity doping step. The reasons will be described later in detail.
  • the silicon materials may coexist with the carbon materials during the carbonization step as long as the carbon materials and the silicon materials are supplied within a predetermined flow rate range which is determined by a ratio of attachment coefficients. The reasons will be as follows. Within the predetermined flow rate range, the carbon materials act to form an adsorption layer on a substrate surface and the adsorption layer serves to prevent formation of the silicon carbide even when the carbon and the silicon materials are simultaneously given.
  • a chemical vapor deposition method (CVD), a molecular beam epitaxy (MBE) method, a liquid-phase epitaxy (LPE) method, or the like.
  • the substrate or base may have a silicon, a silicon carbide, TiC, a sapphire, or the like on at least surface thereof.
  • the impurities doped may be exemplified N, B, Al, Ga, In, P, As, Sb, Se, Zn, O, Au, V, Er, Ge, and Fe.
  • the third group of elements such as B, Al, Ga, In, act as acceptors to form a p-type semiconductor while the fifth group of elements, such as N, P, As, Sb, act as donors to form an n-type semiconductor.
  • the fourth group of elements, such as Se acts to form an energy level in a forbidden band due to a difference of electron affinities and to vary an electric resistance.
  • the other elements, such as Zn, O, Au, V, Ge, Fe serve to form deep energy levels and, as a result, to vary a life time of minority carriers and resistivity.
  • the above-enumerated impurities may be used individually or combined. For example, even when the impurities are of the same type to act as donors, acceptors, such impurities of the same type often form different energy levels in the forbidden band and provide different temperature variations of resistivity from each other. In the case where the resistivity at a certain temperature is to be adjusted, a plurality of the impurities of the same type may be added simultaneously. Specifically, two elements, for example, N and P, may be selected from the fifth group of elements mentioned above and be added simultaneously.
  • a donor and an acceptor may be added at the same time to compensate for carriers and, as a result, to increase the resistivity.
  • This technique makes it possible to form, for example, an i (intrinsic) layer in a PIN diode.
  • the donor and the acceptor may be, for instance, N and B, respectively.
  • another impurity that has an inverse characteristic to the impurity may be added.
  • adjustment may be carried out such that cancellation is made about natures of the impurities, which is helpful to obtain a silicon carbide of a high resistivity.
  • the above-mentioned silicon layer deposition step, impurity doping step, and carbonization step may be executed by controlling supplies of raw materials of a vapor phase or a liquid phase. For example, such adjustment may be made about a concentration ratio of impurity sources mingled in the raw material of the silicon carbide and a time of mixing the impurities.
  • gases of a silane group and a dichlorosilane group are exemplified dichlorosilane, tetrachlorosilane, trichlorosilane, hexachlorosilane, or the like.
  • unsaturated hydrocarbon gases are exemplified acetylene, ethylene, propane, or the like. Using these raw materials can reduce a temperature of forming a silicon carbide, widen a tolerance range accepted for varying a gas flow rate, and improve crystallinity of the silicon carbide obtained.
  • a base sheet such as a substrate during reaction
  • a temperature range between 900° C. and 1400° C., preferably, between 1000° C. and 1400° C.
  • the reaction temperature is too high, the silicon is fused when it is used as the base sheet while, when the reaction temperature is too low, the reaction speed becomes too slow.
  • the sixth aspect it is possible to attain an impurity doped layer which has an optional or desirable concentration profile.
  • the method according to this aspect dispenses with any limitations related to impurities when they are diffused into the silicon.
  • the seventh aspect can realize a desirable concentration gradient that may be, for example, a sharp concentration gradient which can not be obtained by a conventional method.
  • a concentration gradient may be a steep concentration gradient defined by the ninth aspect mentioned above.
  • the tenth aspect according to this invention can realize an excellent silicon carbide.
  • the silicon carbide substrate may be used as a silicon carbide substrate for a semiconductor as it is.
  • Such a silicon carbide substrate may be formed by the Acheson method or the sublimation and recrystallization method or may be a carbonized silicon surface.
  • such a substrate and a surface may be collectively called a base body.
  • the base body may be a substrate which has a surface with a slightly inclined crystal normal axis (namely, the substrate with an off angle).
  • a substrate may be exemplified by a silicon substrate of ( 100 ) which has a surface normal angle slightly inclined from [ 001 ] direction towards [ 110 ] one.
  • the substrate may have a plurality of undulations extended in parallel with one another on a surface in a predetermined single direction.
  • a silicon substrate having undulations extended in parallel in a direction of [ 011 ] on a substrate surface defined by ( 001 ) plane, a silicon carbide substrate of a cubic system, or the like.
  • the above-enumerated substrate is helpful to reduce defects on a silicon carbide layer to be deposited thereon and therefore serves to obtain a silicon carbide of a high quality.
  • the twelfth aspect of this invention is helpful to obtain a silicon carbide semiconductor wafer that has a desirable and uniform impurity concentration or an impurity concentration distribution strictly controlled.
  • the base body may be removed.
  • removal of the base body can be accomplished after deposition of the silicon carbide layer on the silicon substrate by etching or cutting the base body.
  • the deposited thick silicon carbide layer may be sliced by a wiring saw and so on to be left as a wafer. More particularly, when the wafer has a diameter of 6 inches, the thickness of the silicon carbide layer may be, for example, 0.65 mm.
  • the silicon carbide layer when the wafer has a diameter of 5 inches, the silicon carbide layer may be 0.5 mm thick. Alternatively, the silicon carbide layer may be 0.36 mm thick or so when the wafer has a diameter of 3 inches or 4 inches. From this fact, it is readily understood that the impurity concentration can be precisely controlled over a whole of the wafer even when the wafer is wide in area and the silicon carbide layer is comparatively thick. Specifically, it is possible to reduce a variation of the impurity concentration over a whole surface (wider than 4 inches in diameter) to less than 5 % and to reduce a variation of the impurity concentration in a thickness direction to less than 5%.
  • the variation of the impurity concentration represented by % is calculated by:
  • the impurity concentration gradient may be precisely controlled in accordance with the ninth or the fourteenth aspect of this invention mentioned above.
  • the twelfth aspect of this invention serves to form a pn junction which is precisely controlled in impurity concentration and is helpful to manufacture a desirable semiconductor device with a good yield in bulk.
  • the thirteenth aspect of this invention can suitably select an impurity concentration of the silicon carbide used as a seed crystal. This enables to control electric resistivity to an appropriate value and, thereby, serves to avoid adhesion of particles appearing during the crystal growth. As a result, an excellent silicon carbide ingot can be obtained.
  • the fourteenth aspect of this invention makes it possible to easily obtain a slice of a desired concentration by forming a silicon carbide having a concentration gradient in a thickness direction and by cuffing the silicon carbide into a plurality of slices. This is effective to widen a control width of an inner electric field within a semiconductor and to design an operating characteristic of a semiconductor device.
  • the fifteenth aspect of this invention serves to obtain a power semiconductor or the like which has a high speed, a high efficiency, and a high breakdown voltage.
  • the sixteenth aspect of this invention serves to manufacture such a semiconductor.
  • FIG. 1 shows a diagrammatic view for use in describing a CVD device available for a silicon carbide manufacturing method according to this invention
  • FIG. 2 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a first embodiment of this invention
  • FIG. 3 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a second embodiment of this invention
  • FIG. 4 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a third embodiment of this invention
  • FIG. 5 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a fourth embodiment of this invention
  • FIG. 6 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a fifth embodiment of this invention.
  • FIG. 7 is a graph which represents concentrations of electrons in silicon carbide obtained by varying start time instants (ts) and flow rates (fn);
  • FIG. 8 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a first comparative example
  • FIG. 9 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a second comparative example
  • FIG. 10 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a third comparative example
  • FIG. 11 is a graph which represents concentrations of electrons included in silicon carbide obtained by varying the flow rates.
  • FIG. 12 shows a timing diagram for use in describing a silicon carbide manufacturing method according to a fourth comparative example.
  • FIGS. 1 and 2 description will be made about a silicon carbide manufacturing method according to a first embodiment of this invention.
  • the method according to the embodiment of this invention is executed by the use of a CVD device or apparatus illustrated in FIG. 1 in accordance with a timing chart shown in FIG. 2.
  • description will be also made about silicon carbide according to this invention.
  • the method according to the first embodiment of this invention is featured by carrying out an impurity doping process after deposition of a silicon layer and by thereafter carrying out a carbonizing process.
  • the CVD device illustrated in FIG. 1 has a deposition chamber 1 and a gas inlet pipe or conduit 2 which has a nozzle 2 a positioned at a center portion of the deposition chamber 1 and standing substantially perpendicularly on the center portion.
  • a plate 3 is fixed to a tip portion of the gas inlet pipe adjacent to the nozzle 2 a .
  • a heating member 5 is attached to a lower side of the plate 3 so as to heat substrates 4 or the like placed on an upper side of the plate 3 .
  • the substrates 4 serve as base members according to this invention.
  • a gas supply facility is placed so as to supply gases to the gas inlet pipe 2 and has gas supply sources (not shown) of H 2 gas, N 2 gas, SiH 2 Cl 2 gas, and C 2 H 2 gas and valves 2 b , 2 c , 2 d , and 2 e connected between the gas inlet pipe 2 and the above-mentioned gas supply sources.
  • gas supply sources (not shown) of H 2 gas, N 2 gas, SiH 2 Cl 2 gas, and C 2 H 2 gas and valves 2 b , 2 c , 2 d , and 2 e connected between the gas inlet pipe 2 and the above-mentioned gas supply sources.
  • an exhaust pipe 6 is coupled to the deposition chamber 1 and is also coupled to an exhaust pump (not shown) or the like through a pressure control valve 7 .
  • the deposition chamber 1 can be exhausted by the exhaust pump through the pressure control valve 7 .
  • the CVD device illustrated in FIG. 1 is so-called a known reduced CVD device of a cold-wall type and serves to grow a thin film on each substrate 4 in a known manner. Specifically, such growth of the thin film can be accomplished by heating the substrates 4 on the plate 3 by the heating member 5 , by exhausting the deposition chamber 1 through the exhaust pipe 6 , by supplying a selected one of the gases within the deposition chamber 1 through the nozzle 2 a of the gas inlet pipe 2 , and by forming a vapor phase within the deposition chamber 1 .
  • the above-mentioned reduced CVD device can manufacture silicon carbide in the following manner.
  • a silicon substrate of a single crystal is prepared as each substrate 4 and has a diameter of six inches and a surface layer on which a ⁇ 001 ⁇ plane of the single crystal appears.
  • the silicon substrate is subjected to pre-processing to carbonize the surface layer of the silicon substrate into a thin silicon carbide film.
  • Such a thin silicon carbide film underlies a silicon carbide layer which is grown on the substrate and therefore serves as a buffer layer or an underlying layer of the silicon carbide layer so as to grow the silicon carbide layer of an excellent crystallinity.
  • the valves 2 b and 2 c are opened.
  • the H 2 gas and the C 2 H 2 gas are introduced at flow rates of 200 sccm and 50 sccm to a pressure of 100 mTorr into the deposition chamber 1 , respectively.
  • the substrates 4 are heated by the heating member 5 to 1200° C. within about 1 minute.
  • Each resultant surface layer of the substrates 4 is previously carbonized into the silicon carbide film which may be called a previous silicon carbide film.
  • the valve 2 e is closed to temporarily stop supplying the C 2 H 2 gas.
  • the H 2 gas is caused to continuously flow at a flow rate of 200 sccm with the substrate temperature kept at 1200° C.
  • the deposition chamber 1 is kept at the pressure of 60 mTorr by exhausting the deposition chamber 1 .
  • the pressure control valve 7 is controlled so as to adjust an exhaust rate of a gas exhausted through the exhaust pipe 6 . Under the circumstances, the following deposition is executed.
  • the H 2 gas is caused to continuously flow over a whole processing duration, as mentioned before, while the valve 2 c is opened for five (5) seconds to introduce the SiH 2 Cl 2 gas at a flow rate of 30 sccm into the deposition chamber 1 and to deposit a silicon layer on each substrate 4 subjected to the preprocessing mentioned in the above-mentioned manner. Subsequently, the valve 2 c is closed to stop supplying the SiH 2 Cl 2 gas while the valve 2 d is opened to introduce the N 2 gas into the deposition chamber 1 at a flow rate of 50 sccm for five (5) seconds, as illustrated in FIG. 2.
  • Such introducing the N 2 gas is for adding donor impurities into the silicon layer to obtain a doped silicon layer doped with the nitrogen.
  • the valve 2 d is closed to stop supply of the N 2 gas while the valve 2 e is opened to introduce the C 2 H 2 gas into the deposition chamber 1 at a flow rate of 10 sccm for five (5) seconds.
  • Such introducing C 2 H 2 gas serves to carbonize the doped silicon layer into a doped silicon carbide.
  • a unit process is defined by a sequence of the silicon layer deposition process, the process of doping the nitrogen into the silicon layer, and the process of carbonizing the doped silicon layer.
  • the unit process is repeated two thousands (2000) times in the illustrated example.
  • the doped silicon carbide layer of a cubic system is epitaxially grown on the substrate 4 in the above-mentioned process.
  • the silicon carbide layer is deposited on each substrate 4 to a thickness of 54 micron meters after 8.3 hours lapses and is composed of a single crystal.
  • a nitrogen (N) concentration in the doped silicon carbide has been measured by a SIMS (secondary ion mass spectrometer).
  • SIMS secondary ion mass spectrometer
  • a concentration of electrons in the doped silicon carbide is as high as 7.2 ⁇ 10 19 /cm 3 at a room temperature when it has been measured by the use of a Hall effect.
  • the resistivity or specific resistance of the doped silicon carbide has been found to be 0.007 ⁇ cm.
  • a variation of the impurity concentration has been 3.7% within a plane and in a depth direction.
  • FIG. 3 description will be made about a silicon carbide manufacturing method and silicon carbide according to a second embodiment of this invention.
  • the method will is specified by a time diagram for describing timing of supplying raw material gases and is similar to that illustrated in FIG. 2 except that a unit process shown in FIG. 3 is different from that illustrated in FIG. 2. Therefore, description will be mainly directed to the unit process of FIG. 3 and will be omitted about portions or processes common to the first and the second embodiments.
  • the method according to the second embodiment of this invention is featured by simultaneously executing both the silicon layer deposition process and the impurity doping process and by thereafter executing the carbonization process.
  • the unit process according to the second embodiment of this invention has a doping process which is executed simultaneously with the depositing process of depositing a silicon layer on a previous silicon carbide layer.
  • the valve 2 c is opened to supply a SiH 2 Cl 2 gas to the deposition chamber 1 (FIG. 1) at a flow rate of 50 sccm for five seconds and, at the same time, the valve 2 d is opened to supply a nitrogen gas (N 2 ) at a flow rate of 50 sccm for five seconds.
  • N 2 nitrogen gas
  • both the valves 2 c and 2 d are concurrently closed to interrupt the supply of the SiH 2 Cl 2 gas and the nitrogen gas (N 2 ).
  • the valve 2 e is opened to supply the C 2 H 2 gas into the deposition chamber 1 at the flow rate of 10 sccm for five seconds to carbonize the silicon layer doped with the nitrogen.
  • the doped silicon carbide is deposited on the substrate 4 to a thickness of 54 ⁇ m after lapse of 5.6 hours.
  • the impurity concentration of nitrogen included in the doped silicon carbide grown on the substrate 4 is as high as 7.4 ⁇ 10 19 /cm 3 .
  • the total amount of N 2 supplied into the deposition chamber 1 is identical with that of the first embodiment.
  • the nitrogen has been uniformly distributed within the doped silicon carbide.
  • the concentration of electrons in the doped silicon carbide is equal to 7.2 ⁇ 10 19 /cm 3 when measurement is made at the room temperature by the Hall effect and that its resistivity is 0.007 ⁇ cm.
  • the variation of the impurity concentration has been restricted to the ranges of 3.7% within the plane and in the depth direction.
  • the second embodiment can obtain a similar silicon carbide semiconductor within a time shorter than that needed in the first embodiment.
  • FIG. 4 description will be made about a silicon carbide manufacturing method according to a third embodiment and silicon carbide obtained by the method.
  • the method according to the third embodiment is executed in accordance with a timing diagram illustrated in FIG. 4 and is similar to those illustrated in FIGS. 2 and 3 except that the unit process of FIG. 4 is different from the other embodiments.
  • the unit process shown in FIG. 4 is featured by simultaneously carrying out the silicon layer deposition process and the impurity doping process and by executing the carbonization process after lapse of a predetermined time duration.
  • the unit process according to this embodiment is composed of the silicon layer deposition process carried out by continuously supplying the SiH 2 Cl 2 gas at a flow rate of 30 sccm with the valve 2 c opened and the impurity or donor doping process carried out by continuously supplying the N 2 gas at a flow rate of 50 sccm with the valve 2 d opened.
  • the SiH 2 Cl 2 gas and the N 2 gas are concurrently and continuously supplied into the deposition chamber 1 to continuously and concurrently execute the silicon layer deposition process and the N (donor) or impurity doping process.
  • valve 2 e is opened after lapse of 5 seconds from the beginning of supplying both the SiH 2 Cl 2 and the N 2 gases to supply the C 2 H 2 gas for five seconds at a flow rate of 10 sccm.
  • the N-doped silicon layer is carbonized.
  • the supply of both the SiH 2 Cl 2 and the N 2 gases is continued during the supply of C 2 H 2 gas.
  • the above-mentioned unit process illustrated in FIG. 4 is repeated 2000 times over 5.6 hours.
  • epitaxial growth on the substrate 4 (the silicon substrate) is made to deposit the silicon carbide semiconductor film of the cubic system to a thickness of 54 ⁇ m.
  • the impurity within the silicon carbide grown on the silicon substrate was measured by the SIMS, it has been confirmed that the concentration of N in the silicon carbide reached to 7.3 ⁇ 10 19 /cm 3 and was uniformly distributed.
  • the concentration of the electrons in the doped silicon carbide was measured by the Hall effect at the room temperature and was equal to 7.2 ⁇ 10 19 /cm 3 .
  • the resistivity of the silicon carbide was 0.07 ⁇ cm.
  • the variation of the impurity concentrations in plane and in the depth direction was about 3.7%.
  • the impurity doping into the silicon carbide substantially does not take place during the supply of the C 2 H 2 gas (namely, the carbonization process of the silicon layer).
  • the impurity doping process and the carbonization process are separately executed in time.
  • This embodiment can simplify the gas supply control in comparison with the other embodiments.
  • FIG. 5 description will be made about a silicon carbide manufacturing method according to a fourth embodiment of this invention.
  • raw material gas supply timing is illustrated like in FIGS. 2, 3, and 4 .
  • the method illustrated in FIG. 5 is similar to that of FIG. 4 except that BCl 2 gas is used instead of N 2 gas to dope the acceptors into the silicon layer as the impurity in the unit process and the C 2 H 2 gas is supplied at a flow rate of 5 sccm.
  • the unit process is repeated 2000 times for 5.6 hours and, as a result, the silicon carbide is deposited or grown on the silicon substrate 4 to a thickness of 54 ⁇ m.
  • the boron concentration within the silicon carbide grown in the above-mentioned manner has been measured by the SIMS and the concentration of electrons was also measured by the Hall effect. As a result, the boron concentration was equal to 1.3 ⁇ 10 19 /cm 3 and uniformly distributed into the silicon carbide while the concentration of holes was 1.0 ⁇ 10 19 /cm 3 .
  • the resistivity of the silicon carbide was 0.01 ⁇ cm while the variation of the impurity was about 3.7% in plane and in the thickness direction.
  • a silicon carbide manufacturing method according to a fifth embodiment of this invention will be described with reference to a timing diagram of gas supply timing.
  • description will be made about the silicon carbide manufacturing method and the silicon carbide manufactured by the method.
  • the flow rate (fn) of the N 2 gas is varied to manufacture a great number of silicon carbide semiconductors.
  • ts start time instant of supplying the C 2 H 2 gas is widely changed from the start time instant of supplying the SiH 2 Cl 2 gas and the N 2 gas, as illustrated in FIG. 6.
  • the other conditions are similar to those illustrated in the third embodiment and will not be described any longer.
  • FIG. 7 illustration is made about a relationship between concentrations of electrons and both the start time instant (ts) and the flow rate (fn).
  • the great number of the silicon carbide semiconductors have been prepared or manufactured by changing the start time instant (ts) and the flow rate (fn) and have been measured in the manner mentioned before.
  • the concentrations of electrons are substantially proportional to both the start time instant (ts) and the flow rate (fn) and fall within a range between 3 ⁇ 10 14 /cm 3 and 1.8 ⁇ 10 20 /cm 3 .
  • it may be expected that a higher concentration of electrons has been achieved by delaying the start time instant ts for more than ten seconds.
  • a pn junction is formed on a single crystal silicon substrate to manufacture a semiconductor device.
  • an n-type semiconductor is at first deposited on a silicon substrate 4 by repeating the unit process of the third embodiment 1000 times.
  • a p-type semiconductor is deposited on the n-type semiconductor by repeating the unit process of the fourth embodiment 1000 times.
  • the silicon carbide semiconductor is obtained which has the silicon substrate 4 and a silicon carbide semiconductor on the silicon substrate 4 .
  • the silicon carbide semiconductor has a thickness of 54 ⁇ m and the pn junction.
  • a deposition or formation time lasts for 5.6 hours and the deposition conditions are similar to those mentioned in conjunction with the third and the fourth embodiments except for repetition times for deposition.
  • the silicon substrate of the single crystal is removed by the use of a mixed solution of HF and HNO 3 with the silicon carbide alone left.
  • the silicon carbide has an upper surface and a lower surface on which the p-type and the n-type semiconductors are exposed.
  • Electrodes of Ni are evaporated on the upper and the lower surfaces and thereafter, electrical conductors are bonded to the respective electrodes.
  • a capacitance between the pn junction is measured with a d.c. voltage impressed between the electrical electrodes.
  • the d.c. voltage falls within a range between ⁇ 10 volts and +10 volts and an a.c. voltage of 0.2 volt is impressed between the electrical electrodes.
  • a variation of the capacitance relative to the impressed voltage has shown that a built-in potential of the pn junction thus manufactured becomes equal to 1.5 volts and an impurity gradient in the pn junction becomes equal to 1.4 ⁇ 10 24 /cm 4 .
  • a voltage is impressed between the pn junction with the upper and the lower electrodes given minus and plus voltages, respectively.
  • silicon carbide is manufactured by the sublimation and recrystallization method by using, as a seed crystal, the silicon carbide mentioned in each method of the above embodiments.
  • the method according to the seventh embodiment of this invention use the fifth embodiment mentioned above to form a first seed crystal of silicon carbide of a cubic system.
  • the first seed crystal is deposited on a silicon substrate of a cubic system having a diameter of 6 inches and has therefore a diameter of 6 inches.
  • the first seed crystal of the silicon carbide is deposited by selecting the flow rate fn and the start time instant ts (FIG. 7) such that the silicon carbide has resistivity of 0.001 ⁇ cm.
  • a second seed crystal of the silicon carbide which has resistivity of 50 ⁇ cm is formed on a silicon substrate of 6 inches in diameter by selecting the flow rate fn and the start time instant ts.
  • the second seed crystal also has a diameter of 6 inches.
  • a crucible of graphite which enters powder of SiC on its bottom.
  • Each of the above-mentioned substrates with the first and the second seed crystals is placed downwards in the crucible with the first and the second seed crystals faced towards the SiC powder.
  • the SiC powder and each of the substrates are heated to temperatures of 2400° C. and 2000° C., respectively.
  • the SiC powder is sublimated and recrystallized on each of the substrates to form a recrystallized SiC layer.
  • a space or a gap between each surface of the substrates and the SiC power surface is equal to 100 mm and a deposition rate of SiC is 0.5 mm/hr.
  • the SiC layer is deposited to a thickness of 10 mm and is etched at a temperature of 500° C. by the use of fused KOH for ten minutes. Thereafter, an etch pit density has been measured in connection with the first and the second substrates. As a result of the measurement, it has been found out that the etch pit density of the first seed crystal (which has the resistivity of 0.005 ⁇ cm) is not greater than 10/cm 2 while that of the second seed crystal (which has the resistivity of 50 ⁇ cm) is as large as 3500/cm 2 . From this fact, it is readily understood that a defect density can be remarkably reduced when the resisitivity of the seed crystal, such as the first seed crystal, is extremely low.
  • the pn junction according to this embodiment has a sharp or steep concentration gradient over 10 24 /cm 4 .
  • the impurity concentration can be controlled and varied within the range between 1 ⁇ 10 14 and 1 ⁇ 10 21 /cm 3 , as described in conjunction with the fifth embodiment. This shows that the concentration gradient can be also controlled within a range between 10 17 /cm 4 and 10 24 /cm 4 and a breakdown voltage in the pn junction of the semiconductor device can be controlled within a wide range between 3 and 10000 volts.
  • this invention can carry out the impurity concentration control over a wide range and the impurity concentration gradient with a high precision, which makes it possible to control a built-in potential and the breakdown voltage with a high precision.
  • the impurities according to this invention may not be restricted to N 2 , BCl 3 but may be all the impurities that can be diffused into the silicon. At any rate, the merit of this invention can be obtained without any restriction of the impurities, if they can be diffused into the silicon.
  • SiH 2 Cl 2 and C 2 H 2 gases as raw materials of the silicon carbide has been described in the above-mentioned embodiments. However, any other carbon sources may be combined with one another, if they can carbonize the silicon.
  • the growth temperature of the silicon carbide has been assumed to be 1200° C.
  • this invention may be effectively applicable if the growth temperature is not lower than 900° C.
  • the gas supply time during the growth of the silicon carbide may not be limited to the above-mentioned embodiments but the gas supply time duration and the gas introduction repetition times may be selected in consideration of the thickness of the silicon carbide.
  • This invention is also effective regardless of any crystal phase of the silicon carbide.
  • the crystal phase of the silicon carbide may be of a hexagonal system or a rhombohedral system instead of the cubic system.
  • the liquid deposition is started by at first attaching a substrate surface to fused silicon solution to deposit a silicon layer on the substrate surface. Thereafter, the silicon layer is exposed to an atmosphere of an impurity (for example, an impurity vapor phase atmosphere or a fused silicon solution including the impurity) to diffuse the impurity into the silicon layer. Subsequently, the silicon surface doped with the impurity is exposed in an atmosphere of silicon carbide.
  • an impurity for example, an impurity vapor phase atmosphere or a fused silicon solution including the impurity
  • the above-mentioned liquid deposition can also attain a merit similar to the vapor deposition and can optionally accomplish the impurity concentration gradient between 1 ⁇ 10 18 /cm 4 and 4 ⁇ 10 24 /cm 4 , differing from the above-mentioned impurity concentration gradient of 1.4 ⁇ 10 24 /cm 4 .
  • the first comparative example is similar to the above-mentioned first embodiment according to this invention except that a unit process is different from that of the first embodiment.
  • the first comparative example deposits a silicon carbide layer by simultaneously and continuously supplying H 2 gas, SiH 2 Cl 2 gas, N 2 gas, and H 2 gas for sixty minutes into a deposition chamber. This shows that the silicon carbide deposition and the impurity doping are simultaneously carried out in the first comparative example. A total amount of each gas is identical with that of the first embodiment.
  • the silicon carbide semiconductor film of the cubic system is deposited on a single crystal silicon substrate to a thickness of 77 ⁇ m.
  • the impurity included in the silicon carbide grown on the silicon substrate was measured by the SIMS (secondary ion mass spectrometer), it has been found out that the impurity or nitrogen concentration in the silicon carbide is as low as 3.2 ⁇ 10 16 /cm 3 and is uniformly distributed within the silicon carbide.
  • the concentration of electrons measured by the Hall effect was equal to 2.7 ⁇ 10 16 /cm 3 and the resistivity of the silicon carbide was 0.42 ⁇ cm.
  • the variation of the impurity concentration was spread over regions of 8.2% in plane and in a thickness direction.
  • the first embodiment is different from the first comparative example in that the carbonization process is executed after the deposition process and the doping process are simultaneously carried out.
  • Comparison between the first embodiment and the first comparative example shows the fact that the impurity concentration according to the first embodiment is remarkably higher that that of the first comparative example by more than three digits and the resistivity of the silicon carbide according to the first embodiment is very lower than that of the first comparative example.
  • the second comparative example executes processing in accordance with a timing diagram illustrated in FIG. 9.
  • the second comparative example is similar to the first comparative example except that BCl 3 gas is supplied at the flow rate of 20 sccm, instead of the N 2 gas.
  • the second comparative example dopes boron (B) as acceptors into the silicon layer in lieu of doping nitrogen (N) as donors. Therefore, the remaining processes are similar to those illustrated in FIG. 8 and will not be described any longer.
  • the silicon carbide layer of the cubic system is deposited to a thickness of 77 ⁇ m on a silicon substrate.
  • the boron (B) is uniformly distributed in the silicon carbide and the boron (B) concentration is as low as 2.2 ⁇ 10 16 /cm 3 .
  • the concentration of holes in the silicon carbide was equal to 7.5 ⁇ 10 15 /cm 3 when it was measured by the use of the Hall effect while the resistivity of the silicon carbide was 1.75 ⁇ cm.
  • the variation of the impurity concentration was 8.2% in plane and in the thickness direction.
  • FIG. 10 description will be made about a silicon carbide manufacturing method and silicon carbide according to a third comparative example.
  • the method illustrated in FIG. 10 is similar to the first comparative example illustrated in FIG. 8 except that the flow rate (fn) of N 2 gas is changed in FIG. 10 to deposit various kinds of silicon carbide semiconductors. Therefore, detail description will be omitted in connection with the manufacturing method according to the third comparative example.
  • FIG. 11 illustration is made about a graph which represents a relationship between the flow rate (fn) (sccm) and the concentration (cm ⁇ 3 ) of electrons.
  • fn flow rate
  • sccm concentration of electrons
  • concentration of electrons tends to increase with an increase of the flow rate (fn) of the nitrogen gas (N 2 ) but is not proportional to the flow rate (fn). Precisely, the increase of the concentration of electrons tends to be saturated as the fn increases.
  • a variation of the concentration of electrons falls within a range between 1 ⁇ 10 13 /cm 3 and 4 ⁇ 10 16 /cm 3 .
  • the variation range is narrower than that of the above-mentioned embodiment according to this invention and is not enough to manufacture a semiconductor device.
  • a semiconductor device which has a pn junction deposited on a single crystal silicon substrate 4 .
  • the n-type semiconductor is deposited for thirty minutes on the silicon substrate in accordance with the first comparative example.
  • the p-type semiconductor is deposited on the n-type semiconductor for thirty minutes in accordance with the third comparative example to form a silicon carbide semiconductor of 77 ⁇ m thick on the silicon substrate 4 .
  • the pn junction is formed within the silicon carbide semiconductor.
  • the deposition conditions are similar to those mentioned in connection with the firs and the third comparative examples except for the deposition time duration.
  • the substrate 4 (namely, the single crystal silicon substrate) is eliminated from the silicon carbide semiconductor by using a mixed solution of HF and HNO 3 .
  • electrodes of Ni are evaporated and connected to conductors.
  • a capacitance of the pn junction is measured by impressing a d.c. voltage between ⁇ 10 volts and +10 volts.
  • the capacity measurement is executed by giving an a.c. voltage (0.2 volt) of 1 MHz to observe a variation of the capacitance relative to the impressed d.c. voltage.
  • the variation of the capacitance shows that the built-in potential of the pn junction manufactured above is equal to 0.92 volt and the impurity concentration gradient in the pn junction is calculated as 4.5 ⁇ 10 18 /cm 4 .
  • the breakdown has taken place at a voltage of 14 volts. From this fact, it is to be noted that the built-in potential and the impurity concentration gradient according to the fourth comparative example are lower than those of the sixth embodiment of this invention while the breakdown voltage of the fourth comparative example is very higher than that of the sixth embodiment. Accordingly, the sixth embodiment according to this invention is effective to manufacture the semiconductor device which has the pn junction.
  • this invention is concerned with a silicon carbide manufacturing method of manufacturing a silicon carbide semiconductor device by depositing a thin film on a substrate from a vapor phase or a liquid phase.
  • this invention is featured by the silicon layer deposition process of depositing the silicon layer on the substrate, the impurity doping process of doping, into the silicon layer, at least one element selected from an impurity group consisting of N, B, Al, Ga, In, P, As, Sb, Se, Zn, O, Au, V, Er, Ge, and Fe, and the carbonization process of carbonizing the doped silicon layer into a doped silicon carbide layer.
  • This invention can realize the silicon carbide manufacturing method, the silicon carbide, and the semiconductor without any restrictions of impurity sources and impurity concentrations.
  • the silicon carbide manufacturing method can manufacture the silicon carbide semiconductor under a high productivity and with a high yield.

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