TWI300268B - Suppression of n-type autodoping in low-temperature Si and SiGe epitaxy - Google Patents

Suppression of n-type autodoping in low-temperature Si and SiGe epitaxy Download PDF

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TWI300268B
TWI300268B TW91104916A TW91104916A TWI300268B TW I300268 B TWI300268 B TW I300268B TW 91104916 A TW91104916 A TW 91104916A TW 91104916 A TW91104916 A TW 91104916A TW I300268 B TWI300268 B TW I300268B
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Barteld De Boer Wiebe
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Nxp Bv
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1300268 A7 _____B7 五、發明説明(1 ) 本發明係與如申請專利範圍第1項之前言所定義之半導 體裝置的製造方法有關。 本方法與在單晶矽層上利用化學氣相沉積(c V D )成長 掺雜系晶S i或Sii-xGex (SiGe)層的方法有關,須知在此磊 晶層中控制掺質濃度與摻質輪廓是一項挑戰。 習知中所熟知在低溫時結合摻雜s丨或siGe的磊晶時,於 關閉摻質的供應之後’仍會繼續摻質的混合,此製程為熟 知的自動摻雜(autodoping )效應。在此磊晶成長製程中由 於此效應,會得到與所需輪廓不同之摻質輪廓。由於摻質 通常自下層(高溫)擴散至成長的磊晶層、摻質物種自磊晶 反應谷器之壁與基板夾具(holder )的吸收,及摻質物種自 基板之前端與後端的蒸發,而發生此自動掺雜效應。 因此自動摻雜效會明.顯地以無預期的狀態改變了磊晶層 中的掺質濃度。 均 傳統來說,晶圓在一含氫環境曝露於高溫下(〜1〇〇〇〇c或 更南),以在開始羞晶成長製程前自表面移除原生氧化 層’特別是在低壓下所進行妁高溫處理,亦可減少在反應 室内表面及晶圓表面之摻質種的吸附,此通常為一降低自 動摻雜之方法;然而,由於在此高溫之下,裝置的特徵尺 寸與摻質的擴散長度相比仍很小,故高溫對為電子裝置的 製造仍然有害。 由US 3,669,769可得知將自動摻雜效應降至最低時,在 單晶S i上成長磊晶層的方法,本方法提供磊晶層非常低 的初始成長速率,而在得到某一最小厚度之後即增加成長 -4-1300268 A7 _____B7 V. DESCRIPTION OF THE INVENTION (1) The present invention relates to a method of manufacturing a semiconductor device as defined in the foregoing paragraph 1 of the patent application. The method is related to a method of growing a doped system Si or Sii-xGex (SiGe) layer by chemical vapor deposition (c VD ) on a single crystal germanium layer, and it is known to control the dopant concentration and doping in the epitaxial layer. The quality profile is a challenge. It is well known in the art that when epitaxially doped s- or siGe is combined at low temperatures, the mixing of the dopants is continued after the supply of the dopant is turned off. This process is a well-known autodoping effect. In this epitaxial growth process, due to this effect, a dopant profile different from the desired profile is obtained. Since the dopant generally diffuses from the lower layer (high temperature) to the growing epitaxial layer, the absorption of the dopant species from the walls of the epitaxial reaction cell and the substrate holder, and the evaporation of the dopant species from the front and back ends of the substrate, This automatic doping effect occurs. Therefore, the automatic doping effect will clearly change the dopant concentration in the epitaxial layer in an unexpected state. Traditionally, wafers are exposed to high temperatures (~1〇〇〇〇c or more) in a hydrogen-containing environment to remove the native oxide layer from the surface before starting the shading growth process, especially at low pressures. The high temperature treatment of the crucible can also reduce the adsorption of the dopant species on the surface of the reaction chamber and the surface of the wafer, which is usually a method of reducing the automatic doping; however, due to the high temperature, the feature size and blending of the device The mass diffusion length is still small compared, so the high temperature is still detrimental to the manufacture of electronic devices. A method for growing an epitaxial layer on a single crystal Si with a minimum doping effect is known from US Pat. No. 3,669,769. This method provides a very low initial growth rate of the epitaxial layer, after obtaining a certain minimum thickness. Increase growth -4-

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速率,此製程中的溫度在8 〇 〇至i30(TC之間。 US 6,007,624揭露一控制自動摻雜之成長磊晶s i層的方 法’在低溫超南真空化學氣相沉積製程中(在5〇〇-85〇^ ) ,成長薄的磊晶矽覆蓋層。在形成此覆蓋層之後,增加溫 度並成長磊晶層。較差的是,由於在成長覆蓋層時的低製 程溫度,覆蓋層並不會是完全地磊晶,且us 6 〇〇7,624的 方法只與阻止下層(buried layer )的自動摻雜有關。 JP-8-20383 1 A揭露在一化學氣相沉積磊晶製程中,成長 包含了 一個或多個具有不同電性之(次)層的單晶層之方 法,JP-8-20383 1 A的方法與在高溫(1〇8〇-112〇。〇)下^的磊 晶成長有關。此外,本方法與相對厚的Si磊晶層(至少8 微米)有關。 較差的是,習知的方法均與具有至少丨微米厚度之磊晶 層有關;此外,每個習知的方法中之相同點為半導體材料 均曝露於高溫步驟,會由於在此高溫下相對快的擴散,而 劣化半導體材料中的捧質輪廓。 此外,若使用習知的方法,則不可能形成具有良好定義 及陡峭的η型摻質輪廓的淺層(也就是低於丨微米)^ 本發明之目的係提供如申請專利範圍第丨項前言所定義 之半導體裝置的製造方法,纟中可強烈地抑制磊晶層中η 型自動摻雜的發生。 利用如申請專利範圍第丨項前言所定義之半導體裝置製 造的方法可達成此目的,其中在一連續成長循環中成長此 疊層(stack )。 -5- 1300268 A7 -一 B7 五、發明 ) ' '~- / =好的是,在單一連續成長循環中省略清洗(purge)的 循環,而抑制n型自動摻雜的效應,根據本發明之成長方 法造成磊晶層中摻質輪廓較佳定義的限制與形狀;此外, 本方法可成長薄摻雜的磊晶層(尖峰(spikes))。 、下將參照一些圖式而解釋本發明,其中圖式僅為示 範目的’而並非限制如後申請專利範圍定義之保護範圍。 圖1顯示利用習知使用SiH4氣流的成長方法,產生具有Rate, the temperature in this process is between 8 〇〇 and i30 (TC. US 6,007, 624 discloses a method of controlling the auto-doping of the grown epitaxial Si layer' in a low temperature super-South vacuum chemical vapor deposition process (at 5〇) 〇-85〇^), grows a thin epitaxial layer of cap. After forming this cap layer, it increases the temperature and grows the epitaxial layer. Worse, due to the low process temperature when growing the cap layer, the cap layer is not It will be completely epitaxial, and the method of us 6 〇〇 7,624 is only related to the automatic doping of the buried layer. JP-8-20383 1 A discloses a chemical vapor deposition epitaxial process, including growth A method of one or more single crystal layers having different electrical (secondary) layers, the method of JP-8-20383 1 A and the epitaxial growth at high temperature (1〇8〇-112〇.〇) Furthermore, the method is related to a relatively thick Si epitaxial layer (at least 8 microns). Inferiorly, the conventional methods are all related to an epitaxial layer having a thickness of at least 丨 micron; in addition, each of the conventional methods The same point is that the semiconductor material is exposed to high temperature steps, due to This relatively high temperature diffusion at high temperatures degrades the contour of the support in the semiconductor material. Furthermore, if a conventional method is used, it is impossible to form a shallow layer with a well-defined and steep n-type dopant profile (ie, lower than丨micron) ^ The object of the present invention is to provide a method for fabricating a semiconductor device as defined in the preamble of the scope of the patent application, in which the occurrence of n-type autodoping in the epitaxial layer can be strongly suppressed. The method of fabricating a semiconductor device as defined in the preamble of the first item achieves this object, wherein the stack is grown in a continuous growth cycle. -5- 1300268 A7 - a B7 V, invention) ' '~- / = Preferably, the purge cycle is omitted in a single continuous growth cycle, and the effect of n-type autodoping is suppressed, and the growth method according to the present invention results in a well defined definition and shape of the dopant profile in the epitaxial layer; In addition, the method can grow thin doped epitaxial layers (spikes). The invention will be explained with reference to a number of drawings, wherein the drawings are for illustrative purposes only and are not intended to limit the scope of the invention as defined in the appended claims. Figure 1 shows the growth method using conventional SiH4 gas flow, resulting in

Sl覆蓋層之P摻雜磊晶Si層(P尖峰),其二次離子質譜儀 (SIMS)曲線。 圖2顯示利用習知使用SiH2Cl2氣流的成長方法,產生具 有Si覆蓋層之p尖峰的二次離子質譜儀曲線。 圖3顯示利用習知使用中斷SiH4氣流的成長方法,產生 具有Si覆蓋層之p尖峰的二次離子質譜儀曲線。 圖4顯7^根據本發明之成長方法,產生之磊晶Si-SiGe-Si 多層中’摻質分布的二次離子質譜儀曲線。 圖5示意地顯示根據本發明在成長製程時,個別氣流的 開關。 以下’可利用一些實驗來解釋根據本發明之成長方法, 其中示範η型摻質磊晶3丨或SiGe層之成長,由這些實驗所 得之摻質輪廓係利用二次離子質譜儀所量測,分析的結果 則清楚地顯示利用本發明之方法成長此摻雜S i或SiGe層 可獲得改善。 圖1顯示具有Si覆蓋層之p摻雜磊晶Si層(P尖峰)的二次 離子質譜儀曲線,係由習知使用SiH4氣流(Η 2當作載體氣 -6 - 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公袭) 1300268 A7 B7Sl-coated P-doped epitaxial Si layer (P-peak) with a secondary ion mass spectrometer (SIMS) curve. Fig. 2 shows a secondary ion mass spectrometer curve for generating a p-spike having a Si coating layer by a conventional growth method using a SiH2Cl2 gas stream. Figure 3 shows a secondary ion mass spectrometer curve that produces a p-spike with a Si cap layer using conventional growth methods that interrupt the SiH4 gas stream. Fig. 4 shows a secondary ion mass spectrometer curve of the 'doped matter distribution' in the epitaxial Si-SiGe-Si multilayer in accordance with the growth method of the present invention. Figure 5 is a schematic illustration of the switching of individual gas flows during a growing process in accordance with the present invention. The following can be used to explain the growth method according to the present invention, in which the growth of the n-type dopant epitaxial 3丨 or SiGe layer is demonstrated, and the dopant profile obtained by these experiments is measured by a secondary ion mass spectrometer. The results of the analysis clearly show that the growth of this doped Si or SiGe layer can be improved by the method of the present invention. Figure 1 shows a secondary ion mass spectrometer curve of a p-doped epitaxial Si layer (P-spike) with a Si cap layer, which is conventionally used as a carrier gas-6 - 本 2 as a carrier gas-6 - this paper scale applies to China Standard (CNS) Α4 size (210 X 297 public attack) 1300268 A7 B7

五、發明説明(4 ) 體)之成長方法所產生。 二次離子質譜儀曲線顯示樣品中磷(P )的輪廓為賤鍍深 度的函數,將Si表面曝露於PH3蒸氣中而無Si前驅物SiH4 來成長P尖峰,在關閉PH3來源後繼續或開始磊晶成長。 可清楚地觀察到自動摻雜效應,P尖峰位於〜100 nm的深 度。在P訊號中,介於〜100 nm與〜25 nm間顯示一長的自 動摻雜尾部(tail ):在p峰值的表面側,p濃度不會掉至二 次離子質譜儀的偵測限制;不過,當其約為自動摻雜尾部 的十倍時,可使用P尖峰。 圖2顯示利用習知使用siH2Cl2氣流的成長方法,產生具 有Si覆蓋層之p尖峰的二次離子質譜儀曲線,二次離子質 譜儀曲線顯示樣品中磷(P )的輪廓為濺鍍深度的函數。 為顯示此P尖峰,利用二氯矽甲烷(SiH2Cl2)取代SiH4當 作S i前驅物的製程,而進行類似上述之實驗,圖2中則顯 示傳統成長具有自SiH2Cl2成長的覆蓋層之P尖峰範例。 與使用SiH4當作S i前驅物的圖1之摻質輪廓相比,此例 中並無尖峰,只有自動摻雜尾部,而兩輪廓間的差異主要 有可能是SiH2Cl2中之C1的存在所造成。 當嘗試使用類似圖1中所示之摻質輪廓時,例如異質接 面雙載子電晶體(HBT)的集極中,P尖峰在每個介面 (Si/SiGe,SiGe/SiGe[B],SiGe/Si)處爆裂(pop up),因而 破壞目標輪廓β 在使用中斷成長以穩定改變層成分時之氣流,仍然將ρ 傳輸至晶圓表面並累積之。 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐)V. Inventions (4) Body growth methods. The secondary ion mass spectrometer curve shows that the profile of phosphorus (P) in the sample is a function of the iridium plating depth. The Si surface is exposed to the PH3 vapor without the Si precursor SiH4 to grow the P spike, and the P3 source is turned off or the ray is continued. Crystal growth. The autodoping effect is clearly observed and the P-peak is at a depth of ~100 nm. In the P signal, a long auto-doped tail is displayed between ~100 nm and ~25 nm: on the surface side of the p-peak, the p-concentration does not fall to the detection limit of the secondary ion mass spectrometer; However, when it is about ten times that of the autodoped tail, a P spike can be used. Figure 2 shows a secondary ion mass spectrometer curve using a conventional growth method using a siH2Cl2 gas stream to produce a p-spike with a Si blanket. The secondary ion mass spectrometer curve shows the profile of phosphorus (P) in the sample as a function of sputtering depth. . In order to show this P-peak, a process similar to the above was carried out by replacing SiH4 with SiCh4 as a precursor of Si, and Figure 2 shows an example of a P-peak of a conventionally grown cap layer grown from SiH2Cl2. . Compared with the dopant profile of Figure 1 using SiH4 as the precursor of S i , there is no spike in this example, only the doping is automatically doped, and the difference between the two profiles is mainly caused by the presence of C1 in SiH2Cl2. . When attempting to use a dopant profile similar to that shown in Figure 1, for example, in the collector of a heterojunction bipolar transistor (HBT), the P spike is at each interface (Si/SiGe, SiGe/SiGe[B], The SiGe/Si) pops up, thus destroying the target profile β. The airflow is used to interrupt the growth to stabilize the layer composition, and ρ is still transmitted to the wafer surface and accumulated. This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X 297 mm)

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線 1300268 A7 B7 五、發明説明(5 ) -- 圖3顯不利用習知使用中斷氣流的成長方法,而產 生具有Si覆盍層之p尖導的二次離子質譜儀曲線。 此二次離子質譜儀曲線顯示樣品中磷(p)的輪廓為濺鍍 深度的函數。 由此圖可獲得除了事實上中間中斷覆蓋層成長一分鐘並 接著繼續成長之.外,與圖i中相同的方法成長之磊晶層。 如熟習此項技藝人士所熟知的,成長複雜的磊晶多層, 如Η B T…構’需要數道成長中斷,當發生將8丨轉至 及轉回時,或發生自摻雜至摻雜層時,會有此中斷。 η型摻負的累積對Si/SiGe處的轉變,及不在低溫與低壓 使用即時(in-situ)的η型摻質特別有害。 雖然有長的自動摻雜尾部,仍可使用如圖1中所示之ρ 輪廓’也就是Η Β Τ結構即時摻雜之集極的部分,此可採 用避免第二Ρ尖峰之成長製程來達成。 根據本發明成長半導體磊晶層的方法可看出成長製程中 斷的重要性,已發現若未中斷成長,摻質元素ρ不會在層 轉變處累積,且可抑制第二Ρ尖峰。 實際上此意味著略過成長製程時的流動穩定相,當改變 層成分時會造成氣 >瓦的暫態(transient),此造成增加之暫 態寬度通常不會對電晶體的效能有害。 需/主思藉由使用本發明之方法,ASH3與SiH4的結合可成 長As尖峰,並造成類似圖1、圖2及圖3中所示之ρ尖峰的 A s輪廓。 在低溫低壓磊晶成長η型摻雜s i與SiGe層時在每個介面 -8 · 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公慶y ----、一------- — 1300268 A7 ----- - B7 五、發明説明(6 ) ' " -- 的η型摻雜尖峰發生之問題,可利用在改變層成分時不中 斷成長製程來避開,層間轉變寬度的劣化通常並無害處。 在所有其他的成長方法中,發現此方法對成長具有即時η 型摻雜步騾之ΗΒΤ結構的集極較有利。 圖4顯示利用根據本發明之成長方法,產生傳統磊晶 Si[P]/SiGe/SiGe[p]/SiGe/Si[B]的多層中,摻質分佈的二次 離子質譜儀曲線。 二次離子質譜儀曲線顯示樣品中磷(P)、鍺(Ge)與硼(B) 的輪廓為濺鍍深度的函數,並由各自的化學代號標示其輪 廓。 多層由下列所組成,在半導體表面上成長當作第一層之 捧鱗Si[P]層’在此Si[P]層上成長一本徵(intrinsic)系晶 SiGe層’在此本徵羞晶S i G e層上沉積摻硼羞晶SiGe[B J 層;接著,成長弟二本徵羞晶SiGe層;最後,沉積蟲晶換 雜Si[B]表面層。 在低溫低壓製程(也就是700°C,2.66 X 103 Pa)中使用氣 流與流動開關方案(scheme)成長多層,並可參照圖5解釋 之。 圖4中,注意介於約5 0至100 nm之磷的分佈是很重要 的,不像利用習知的方法成長的輪廓無主要P尖峰的存 在,並干擾裝置的功能。在已關閉PH3流之後,P階層會 下降,並利用箭號A1標不關閉PH3流。 仍會發生一些偏析:由箭號A 2標示之B2H6的釋放,在 成長環境中會造成P訊號的增加(在〜68 nm的厚度);然 本紙張尺度適用中國國家標準(CNS) A4规格(210 X 297公董) A7 B7Line 1300268 A7 B7 V. INSTRUCTION DESCRIPTION (5) - Figure 3 shows a secondary ion mass spectrometer curve that produces a p-tip with a Si-clad layer using conventional growth methods that use interrupted gas flow. This secondary ion mass spectrometer curve shows the profile of phosphorus (p) in the sample as a function of sputtering depth. From this figure, an epitaxial layer grown in the same manner as in Fig. i can be obtained except that the intermediate interrupt cover layer is grown for one minute and then continues to grow. As is well known to those skilled in the art, the growth of complex epitaxial multilayers, such as Η BT... requires several growth interruptions, when 8 turns to and from turn, or self-doping to doping There will be this interruption. The accumulation of n-type doping is particularly detrimental to the transition at Si/SiGe and not at low temperature and low pressure using in-situ n-type dopants. Although there is a long auto-doped tail, the ρ-profile, as shown in Figure 1, can be used as part of the collector of the 掺杂 Τ structure, which can be achieved by avoiding the growth process of the second Ρ spike. . The method of growing a semiconductor epitaxial layer according to the present invention shows the importance of the growth process discontinuity. It has been found that if the growth is not interrupted, the dopant element ρ does not accumulate at the layer transition and the second peak can be suppressed. In practice, this means skipping the flow-stable phase of the growth process, which causes a transient of the gas > watt when changing the composition of the layer, which results in an increased transient width that is generally not harmful to the performance of the transistor. Needed/Intended By using the method of the present invention, the combination of ASH3 and SiH4 can form a long As peak and cause an A s profile similar to the ρ spike shown in Figures 1, 2 and 3. In low temperature and low pressure epitaxial growth of n-type doped Si and SiGe layers in each interface -8 · This paper scale applies Chinese National Standard (CNS) A4 specifications (210 X 297 public y ----, one --- ---- — 1300268 A7 ----- - B7 V. Inventive Note (6) ' " -- The problem of n-type doping spikes can be avoided by changing the layer composition without interrupting the growth process. The deterioration of the interlayer transition width is generally not harmful. Among all other growth methods, it has been found to be advantageous for growing the collector having an instant n-type doping step. Figure 4 shows the growth using the invention according to the present invention. The method produces a secondary ion mass spectrometer curve of a dopant distribution in a multilayer of conventional epitaxial Si[P]/SiGe/SiGe[p]/SiGe/Si[B]. The secondary ion mass spectrometer curve shows phosphorus in the sample ( The outlines of P), germanium (Ge) and boron (B) are functions of the sputter depth and their outlines are indicated by their respective chemical codes. The multilayer consists of the following, which grows on the surface of the semiconductor as the first layer of scale The Si[P] layer grows an intrinsic meso-SiGe layer on the Si[P] layer. Here, the intrinsic shy crystal S i G e On the deposition of boron-doped SiGe [BJ layer; then, the growth of the second intrinsic SiGe SiGe layer; finally, the deposition of insect crystals replaced Si[B] surface layer. In the low temperature and low pressure process (that is, 700 ° C, 2.66 X 103 Pa) uses a gas flow and flow switching scheme to grow multiple layers, and can be explained with reference to Figure 5. In Figure 4, it is important to note that the distribution of phosphorus between about 50 and 100 nm is important. The known method of growing the contour has no major P spikes and interferes with the function of the device. After the PH3 stream has been turned off, the P hierarchy will fall, and the arrow A1 will not be used to close the PH3 stream. Some segregation will still occur: by the arrow The release of B2H6 marked by A 2 will increase the P signal in the growing environment (at a thickness of ~68 nm); however, the paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 dong) A7 B7

1300268 五、發明説明(7 ) 而,維持足夠低的P階層,且不會對Η B T結構有不良的^ 響。 亦發現新的成長方法輕微地有害於輪廊 < 在 SiGe/SiGe[B]/SiGe 層中),SiGe/SiGe[B]/SiGe 層之頭部與尾 部的斜率並不像在成長時使用中斷氣流方法那樣陡山肖。需 注意斜率陡峭度的減少不只是與基本問題有關,且與i晶 反應器之硬體中某些缺陷有關。 圖5示意地顯示關於開關反應物(製程氣體)之成長製 程,Υ軸標示為氣流的大小,而X軸標示為時間,且兩轴 均使用任意單位。需注意並無給定確實的相關製程時間與 層厚度之比值,且各流動之相對高度並非標示個別流動之 比值,各氣流以斜線區域標示之,並由各氣體之化學式作 記號。 在成長製程開始時,打開S i前驅物(也就是SiH4 )之氣 流,同時打開PH3的氣流。在某段時間之後,稍微減少 PH3氣流,在完成Si[P]層的成長之後,即停止ph3氣流。 同時,開啟GeH4氣流,以開始成長SiGe層,在成長第 一本徵SiGe層之後,打開B2H6氣流,以摻雜硼至SiGe層 中,並形成摻雜的SiGe[B]層。 在完成摻雜的SiGe[B]層之後,停止B2H6氣流,並仍開 啟S i前驅物氣流與GeH4氣流,以成長第二本徵SiGe層。 最後,停止GeH4氣流,並開啟B2H6氣流以成長上摻硼 Si[B]層。 在完成磊晶Si[P]/SiGe/SiGe[B]/SiGe/Si[B]多層之後,停 -10- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)1300268 V. Inventive Note (7) However, maintaining a sufficiently low P-level does not have a bad response to the ΗB T structure. It has also been found that the new growth method is slightly detrimental to the porch <in the SiGe/SiGe[B]/SiGe layer), the slope of the head and tail of the SiGe/SiGe[B]/SiGe layer is not used as it grows. The method of interrupting the airflow is as steep as the mountain. It is important to note that the reduction in slope steepness is not only related to the underlying problem, but also to certain defects in the hardware of the i-crystal reactor. Fig. 5 schematically shows the growth process for the switching reactant (process gas), the x-axis is indicated as the size of the gas stream, and the X-axis is indicated as time, and both axes are used in arbitrary units. It should be noted that the exact ratio of process time to layer thickness is not given, and the relative height of each flow is not indicative of the ratio of individual flows. Each gas flow is indicated by a slashed area and is marked by the chemical formula of each gas. At the beginning of the growth process, the gas flow of the S i precursor (ie SiH4) is turned on while the PH3 gas flow is turned on. After a certain period of time, the PH3 gas flow is slightly reduced, and after the growth of the Si[P] layer is completed, the ph3 gas flow is stopped. At the same time, the GeH4 gas stream is turned on to start growing the SiGe layer. After the first intrinsic SiGe layer is grown, the B2H6 gas stream is turned on to dope boron into the SiGe layer and form a doped SiGe[B] layer. After completion of the doped SiGe[B] layer, the B2H6 gas stream is stopped and the Si precursor gas stream and the GeH4 gas stream are still turned on to grow the second intrinsic SiGe layer. Finally, the GeH4 gas stream is stopped and the B2H6 gas stream is turned on to grow the boron-doped Si[B] layer. After completing the epitaxial Si[P]/SiGe/SiGe[B]/SiGe/Si[B] multilayer, stop -10- The paper scale applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm)

裝 訂Binding

線 1300268 A7 B7 五、發明説明(8 ) 止S i前驅物氣流與B2H6氣流,如習知中所熟知,以最後 循環結束製程循環,以清洗(purge )製程室,並冷卻已沉 積多層之半導體晶圓。 需注意在Si[P]/SiGe/SiGe[B]/SiGe/Si[B]多層中,成長各 層之間不施加洗淨循環。根據習知的方法,係省略洗淨循 環,而非使用中.斷成長循環,並在一連績成長循環中成長 整個磊晶層,而改善圖4之二次離子質譜儀曲線所描繪的 摻質輪廓。 此外,需注意本發明之方法亦可使用於製造摻雜的矽-鍺-碳合金(SiGe:C)層,以抑制在此SiGe:C層中η型的自動 掺雜。 -11 - 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐)Line 1300268 A7 B7 V. INSTRUCTIONS (8) Stop the S i precursor gas stream and the B2H6 gas stream, as is well known in the art, to end the process cycle with a final cycle to purge the process chamber and cool the deposited multilayer semiconductor Wafer. It should be noted that in the Si[P]/SiGe/SiGe[B]/SiGe/Si[B] multilayer, no cleaning cycle is applied between the grown layers. According to the conventional method, the washing cycle is omitted instead of using the medium-breaking growth cycle, and the entire epitaxial layer is grown in a continuous growth cycle, and the dopant depicted by the secondary ion mass spectrometer curve of FIG. 4 is improved. profile. Furthermore, it should be noted that the method of the present invention can also be used to fabricate a doped ytterbium-tellurium-carbon alloy (SiGe:C) layer to inhibit the automatic doping of the n-type in this SiGe:C layer. -11 - This paper size is applicable to China National Standard (CNS) Α4 specification (210 X 297 mm)

Claims (1)

六、申請專利範圍 i•一種製造半導體裝置之方m該方法包含在至少另 半導拉材料層(前’蟲晶成長—包含半導體材料之η 雜層的疊層之步驟’其中該疊層係在一連續成長循 壤中成長’其中應心切.緒合金切令碳合全告 作該η型摻雜層的半導體材料,其中應用石夕切·褚^ 或碎-鍺U金當作該至少另—半導體材料層,及其中 應用碎-鍺合金切_錯_碳纟金當作該至少—η型接雜層 的半導體材料及該至少另一層。 曰 2. 如申請專利範圍第i項之方法\其中應用一 ρ型接雜層或 一非故意摻雜之層當作該至少另一層。 3. 如申請專㈣圍第!或2項之方法/其中該成長製程係在 次大氣壓下進行。 4. 如申請專利範圍第3項之方法,其中該成長製程在約 6 6 5至13300 Pa範圍間之次大氣壓下進行。 5. ,申請專利範圍第liu項之方法,其中使用一n型接質 氣體成長該η型摻雜層,且應用一含磷化合物或含砷化 合物當作該η型摻質氣體。 " 6. 如申請專㈣圍第Η之方法,其中—應用切化合物 及其中應用膦(phosphine) (ΡΗΟ當作該含磷化合物。 7. 如申請專利範圍第5項之方法,其中_應用切化合物 及其中應用胂(arsine)(AsH3)當作該含坤化合物。 8. 如中請專利範圍第!或2項之方法,其中該成長製程在約 8〇〇°C以下的溫度進行。 9. 如申請專利範圍第8项之方法,其中該成長製程在約7〇〇 1300268 - C8 D8 六、申請專利範圍 °c的溫度下進行。 其中該半導體裝置包6. Patent application scope i. A method for manufacturing a semiconductor device. The method includes at least another layer of a semiconductor material (the step of 'flying crystal growth—a step of laminating a η impurity layer containing a semiconductor material> In a continuous growth and growth in the soil, it should be eager to cut. The alloy is sintered and carbonized as the semiconductor material of the n-type doping layer, in which the application of Shi Xiqi·褚^ or shredded-锗U gold is used as the at least Further, a semiconductor material layer, and a semiconductor material of the at least n-type impurity layer and the at least another layer are used as the semiconductor material of the at least-n-type impurity layer. 曰2. Method \ wherein a p-type impurity layer or an unintentionally doped layer is used as the at least one other layer. 3. If the application is for (4), or the method of the second item, or the growth process is performed under sub-atmospheric pressure 4. The method of claim 3, wherein the growth process is performed at a sub-atmospheric pressure between about 6 6 5 and 13300 Pa. 5. A method of applying for a patent range liu, wherein an n-type is used. a susceptor gas grows the n-type doped layer, and Use a phosphorus-containing compound or an arsenic-containing compound as the n-type dopant gas. " 6. If applying for the method of (4), the application of the cut compound and its application of phosphine (ΡΗΟ) A phosphorus compound. 7. The method of claim 5, wherein the dicing compound and the arsine (AsH3) thereof are used as the quinone compound. 8. The method wherein the growth process is carried out at a temperature of about 8 ° C or less. 9. The method of claim 8 wherein the growth process is about 7 〇〇 1300 268 - C8 D8 6. Patent application range °c The temperature is carried out. The semiconductor device package 10.如申請專利範圍第1或2項之方法 含一異質接面雙載子電晶體。 _-2- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)10. The method of claim 1 or 2 comprising a heterojunction bipolar transistor. _-2- This paper scale applies to Chinese National Standard (CNS) A4 specification (210 X 297 mm)
TW91104916A 2002-03-15 2002-03-15 Suppression of n-type autodoping in low-temperature Si and SiGe epitaxy TWI300268B (en)

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