JP2000315656A - Manufacture of epitaxial silicon substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing an epitaxial silicon substrate, where stable epilayer electrical resistivity distribution is obtained in an epilayer surface, at low cost. SOLUTION: In this method for manufacturing a substrate, polycrystalline silicon Ps is volatilized to form a silicon film on a rear surface 1r of a heavy- dopant silicon substrate 1. The substrate 1 and a susceptor 4, which have the relation where a curvature radius r of the substrate 1 is always larger than a curvature radius R of a spot facing 5 of the susceptor 4, at formation of the silicon film, are used. The curvature radius of curvature of the spot facing of the susceptor is 15-25 m.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an epitaxial silicon substrate, and more particularly to a method for manufacturing an epitaxial silicon substrate which is inexpensive and can provide a stable epitaxial layer electrical resistivity distribution in the plane of the epitaxial layer.

[0002]

2. Description of the Related Art In semiconductor manufacturing technology, when various circuit elements such as individual circuit elements and integrated circuit elements are formed,
P-type or N-type heavily doped wafers (electrical resistivity ρ ≦ 0.02Ωcm)
^A- or N ⁺ epitaxial (hereinafter referred to as "epi") layer is formed, and various circuit elements are formed on the epi layer. When forming this epi layer, mainly from the back side of the wafer,
In addition, the impurity (dopant) diffuses from a part of the periphery to the surface of the epi-layer, and the distribution of ρ _epi (epi-layer electrical resistivity) varies, so that the so-called auto-doping phenomenon in which an epi-layer having a desired impurity concentration cannot be obtained is problematic. become.

In order to avoid this problem, an SiO ₂ film sealing method in which a protective film of SiO ₂ is formed on the back surface and peripheral portion of the wafer by atmospheric pressure chemical vapor deposition before forming an epi layer, There is a Si sealing method in which a sealing process is performed with Si.

[0004] SiO ₂ film sealing method for performing sealing treatment to the back surface of the wafer in the state of the substrate, when the epi [rho _epi
Although it is excellent in that it can be easily controlled, it requires a separate film-coating step, which increases the manufacturing cost.

On the other hand, as shown in FIG. 6, in the conventional Si sealing method, polycrystalline silicon Ps previously deposited on the susceptor 11 is deposited on the back surface 12r of the wafer 12 during epitaxy. Since the deposition is merely performed, there is almost no increase in the manufacturing cost, and the sealing property of the once formed Si film is superior to that of the SiO ₂ film.

[0006] This Si sealing method uses a vertical epi apparatus (pancake type) and uses polycrystalline silicon P during epi heat treatment.
Since s is vapor-deposited from the upper surface 11s of the susceptor 11 to the rear surface 12r of the wafer 12, it is easily affected by the shape of the counterbore 13 of the susceptor 11 and the shape of the wafer 12, and the ρ _epi distribution in the epitaxial film surface of the wafer 12 is very large. There are cases where it is good and cases where it is extremely bad, and a stable ρepi distribution is not obtained.

[0007]

For this reason, there has been a demand for a method of manufacturing an epitaxial silicon substrate which is inexpensive and provides a stable epitaxial layer electric resistivity distribution in the plane of the epitaxial layer.

The present invention has been made in consideration of the above circumstances, and has as its object to provide a method of manufacturing an epitaxial silicon substrate which is inexpensive and provides a stable epitaxial layer electric resistivity distribution in the plane of the epitaxial layer.

[0009]

According to the first aspect of the present invention, there is provided a silicon single crystal substrate containing high-concentration impurities, and the silicon single crystal substrate is preliminarily polycrystalline silicon. A step of forming a silicon film on the back surface of the silicon single crystal substrate facing the susceptor by heating the susceptor to evaporate the polycrystalline silicon and placing the silicon film on the susceptor, Simultaneously with or after the completion of the silicon film forming step, by epitaxial growth, a step of forming a silicon single crystal epitaxial layer containing a lower concentration of impurities than the silicon single crystal substrate on the surface of the silicon single crystal substrate, In the silicon film forming step, the radius of curvature of the silicon single crystal substrate is always larger than the radius of curvature of the counterbore of the susceptor. Is summarized in that an epitaxial silicon substrate manufacturing method which comprises using the silicon single crystal substrate and the susceptor having an cormorants Do relationship.

According to the invention of claim 2 of the present application, the gist of the invention is the method of manufacturing an epitaxial silicon single crystal substrate according to claim 1, wherein the countersink of the susceptor has a radius of curvature of 15 to 25 m. .

According to a third aspect of the present invention, in the method for manufacturing an epitaxial silicon single crystal substrate according to claim 1 or 2, the curvature radius of curvature of the silicon single crystal substrate at room temperature is 130 m or more. The gist is that there is.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a method for manufacturing an epitaxial silicon substrate according to the present invention will be described below with reference to the drawings.

The method of manufacturing an epitaxial silicon substrate according to the present invention is performed in a process as shown in FIG. 3 using a manufacturing apparatus as shown in FIGS.

According to the manufacturing method of the present invention, a silicon single crystal substrate 1 containing a high concentration impurity is prepared (FIG. 3).
(A)) The silicon substrate 1 is rotatably provided in a quartz bell jar 3 of the epi apparatus 2, and polycrystalline silicon Ps is previously deposited on the susceptor 4 by a raw material gas G supplied from the outside (FIG. 3 (b) )). The silicon substrate 1 is housed in the counterbore 5 of the susceptor 4 on which the polycrystalline silicon Ps is deposited while the peripheral portion 1e of the silicon substrate 1 is supported, and the silicon substrate 1 is placed on the susceptor 4 (FIG. 3C).

The susceptor 4 is heated by the induction heating device 6 to evaporate the polycrystalline silicon Ps to form a silicon film S on the back surface 1r of the silicon substrate 1 facing the susceptor 4 (FIG. 3 (d)). After the formation of the silicon film, a source gas G is introduced from the outside to form a silicon single crystal film S containing impurities at a lower concentration than the silicon substrate 1 on the surface 1s of the silicon substrate 1 (FIG. 3E).

At the time of pulling a single crystal ingot, the silicon substrate 1 having a high concentration of impurities is cut and polished to a thickness of, for example, 525 μm by adding a dopant such as arsenic in a larger amount than usual and cutting and polishing the single crystal ingot. ρ ≦ 0.
Manufactured as 02Ω. The silicon substrate 1 has a curvature radius r of 130 m or more.

The curvature radius r of the warp is set to be 130 m or more so that the curvature radius r of the warp of the silicon substrate 1 is always larger than the curvature radius R of the counterbore 5 of the susceptor 4 during heating.

If the curvature radius r of the warp is smaller than 130 m, the peripheral edge 1e of the silicon substrate 1 floats (separates) from the counterbore 5 of the susceptor 4 due to the warp of the silicon substrate 1 due to heating, and a uniform silicon film S cannot be formed.

Susceptor 4 on which silicon substrate 1 is mounted
Is a high-purity Si-impregnated SiC base material coated with a CVD film. This counterbore 5 has a radius of curvature R of 15 to 25 m. As shown in FIG. 5, for example, when a silicon substrate 1 of 5 inches (indicated by a mark in the figure) is used and the depth (X-axis in the figure) of the counterbore 5 is set to 0.1 mm, the radius of curvature R ( (Y axis in the figure) is about 20 m.

The reason for setting the radius of curvature R to 15 to 25 mm is as follows.
This is because the curvature radius r of the warpage of the silicon substrate 1 is always larger than the curvature radius R of the counterbore 5 of the susceptor 4.

When the radius of curvature R is smaller than 15 mm or 25
If it exceeds mm, the peripheral edge 1e of the silicon substrate 1 floats from the counterbore 5 of the susceptor 4 due to the warpage of the silicon substrate 1 due to heating, and a uniform silicon film S cannot be formed.

A polycrystalline silicon Ps is deposited on the susceptor 4 by introducing a source gas G, for example, a Si gas into the bell jar 3. Thereafter, the silicon substrate 1 is housed in the counterbore 5 of the susceptor 4 and placed on the susceptor 4, and the susceptor 4 is heated by the induction heating device 6 so that the polycrystalline silicon Ps
Is evaporated to form a polycrystalline silicon film P on the back surface 1r of the silicon substrate 1 facing the susceptor 4.

In this silicon film forming step, the susceptor 4 and the silicon substrate 1 having a relationship such that the radius of curvature r of the silicon substrate 1 is always larger than the radius of curvature R of the counterbore 5 of the susceptor 4 are used. Since the silicon substrate 1 and the susceptor 4 having a radius of curvature R of the counterbore 5 of 20 m and a radius of curvature r of the warpage of the silicon substrate 1 of 130 m or more are used, floating of the peripheral edge 1 e of the silicon substrate 1 is suppressed, The silicon film S can be formed uniformly on the back surface 1r and the peripheral portion 1e of the silicon substrate 1.

Next, a source gas, for example, SiCl ₄ is supplied to the bell jar 3 to form a single silicon-bonded epi layer Ep containing impurities at a lower concentration than the silicon substrate 1 on the surface 1 s of the silicon substrate 1.

In this epi process, since the silicon film S is securely and uniformly formed on the back surface 1r and the peripheral portion 1e of the silicon substrate 1, the impurity added to the silicon substrate 1 diffuses into the epi layer Ep. As a result, the electric resistivity of the epi layer Ep does not decrease, so that the distribution of the electric resistivity in the plane of the epi layer Ep can be uniformly controlled to 3% or less.

In the above-described embodiment, the example in which the silicon film forming step is performed prior to the epi step is described. However, similar effects can be expected even if the silicon film forming step and the epi step are performed simultaneously. .

[0027]

EXAMPLE Using 10 silicon substrates having different amounts of warpage, the variation of the electrical resistivity in the epi layer plane was investigated under the following epi conditions.

(1) Epi condition 1) Epi apparatus: vertical type, counterbore depth of susceptor 0.1 mm 2) Silicon substrate: 5 inches, ρ ≦ 0.015Ωcm,
3) Epi-layer electrical resistivity: epi-layer thickness 20 μm, 20Ωc
m (2) Test Results FIG. 4 shows the relationship between the amount of warpage (normal temperature) of the silicon substrate and the variation rate of the electrical resistivity.

The warpage amount is -10 μm (convex surface) to 30 μm
(Concave surface), the variation rate (△) of the electrical resistivity (ρ)
ρ) is as small as 2 to 7% or less, and the electric resistivity is stable.

[0030]

According to the present invention, it is possible to provide an epitaxial silicon substrate capable of obtaining a stable epi-layer electric resistivity distribution in the epi-layer plane.

Further, an epitaxial silicon substrate using an inexpensive epitaxial silicon substrate having good sealing properties can be obtained, and an inexpensive epitaxial silicon substrate having a stable epitaxial layer electric resistivity distribution can be obtained.

Further, the radius of curvature of the counterbore of the susceptor is 1
By setting the thickness to 5 to 25 m and the curvature radius of curvature of the silicon single crystal substrate at room temperature to 130 m or more, an epitaxial silicon substrate with good sealing properties can be obtained.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing a main part of a manufacturing apparatus used in a method for manufacturing an epitaxial silicon substrate according to the present invention.

FIG. 2 is a conceptual diagram of a manufacturing apparatus used in a method for manufacturing an epitaxial silicon substrate according to the present invention.

FIG. 3 is an explanatory diagram of a manufacturing process of a method for manufacturing an epitaxial silicon substrate according to the present invention.

FIG. 4 is an explanatory diagram of test results of an example of the method for manufacturing an epitaxial silicon substrate according to the present invention.

FIG. 5 is a diagram showing a relationship between a counterbore and a radius of curvature of a susceptor used in the method for manufacturing an epitaxial silicon substrate according to the present invention.

FIG. 6 is an explanatory view of a conventional Si sealing method.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate 2 epitaxial device 3 quartz bell jar 4 susceptor 5 counterbore 6 induction heating device

Claims (3)

[Claims] 1. A silicon single crystal substrate containing a high-concentration impurity is prepared, the silicon single crystal substrate is housed in a counterbore of a susceptor on which polycrystalline silicon is deposited in advance, and is placed on the susceptor, and the susceptor is heated. Forming a silicon film on the back surface of the silicon single crystal substrate facing the susceptor by evaporating the polycrystalline silicon, and epitaxially growing at the same time as or after this silicon film forming step. Forming a silicon single-crystal epitaxial layer containing low-concentration impurities on the surface of the silicon single-crystal substrate. In the silicon film forming step, the radius of curvature of the silicon single-crystal substrate is always the curvature of the counterbore of the susceptor. It is characterized by using a silicon single crystal substrate and a susceptor that have a relationship of being larger than the radius. A method for manufacturing an epitaxial silicon substrate. 2. The countersink of the susceptor has a radius of curvature of 15
2. The method for manufacturing an epitaxial silicon single crystal substrate according to claim 1, wherein the length is 25 m. 3. The method for producing an epitaxial silicon single crystal substrate according to claim 1, wherein the silicon single crystal substrate has a curvature radius of curvature at room temperature of 130 m or more.