TWI449126B - 製造絕緣體上矽基板及半導體裝置之方法 - Google Patents

製造絕緣體上矽基板及半導體裝置之方法 Download PDF

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Publication number
TWI449126B
TWI449126B TW097138723A TW97138723A TWI449126B TW I449126 B TWI449126 B TW I449126B TW 097138723 A TW097138723 A TW 097138723A TW 97138723 A TW97138723 A TW 97138723A TW I449126 B TWI449126 B TW I449126B
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Prior art keywords
layer
substrate
semiconductor wafer
semiconductor
semiconductor layer
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TW097138723A
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Chinese (zh)
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TW200939392A (en
Inventor
山崎舜平
大沼英人
飯窪陽一
山本孔明
牧野賢一郎
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半導體能源研究所股份有限公司
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/909—Microarchitecture
    • H10D84/951—Technology used, i.e. design rules
    • H10D84/957—SOS or SOI technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
TW097138723A 2007-10-10 2008-10-08 製造絕緣體上矽基板及半導體裝置之方法 TWI449126B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007265012 2007-10-10

Publications (2)

Publication Number Publication Date
TW200939392A TW200939392A (en) 2009-09-16
TWI449126B true TWI449126B (zh) 2014-08-11

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Family Applications (1)

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TW097138723A TWI449126B (zh) 2007-10-10 2008-10-08 製造絕緣體上矽基板及半導體裝置之方法

Country Status (5)

Country Link
US (1) US8598013B2 (https=)
JP (1) JP5527956B2 (https=)
KR (1) KR20090037321A (https=)
CN (1) CN101409215B (https=)
TW (1) TWI449126B (https=)

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JP5548351B2 (ja) * 2007-11-01 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5580010B2 (ja) * 2008-09-05 2014-08-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
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JP5796316B2 (ja) * 2011-03-22 2015-10-21 株式会社村田製作所 圧電デバイスの製造方法
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JP5725430B2 (ja) * 2011-10-18 2015-05-27 富士電機株式会社 固相接合ウエハの支持基板の剥離方法および半導体装置の製造方法
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CN107352503A (zh) * 2016-05-09 2017-11-17 江苏英特神斯科技有限公司 一种硅基绝缘层上多晶硅介质与玻璃的阳极键合方法及其应用
CN107219546A (zh) * 2017-05-25 2017-09-29 中国工程物理研究院激光聚变研究中心 一种平响应复合滤片及其制备方法
TWI634468B (zh) 2017-08-18 2018-09-01 Industrial Technology Research Institute 透明顯示裝置
US10396256B2 (en) 2017-08-18 2019-08-27 Industrial Technology Research Institute Electronic device package
CN109411417B (zh) 2017-08-18 2020-09-11 财团法人工业技术研究院 电子组件封装体以及显示面板
CN109712880A (zh) * 2018-12-03 2019-05-03 武汉新芯集成电路制造有限公司 一种晶圆键合力的提升方法及增强系统
CN109468683A (zh) * 2018-12-19 2019-03-15 山东建筑大学 一种基于He离子辐照的石榴石晶体薄膜的制备方法
CN109864707B (zh) * 2019-01-17 2021-09-07 南京科技职业学院 一种在有限视角情况下提高光声断层成像分辨率的方法
CN111508891B (zh) * 2020-04-28 2024-03-12 上海华力集成电路制造有限公司 Soi晶圆片的制作方法
CN111883647B (zh) * 2020-07-23 2021-05-25 中国科学院上海微系统与信息技术研究所 一种压电薄膜的制备方法、压电薄膜及声表面波滤波器
KR102866978B1 (ko) * 2023-10-26 2025-09-30 한국핵융합에너지연구원 다이아몬드 웨이퍼 제조방법
CN119218936B (zh) * 2024-08-22 2025-11-18 北京遥测技术研究所 一种智能分离的微系统制备方法

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Also Published As

Publication number Publication date
TW200939392A (en) 2009-09-16
US20090137101A1 (en) 2009-05-28
KR20090037321A (ko) 2009-04-15
CN101409215B (zh) 2015-05-06
JP5527956B2 (ja) 2014-06-25
JP2009111363A (ja) 2009-05-21
CN101409215A (zh) 2009-04-15
US8598013B2 (en) 2013-12-03

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