TWI297185B - Process for manufacturing semiconductor device and kit - Google Patents

Process for manufacturing semiconductor device and kit Download PDF

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Publication number
TWI297185B
TWI297185B TW094129599A TW94129599A TWI297185B TW I297185 B TWI297185 B TW I297185B TW 094129599 A TW094129599 A TW 094129599A TW 94129599 A TW94129599 A TW 94129599A TW I297185 B TWI297185 B TW I297185B
Authority
TW
Taiwan
Prior art keywords
substrate
electrodes
bump
semiconductor device
electrode
Prior art date
Application number
TW094129599A
Other languages
English (en)
Chinese (zh)
Other versions
TW200616128A (en
Inventor
Suga Tadatomo
Itoh Toshihiro
Original Assignee
Renesas Tech Corp
Suga Tadatomo
Oki Electric Ind Co Ltd
Sanyo Electric Co
Sharp Kk
Sony Corp
Toshiba Kk
Nec Corp
Fujitsu Microelectronics Ltd
Panasonic Corp
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp, Suga Tadatomo, Oki Electric Ind Co Ltd, Sanyo Electric Co, Sharp Kk, Sony Corp, Toshiba Kk, Nec Corp, Fujitsu Microelectronics Ltd, Panasonic Corp, Rohm Co Ltd filed Critical Renesas Tech Corp
Publication of TW200616128A publication Critical patent/TW200616128A/zh
Application granted granted Critical
Publication of TWI297185B publication Critical patent/TWI297185B/zh

Links

Classifications

    • H10W70/05
    • H10W70/644
    • H10W90/701
    • H10W72/01271
    • H10W72/016
    • H10W72/07118
    • H10W72/072
    • H10W72/07236
    • H10W72/07251
    • H10W72/20
    • H10W72/241
    • H10W72/253
    • H10W72/923
    • H10W72/9415
    • H10W80/301

Landscapes

  • Wire Bonding (AREA)
TW094129599A 2004-08-30 2005-08-30 Process for manufacturing semiconductor device and kit TWI297185B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004250453A JP4050732B2 (ja) 2004-08-30 2004-08-30 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
TW200616128A TW200616128A (en) 2006-05-16
TWI297185B true TWI297185B (en) 2008-05-21

Family

ID=35941904

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094129599A TWI297185B (en) 2004-08-30 2005-08-30 Process for manufacturing semiconductor device and kit

Country Status (5)

Country Link
US (2) US7268430B2 (enExample)
JP (1) JP4050732B2 (enExample)
KR (2) KR20060050794A (enExample)
CN (1) CN100437995C (enExample)
TW (1) TWI297185B (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006057360A1 (ja) * 2004-11-25 2006-06-01 Nec Corporation 半導体装置及びその製造方法、配線基板及びその製造方法、半導体パッケージ並びに電子機器
US7786588B2 (en) * 2006-01-31 2010-08-31 International Business Machines Corporation Composite interconnect structure using injection molded solder technique
KR20090057328A (ko) * 2006-09-26 2009-06-04 알프스 덴키 가부시키가이샤 탄성 접촉자 및 이것을 이용한 금속단자 간의 접합방법
JP2008124355A (ja) * 2006-11-15 2008-05-29 Epson Imaging Devices Corp 半導体装置、異方性導電材、実装構造体、電気光学装置、突起電極の製造方法、異方性導電材の製造方法、及び、電子機器
US7793819B2 (en) * 2007-03-19 2010-09-14 Infineon Technologies Ag Apparatus and method for connecting a component with a substrate
US20080315388A1 (en) * 2007-06-22 2008-12-25 Shanggar Periaman Vertical controlled side chip connection for 3d processor package
JP4992604B2 (ja) * 2007-08-15 2012-08-08 株式会社ニコン 接合装置、接合方法
JP4548459B2 (ja) * 2007-08-21 2010-09-22 セイコーエプソン株式会社 電子部品の実装構造体
US8039960B2 (en) * 2007-09-21 2011-10-18 Stats Chippac, Ltd. Solder bump with inner core pillar in semiconductor package
JP5228479B2 (ja) * 2007-12-28 2013-07-03 富士通株式会社 電子装置の製造方法
JP5493399B2 (ja) * 2009-03-12 2014-05-14 株式会社ニコン 製造装置、及び、半導体装置の製造方法
WO2010106878A1 (ja) * 2009-03-18 2010-09-23 コニカミノルタホールディングス株式会社 熱電変換素子
US8119926B2 (en) * 2009-04-01 2012-02-21 Advanced Interconnections Corp. Terminal assembly with regions of differing solderability
US8969734B2 (en) 2009-04-01 2015-03-03 Advanced Interconnections Corp. Terminal assembly with regions of differing solderability
KR101938022B1 (ko) * 2011-03-11 2019-01-11 후지필름 일렉트로닉 머티리얼스 유.에스.에이., 아이엔씨. 신규한 에칭 조성물
JP2012243840A (ja) * 2011-05-17 2012-12-10 Renesas Electronics Corp 半導体装置およびその製造方法
TWI577834B (zh) 2011-10-21 2017-04-11 富士軟片電子材料美國股份有限公司 新穎的鈍化組成物及方法
US10784221B2 (en) * 2011-12-06 2020-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of processing solder bump by vacuum annealing
US9512863B2 (en) * 2012-04-26 2016-12-06 California Institute Of Technology Silicon alignment pins: an easy way to realize a wafer-to-wafer alignment
JP2013251405A (ja) * 2012-05-31 2013-12-12 Tadatomo Suga 金属領域を有する基板の接合方法
JP6032667B2 (ja) * 2012-08-31 2016-11-30 国立研究開発法人産業技術総合研究所 接合方法
KR20140038735A (ko) * 2012-09-21 2014-03-31 (주)호전에이블 패키지 모듈 및 그 제조 방법
JP6151925B2 (ja) * 2013-02-06 2017-06-21 ヤマハ発動機株式会社 基板固定装置、基板作業装置および基板固定方法
ITTO20150229A1 (it) * 2015-04-24 2016-10-24 St Microelectronics Srl Procedimento per produrre bump in componenti elettronici, componente e prodotto informatico corrispondenti
CN105472216B (zh) * 2015-12-01 2020-01-10 宁波舜宇光电信息有限公司 具有缓冲结构的电气支架及摄像模组
US10403601B2 (en) * 2016-06-17 2019-09-03 Fairchild Semiconductor Corporation Semiconductor package and related methods
US10037957B2 (en) 2016-11-14 2018-07-31 Amkor Technology, Inc. Semiconductor device and method of manufacturing thereof
JP6425317B2 (ja) * 2017-07-21 2018-11-21 須賀 唯知 金属領域を有する基板の接合方法
CN108054490B (zh) * 2017-12-08 2020-01-03 中国电子科技集团公司第五十四研究所 一种多层柔性基板局部微弹簧低应力组装结构
GB2584372B (en) * 2018-02-22 2022-04-13 Massachusetts Inst Technology Method of reducing semiconductor substrate surface unevenness
CN110557903A (zh) * 2019-09-05 2019-12-10 深圳市星河电路股份有限公司 一种pcb超高金线邦定值加工方法
JP2022079295A (ja) * 2020-11-16 2022-05-26 沖電気工業株式会社 複合集積フィルム、複合集積フィルム供給ウェハ及び半導体複合装置

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2533511B2 (ja) * 1987-01-19 1996-09-11 株式会社日立製作所 電子部品の接続構造とその製造方法
US5897326A (en) * 1993-11-16 1999-04-27 Eldridge; Benjamin N. Method of exercising semiconductor devices
US5983493A (en) * 1993-11-16 1999-11-16 Formfactor, Inc. Method of temporarily, then permanently, connecting to a semiconductor device
JPH08139226A (ja) 1994-11-04 1996-05-31 Sony Corp 半導体回路装置及びその回路実装方法
WO1997016866A2 (en) 1995-05-26 1997-05-09 Formfactor, Inc. Chip interconnection carrier and methods of mounting spring contacts to semiconductor devices
JP2791429B2 (ja) * 1996-09-18 1998-08-27 工業技術院長 シリコンウェハーの常温接合法
JPH10173006A (ja) 1996-12-09 1998-06-26 Hitachi Ltd 半導体装置および半導体装置の製造方法
JPH10303345A (ja) * 1997-04-28 1998-11-13 Shinko Electric Ind Co Ltd 半導体チップの基板への実装構造
JP3080047B2 (ja) 1997-11-07 2000-08-21 日本電気株式会社 バンプ構造体及びバンプ構造体形成方法
JPH11214447A (ja) 1998-01-27 1999-08-06 Oki Electric Ind Co Ltd 半導体装置の実装構造及びその実装方法
JPH11233669A (ja) 1998-02-10 1999-08-27 Mitsui High Tec Inc 半導体装置の製造方法
JP2000174165A (ja) 1998-12-08 2000-06-23 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP3903359B2 (ja) 1999-05-10 2007-04-11 積水ハウス株式会社 パネル位置決め治具
JP2001050980A (ja) 1999-08-04 2001-02-23 Taniguchi Consulting Engineers Co Ltd Icの電極端子用コンタクトの構造および製造方法
US6242324B1 (en) * 1999-08-10 2001-06-05 The United States Of America As Represented By The Secretary Of The Navy Method for fabricating singe crystal materials over CMOS devices
JP2001053106A (ja) * 1999-08-13 2001-02-23 Nec Corp フリップチップ接続構造と電子部品の製造方法
JP2001196110A (ja) * 1999-11-09 2001-07-19 Fujitsu Ltd 接触力クランプばねによって支持された変形可能なコンタクトコネクタを含む電気コネクタ組立体及び電気的接続方法
JP2001156091A (ja) 1999-11-30 2001-06-08 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US6640432B1 (en) * 2000-04-12 2003-11-04 Formfactor, Inc. Method of fabricating shaped springs
JP4377035B2 (ja) * 2000-06-08 2009-12-02 唯知 須賀 実装方法および装置
JP3998484B2 (ja) * 2002-02-07 2007-10-24 富士通株式会社 電子部品の接続方法
US20040000428A1 (en) * 2002-06-26 2004-01-01 Mirng-Ji Lii Socketless package to circuit board assemblies and methods of using same
TW547771U (en) 2002-07-23 2003-08-11 Via Tech Inc Elastic electrical contact package structure
JP4036786B2 (ja) * 2003-04-24 2008-01-23 唯知 須賀 電子部品実装方法
JP4768343B2 (ja) * 2005-07-27 2011-09-07 株式会社デンソー 半導体素子の実装方法

Also Published As

Publication number Publication date
KR20060050794A (ko) 2006-05-19
JP2006066809A (ja) 2006-03-09
US7776735B2 (en) 2010-08-17
US20060043552A1 (en) 2006-03-02
KR20070008473A (ko) 2007-01-17
CN1744306A (zh) 2006-03-08
TW200616128A (en) 2006-05-16
JP4050732B2 (ja) 2008-02-20
US20080254610A1 (en) 2008-10-16
KR100821574B1 (ko) 2008-04-15
US7268430B2 (en) 2007-09-11
CN100437995C (zh) 2008-11-26

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