TWI282141B - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

Info

Publication number
TWI282141B
TWI282141B TW094112882A TW94112882A TWI282141B TW I282141 B TWI282141 B TW I282141B TW 094112882 A TW094112882 A TW 094112882A TW 94112882 A TW94112882 A TW 94112882A TW I282141 B TWI282141 B TW I282141B
Authority
TW
Taiwan
Prior art keywords
insulating film
film
element isolation
oxide film
isolation insulating
Prior art date
Application number
TW094112882A
Other languages
English (en)
Chinese (zh)
Other versions
TW200605264A (en
Inventor
Norio Ishitsuka
Jun Tanaka
Tomio Iwasaki
Hiroyuki Ota
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200605264A publication Critical patent/TW200605264A/zh
Application granted granted Critical
Publication of TWI282141B publication Critical patent/TWI282141B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151Manufacturing their isolation regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02134Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02137Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
TW094112882A 2004-05-25 2005-04-22 Semiconductor device and manufacturing method thereof TWI282141B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004154226A JP2005340327A (ja) 2004-05-25 2004-05-25 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
TW200605264A TW200605264A (en) 2006-02-01
TWI282141B true TWI282141B (en) 2007-06-01

Family

ID=35446761

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094112882A TWI282141B (en) 2004-05-25 2005-04-22 Semiconductor device and manufacturing method thereof

Country Status (5)

Country Link
US (1) US7279769B2 (enExample)
JP (1) JP2005340327A (enExample)
KR (1) KR100732647B1 (enExample)
CN (1) CN100461414C (enExample)
TW (1) TWI282141B (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5195747B2 (ja) * 2007-03-27 2013-05-15 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5525695B2 (ja) * 2007-06-20 2014-06-18 株式会社東芝 半導体装置およびその製造方法
US20110316117A1 (en) * 2007-08-14 2011-12-29 Agency For Science, Technology And Research Die package and a method for manufacturing the die package
US7871895B2 (en) * 2008-02-19 2011-01-18 International Business Machines Corporation Method and structure for relieving transistor performance degradation due to shallow trench isolation induced stress
JPWO2010073947A1 (ja) * 2008-12-25 2012-06-14 国立大学法人東北大学 半導体装置及びその製造方法
JPWO2011138906A1 (ja) * 2010-05-07 2013-07-22 国立大学法人東北大学 半導体装置の製造方法
JP2012009791A (ja) * 2010-06-28 2012-01-12 Panasonic Corp 固体撮像装置及びその製造方法
JP5405437B2 (ja) * 2010-11-05 2014-02-05 AzエレクトロニックマテリアルズIp株式会社 アイソレーション構造の形成方法
JP2012134302A (ja) * 2010-12-21 2012-07-12 Jsr Corp トレンチ埋め込み方法、及びトレンチ埋め込み用組成物
JP2013074169A (ja) * 2011-09-28 2013-04-22 Kyocera Corp 薄膜配線基板
KR102102815B1 (ko) 2013-09-26 2020-04-22 인텔 코포레이션 Nmos 구조체들에서 전위가 높아진 변형을 형성하는 방법
US10204982B2 (en) * 2013-10-08 2019-02-12 Stmicroelectronics, Inc. Semiconductor device with relaxation reduction liner and associated methods
FR3024587B1 (fr) * 2014-08-01 2018-01-26 Soitec Procede de fabrication d'une structure hautement resistive
US10822692B2 (en) 2016-08-12 2020-11-03 University Of North Texas Binary Ag—Cu amorphous thin-films for electronic applications
KR102549340B1 (ko) * 2016-09-27 2023-06-28 삼성전자주식회사 반도체 장치 및 이의 제조 방법
CN110880473B (zh) * 2018-09-06 2025-02-25 长鑫存储技术有限公司 半导体器件、半导体器件制造方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2932552B2 (ja) * 1989-12-29 1999-08-09 日本電気株式会社 半導体装置及びその製造方法
JPH0547918A (ja) 1991-08-13 1993-02-26 Hitachi Ltd 半導体装置の製造方法
JPH05114646A (ja) 1991-10-24 1993-05-07 Fujitsu Ltd 半導体装置の製造方法
JPH0697274A (ja) 1992-09-14 1994-04-08 Hitachi Ltd 素子分離方法
JPH0897210A (ja) 1994-09-28 1996-04-12 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP3542189B2 (ja) * 1995-03-08 2004-07-14 株式会社ルネサステクノロジ 半導体装置の製造方法及び半導体装置
US5707888A (en) * 1995-05-04 1998-01-13 Lsi Logic Corporation Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation
JP4420986B2 (ja) * 1995-11-21 2010-02-24 株式会社東芝 シャロウ・トレンチ分離半導体基板及びその製造方法
TW388096B (en) 1996-06-10 2000-04-21 Texas Instruments Inc Integrated circuit insulator and method
JP3058112B2 (ja) * 1997-02-27 2000-07-04 日本電気株式会社 半導体装置およびその製造方法
JPH1187489A (ja) 1997-09-10 1999-03-30 Asahi Chem Ind Co Ltd ポーラスシリコンを用いた素子分離膜形成方法
JP3519589B2 (ja) 1997-12-24 2004-04-19 株式会社ルネサステクノロジ 半導体集積回路の製造方法
JP3178412B2 (ja) 1998-04-27 2001-06-18 日本電気株式会社 トレンチ・アイソレーション構造の形成方法
JP2000114362A (ja) * 1998-10-02 2000-04-21 Nec Corp 半導体装置の製造方法
KR100287182B1 (ko) * 1998-10-20 2001-04-16 윤종용 반도체장치의소자분리막형성방법
US6469390B2 (en) 1999-01-26 2002-10-22 Agere Systems Guardian Corp. Device comprising thermally stable, low dielectric constant material
JP2000286254A (ja) * 1999-03-31 2000-10-13 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2001144170A (ja) 1999-11-11 2001-05-25 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2002009245A (ja) 2000-06-21 2002-01-11 Nec Corp 誘電体分離型半導体装置
JP3346762B2 (ja) 2000-11-10 2002-11-18 京セラ株式会社 磁気ヘッド組立用治具
JP2002289681A (ja) * 2001-03-26 2002-10-04 Mitsui Chemicals Inc 半導体装置
JP2003031568A (ja) 2001-07-12 2003-01-31 Toshiba Corp 半導体装置の製造方法及び半導体装置
JP2003031650A (ja) 2001-07-13 2003-01-31 Toshiba Corp 半導体装置の製造方法
TWI252565B (en) * 2002-06-24 2006-04-01 Hitachi Ltd Semiconductor device and manufacturing method thereof
JP2004039902A (ja) * 2002-07-04 2004-02-05 Renesas Technology Corp 半導体装置およびその製造方法
TWI314949B (en) * 2002-09-06 2009-09-21 Seimi Chem Kk Polishing compound for insulating film for semiconductor integrated circuit and method for producing semiconductor integrated circuit

Also Published As

Publication number Publication date
JP2005340327A (ja) 2005-12-08
US20050269662A1 (en) 2005-12-08
CN100461414C (zh) 2009-02-11
KR20060048071A (ko) 2006-05-18
TW200605264A (en) 2006-02-01
KR100732647B1 (ko) 2007-06-27
US7279769B2 (en) 2007-10-09
CN1716607A (zh) 2006-01-04

Similar Documents

Publication Publication Date Title
TWI282141B (en) Semiconductor device and manufacturing method thereof
US7838390B2 (en) Methods of forming integrated circuit devices having ion-cured electrically insulating layers therein
US7598151B2 (en) Semiconductor device fabrication method
KR100806439B1 (ko) 상이한 에너지에서 화학량론 이하 도즈량의 산소를사용하는 이온주입 방법
JP2008305974A (ja) 酸化膜形成用塗布組成物およびそれを用いた半導体装置の製造方法
CN101667553B (zh) 制造降低了secco缺陷密度的绝缘体上半导体衬底的方法
JP2007221058A (ja) 半導体装置の製造方法
TWI304246B (en) A liner of a shallow trench isolation modification method
TW200401395A (en) Semiconductor device with insulator and manufacturing method therefor
JP5961618B2 (ja) ゼロ温度係数キャパシタを備えた集積回路
JP4898066B2 (ja) フラッシュメモリセルの製造方法
JP2001250944A (ja) 半導体装置およびその製造方法
JP5891597B2 (ja) 半導体基板または半導体装置の製造方法
TW451310B (en) Method of manufacturing semiconductor device which can reduce manufacturing cost without dropping performance of logic mixed DRAM
WO2007137033A1 (en) Bond termination of pores in a porous carbon dielectric material
JP2010123866A (ja) 半導体装置及びその製造方法
CN111952242A (zh) 双大马士革沟槽结构及制备方法
JP4371710B2 (ja) 半導体基体、半導体装置及びこれらの製造方法
JP2007194239A (ja) 半導体装置の製造方法
JP4987898B2 (ja) 半導体装置の製造方法
JP2006190896A (ja) エピタキシャルシリコンウエハとその製造方法および半導体装置とその製造方法
KR100755671B1 (ko) 균일한 두께의 니켈 합금 실리사이드층을 가진 반도체 소자및 그 제조 방법
JP4465160B2 (ja) 半導体装置の製造方法
JP2006114591A (ja) 半導体装置の製造方法
JP2010010338A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees