TWI256647B - Multi-port memory device with stacked banks - Google Patents

Multi-port memory device with stacked banks

Info

Publication number
TWI256647B
TWI256647B TW093115983A TW93115983A TWI256647B TW I256647 B TWI256647 B TW I256647B TW 093115983 A TW093115983 A TW 093115983A TW 93115983 A TW93115983 A TW 93115983A TW I256647 B TWI256647 B TW I256647B
Authority
TW
Taiwan
Prior art keywords
data
ports
stacked
read
data line
Prior art date
Application number
TW093115983A
Other languages
English (en)
Chinese (zh)
Other versions
TW200519963A (en
Inventor
Seung-Hoon Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200519963A publication Critical patent/TW200519963A/zh
Application granted granted Critical
Publication of TWI256647B publication Critical patent/TWI256647B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
  • Memory System (AREA)
TW093115983A 2003-06-03 2004-06-03 Multi-port memory device with stacked banks TWI256647B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020030035606A KR100546331B1 (ko) 2003-06-03 2003-06-03 스택 뱅크들 마다 독립적으로 동작하는 멀티 포트 메모리장치

Publications (2)

Publication Number Publication Date
TW200519963A TW200519963A (en) 2005-06-16
TWI256647B true TWI256647B (en) 2006-06-11

Family

ID=33487851

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093115983A TWI256647B (en) 2003-06-03 2004-06-03 Multi-port memory device with stacked banks

Country Status (5)

Country Link
US (1) US7120081B2 (https=)
JP (1) JP2004362760A (https=)
KR (1) KR100546331B1 (https=)
DE (1) DE102004027882A1 (https=)
TW (1) TWI256647B (https=)

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TWI383395B (zh) * 2007-09-28 2013-01-21 Hynix Semiconductor Inc 半導體記憶體裝置

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Also Published As

Publication number Publication date
KR100546331B1 (ko) 2006-01-26
US7120081B2 (en) 2006-10-10
JP2004362760A (ja) 2004-12-24
TW200519963A (en) 2005-06-16
US20040246807A1 (en) 2004-12-09
DE102004027882A1 (de) 2005-01-13
KR20040105007A (ko) 2004-12-14

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