TW493240B - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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Publication number
TW493240B
TW493240B TW089106690A TW89106690A TW493240B TW 493240 B TW493240 B TW 493240B TW 089106690 A TW089106690 A TW 089106690A TW 89106690 A TW89106690 A TW 89106690A TW 493240 B TW493240 B TW 493240B
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TW
Taiwan
Prior art keywords
insulating film
forming
opening
porous
nitrogen
Prior art date
Application number
TW089106690A
Other languages
English (en)
Chinese (zh)
Inventor
Tomomi Suzuki
Hiroshi Ikakura
Kazuo Maeda
Yoshimi Shiotani
Koichi Ohira
Original Assignee
Canon Sales Co Inc
Semiconductor Process Lab Co
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Filing date
Publication date
Application filed by Canon Sales Co Inc, Semiconductor Process Lab Co filed Critical Canon Sales Co Inc
Application granted granted Critical
Publication of TW493240B publication Critical patent/TW493240B/zh

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    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors

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  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
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  • Spectroscopy & Molecular Physics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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TW089106690A 2000-02-07 2000-04-11 Semiconductor device manufacturing method TW493240B (en)

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EP1566837A3 (fr) 2006-10-25
DE60022857T2 (de) 2006-03-23
KR100369511B1 (ko) 2003-02-05
JP3365554B2 (ja) 2003-01-14
EP1566837A2 (fr) 2005-08-24
EP1122773A2 (fr) 2001-08-08
EP1122773B1 (fr) 2005-09-28
DE60022857D1 (de) 2005-11-03
JP2001223267A (ja) 2001-08-17
US6514855B1 (en) 2003-02-04
EP1122773A3 (fr) 2003-03-26

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