TW456014B - Semiconductor device and process for manufacturing and packaging a semiconductor device - Google Patents

Semiconductor device and process for manufacturing and packaging a semiconductor device Download PDF

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Publication number
TW456014B
TW456014B TW089115706A TW89115706A TW456014B TW 456014 B TW456014 B TW 456014B TW 089115706 A TW089115706 A TW 089115706A TW 89115706 A TW89115706 A TW 89115706A TW 456014 B TW456014 B TW 456014B
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Taiwan
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sheet
die
conductive
semiconductor
areas
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TW089115706A
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English (en)
Inventor
Samuel L Coffman
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Motorola Inc
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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
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45^〇 1 4 五'發明說明¢1) 發明背景 本發明係關於一半導體裝置和一種製造一半導體裝置的 方法，更明確地說，本發明係關於一半導體裝置和一種製 造和封裝一半導體裝置的方法，該方法不需要為一特定的 裝置，事先剪裁一量身定製的導線框架。 一種半導體裝置是以將一半導體裝置晶粒，裝載於一可 支撐且保護的封裝件内的方式製造《此處用字"晶粒"的意 思，和一般半導體工業的用法一致，包括單數和複數兩者 。封裝件具有幾種不同的功能，包括提供該裝置實體的保 護，以及提供電氣取得或連接至半導體裝置晶粒。傳統的 製程方法中，半導體裝置晶粒是裝載在一事先製作好的導 線框架上，形成裝置晶粒和導線框架間的電氣連接之後， 將晶粒和其附屬的導線壓封入一個模製的塑膠遮蓋内。這 種傳統的封裝一半導體晶粒製程方法，有許多缺點或障礙 。而其中最嚴重的缺點是，因為每一種不同型態的裝置必 須有一個不同的導線框架，導致封裝的成本過高，特別是 顧客要求量身定製的導線架構於一些應用時，確實如此。 裝載了半導體裝置晶粒的導線框架，通常是從一金屬薄片 壓上去，然後電鍍金或其他金屬以確保接合能力。每一種 不同的導線結構必須用一種昂貴的封印工具，而兩者的缺 點都在於過高的成本以及需要長時間準備。 傳統的半導體封裝件尺寸也相當大，即使是已經極小化 的封裝件，像是TSSOP(薄、縮、小、外接線封裝件）也是 如此。大的封裝件，除了在現今極小化的電子儀器中佔據
4^〇u 五、發明說明（2) 大量有用的空間外，還由於相當長的封裝導線，造成高封 裝電感應而損傷R F的品質。此外，目前許多封裝件的傳熱 性差，以致於一已封裝的裝置，不能充分地驅散在裝置運 作時產生的大量熱量。 從傳統封裝件目前存在的問題來看，的確需要一種製造 已封裝裝置的方法，是體積小、不需要特製的導線框架、 提供良好的散熱效果、具有低導線感應、價格便宜，而且 能夠以少的轉換次數，配合新的設計。 圖示簡述 圖1至8是根據本發明的一具體實施例，繪製顯示一連串 之製程方法步騍的縱向截面圖； 圖9至1 1是從本發明的變化具體實施例繪製所得，顯示 各式裝置結構的縱向截面圖；以及 圖1 2至1 7是根據本發明的一變化具體實施例，繪製顯示 —連串之製程方法步驟的縱向戴面圖。 較佳具體實施例之詳細敘述 根據本發明，提供一種半導體裝置和一種製造半導體裝 置的方法，其中在裝置製造的過程中，選擇性的蝕刻形成 一量身定製的導線框架，而不是事先形成的導線框架。此 方法使用一可耗損的導體薄片，在製造裝置的過程中，進 行蝕刻以形成量身定製的封裝 '裝載、吸熱和接觸區域。 視具體實施例而定，只需要兩個或三個量身定製的光微影 遮罩。由參考的附圖和下列較佳具體實施例的敘述，可以 明暸本發明的各式具體實施例。
五、發明說明（3) 圖1至8是根據本發明的一具體實施例，繪製顯示製程方 法步驟的縱向截面圖。如圖1所示，製程方法始於一導電 材料的薄片2 0 。較佳具體實施例中，導電薄片2 0是一張銅 或銅合金的薄片，厚度2 1約為7 5微米至2 5 0微米，理想的 厚度為125微米。薄片20的理想材料是銅或銅的合金，因 為銅相當便宜，容易蝕刻，對於電氣和熱量兩者均為好的 導電。薄片20的寬度和長度可選擇為特殊應用，但也可以 像是寬約為4到1 0公分，長約為8至2 0公分。 如圖2所示，製程方法接著在薄片20的一第一表面23上 ，形成複數個晶粒附著墊2 2，每一個即將製造的裝置要有 一個晶粒附著墊，晶粒附著墊最好位於薄片2 0表面，至少 是整個中央部份上方之一正規列陣内。在薄片2 0的一第二 表面2 7上，形成複數個裝置晶粒接觸2 4和複數個裝置導線 接觸2 6，晶粒接觸2 4最好是規劃在對準晶粒附著區域2 2。 每一個區域22，24，26可由選擇性電鍍完成。而選擇性電 鑛是在薄片20的每一面上，應用一層可成像的光阻，和一 般熟悉的光微影技術選擇性地曝光而完成。就已知的情況 下，該光阻層可經由照射適當波長的電磁波，穿過已有圖 樣的遮罩，來複製遮罩上的圖樣至光阻層。 印有圖樣結果的光阻，即用來當作一電鍍遮罩。同時， 選擇性地電鍍薄片2 0上沒有被該圖樣光阻遮蓋的區域2 2， 24， 26。電鍍可以用電解、無電電鍍、或是其他想採用的 方式完成。在一較佳具體實施例_，電鍍的區域是鍍上鎳 和把、錄和金、或是錄和銀的連續層次。其他的電鐘金屬
五、發明說明（4) 系統也可以使用，較理想的電鍍系統具備對薄片2 0有良好 附著性，和相容於接下來用於附著一半導體晶粒至每一個 晶粒附著區域2 2的物質，以及在裝置晶粒接觸2 4和裝置導 線接觸2 6上的電鍍物質，要能夠在後面的製程步驟中當作 一钮刻遮罩°此外，用來電鑛在區域24和26的物質，最好 是在裝置的使用目的令，相容於結合或是用來附著該裝置 於一電路板的其他物質。 根據本發明的一較佳具體實施例，製程方法繼續以一可 成像的光阻層30，加在薄片20的第二表面27上，和一可成 像的光阻層32 ，加在導電薄片20的第一表面23上。如圖3 所示的光微影圖樣層32，在光阻層32提供的開口，是對準 裝置導線接觸26的。印有圖樣的光阻層32和沒有圖樣的光 阻層30，用來當作電鍍遮罩，模組鎖34是電鍍穿過印有圖 樣的光阻層3 2所提供的開口而形成。模組鎖3 4的形成最好 是先電鍍銅，然後再是鎳和鈀的連續層次，其他的頂層也 可以在銅上面鍍鎳和金、鎳和銀、和類似的連續層次。選 擇這些連續的層次是為提供對銅有良好的附著性，並提供 在接下來步驟中容易接合的一層外表面。一較佳具體實施 例中，電鍍的模組鎖厚度是約等於接下來在晶粒附著區域 2 2上，結合之半導體裝置晶粒的厚度。當電鍍進行到此一 厚度時，一部份的電鍍物質容易變成"磨菇”形狀，並且延 伸超過印有圖樣之光阻層3 2的邊緣。在電鍍模組鎖的過程 中，沒有圖樣的光阻層3 0是來保護導電薄片2 0的底面，以 防止電鍵在該表面上。
五、發明說明¢5) 圖4顯示的是，去除光阻層30和32之後的裝置製造過程 。在電鍍過程中所造成模組鎖的磨菇狀，使得模組鎖3 4的 頂部比模組鎖在表面2 3接合薄片2 0的底部較寬。 根據本發明，如圖5所示，製造過程繼續將半導體裝置 晶粒4 0附著於複數個晶粒附著區域2 2中的每一個。半導體 裝置晶粒4 0可用接合、導電的接著劑，或是類似方法，視 裝置應用和希望的傳熱及導電性質而定。選取用於形成晶 粒附著區域2 2的物質，要和決定的晶粒附著方法相配合。 將半導體裝置晶粒附著在複數個晶粒附著區域之後，形成 電氣互連42延伸至半導體裝置晶粒表面上的電極，（圖中 未示），和模組鎖3 4的頂端之間。因此模組鎖3 4當作模組 鎖和互連結合區域，正是接著要解釋的。互連42可以導線 結合TAB*或是在半導體工業中使用的其他傳統互連技術 完成。選擇電鍍在模組鎖34頂上表面的物質，是要有助於 所決定的互連結合技術。不論選取的特定技術為何，模組 鎖延伸至薄片20平面之上，且最好靠近半導體裝置晶粒40 的頂端表面，有助於互連結合。 將半導體裝置晶粒4 0附著於晶粒附著區域2 2和電氣互連 4 2之後，裝置就可以準備壓封在一保護的樹脂遮蓋内。根 據本發明的一較佳具體實施例，所有的半導體裝置晶粒和 對應的互連，以及模組鎖，都壓封在一單一的單元模製樹 脂遮蓋50内，如圖6所示。壓封複數個半導體裝置晶粒， 可以將導電薄片2 0和已附著的晶粒放置在樹脂模内，蓋上 模具，然後將樹脂壓封劑射入模具腔内，使得複數個晶粒
第10頁 £4^〇1 4 五、發明說明¢6) 上形成一單元的遮蓋。模具腔的尺寸是配合已決定的薄片 2 0大小，與結合在薄片上裝置晶粒的型態無關。若以形成 如此一單元的模製樹脂遮蓋和以薄片2 0為一標準尺寸，當 作本製程步驟的啟始點，相同的模具便可以配各式各樣不 同的裝置、型態、裝置形狀和裝置大小。或者，一個量身 定製的模型可用來為每一個別的半導體裝置晶粒和其附帶 的互運，提供一個別的樹脂遮蓋。還有，根據本發明的另 一個具體實施例，每一個半導體裝置晶粒可以整體（g 1 ob ) 頂端壓封方式，壓封在一樹脂遮蓋内。 根據本發明的較佳具體實施例，利用電鍍在裝置晶粒接 觸24和裝置導線接觸26的抗蝕刻物質，當作蝕刻遮罩，對 導電薄片2 0進行選擇性蝕刻。另外，單元的模製樹脂遮蓋 5 0就像是一個蝕刻遮罩，並且在蝕刻步驟進行時，保護著 半導體裝置晶粒和其附帶的互連。經由穿過導電薄片2 0厚 度的完全蝕刻，複數個隔絕裝置晶粒接觸6 0和複數個隔絕 裝置導線接觸62，如圖7所顯示的，都形成了 。而模組鎖 3 4頂端的增大之磨菇形狀，幫忙確保個別的裝置導線接觸 ，在模製樹脂遮蓋内確實地連接著。 電氣接觸至半導體裝置晶粒4 0的背面，可以接觸至隔絕 的裝置晶粒接觸60來完成。電氣接觸至半導體裝置晶粒40 上每一個裝置終端，可藉由接觸隔絕的裝置導線接觸62完 成。裝載在原來的導電薄片20上的所有半導體裝置晶粒， 現在都可以探針接觸6 0和6 2測試電氣。因為個別的裝置均 以單元的模製樹脂遮蓋5 0固定於所在位置，複數個晶粒的
4^S〇u 五、發明說明（7) 測可以容易地用自動化進行，並用墨水或其他記號標示不 合格的晶粒，以便之後丟棄。 在蝕刻導電薄片2 0以隔絕個別的接觸6 0和6 2，以及選擇 性電氣測試半導體裝置晶粒之後，可以利用任何傳統分割 技術，將樹脂遮蓋和壓封在其中的半導體裝置晶粒分開， 成為個別的裝置。一較佳具體實施例中，把组合的樹脂遮 蓋鋸開，成為單一的個別半導體裝置晶粒及其附帶的互連 ，以製造複數個分開的半導體裝置成品7 0 ，如圖8所示。 根據本發明用以生產裝置7 0的製程方法有許多優點，像 是裝置70尺寸小，且裝置導線接觸62靠近分離的裝置晶粒 接觸60。一種單一的壓封模型可以用於廣泛種類的裝置、 架構和尺寸，並不是每一種裝置型態必須要一個量身定製 的壓封模型。此外，也不是每一種不同的裝置架構和尺寸 ，就需要一個量身定製的導線框架和定做導線框架所附帶 的工具製作，而是可以利用少到三個的光微影遮罩，製作 裝置導線接觸，裝置晶粒接觸、以及模組鎖。使用光微影 遮罩，（相反於更多的傳統壓封儀器），來製作導線框架的 優點，還有對於不同的裝置裝置封裝，可以在快速的轉換 下完成。裝置70也提供了半導體裝置晶粒40的吸熱體，因 為裝置晶粒接觸6 0可以結合，或另外附著於一電路板，或 其他儀器來協助移去操作裝置時產生的熱量。 圖9至1 1繪示本發明各式各樣的具體實施例之縱向截面 圖。現在參考圖9，裝置80和裝置70大致相似，除了一模 製樹脂遮蓋82是為半導體裝置個別架構的，而不是在一單
圓 第12頁 ύ5^〇14 五、發明說明（8) 一的單元樹脂遮蓋内，模製複數個相鄰的裝置。也就是 說，樹脂遮蓋8 2是以替每一半導體裝置具備的個別晶粒模 製腔的樹脂模型而製成的。在每一個相對應的裝置，7 0和 8 0，以及裝置晶粒接觸6 0和半導體裝置晶粒4 0，是尺寸合 適且大小是差不多的。 如圖10所示，半導體裝置84和半導體裝置70很相似，而 且以類似的方式製造，除了裝置8 4有一延伸的裝置晶粒接 觸86，要比半導體裝置晶粒40大一些。裝置晶粒接觸86的 大小，是以電鍍晶粒接觸區域金屬化的大小來決定。延伸 的裝置晶粒接觸，提供了改良的散熱效果。此外，該延伸 的裝置晶粒接觸8 4也提供了額外的模組鎖8 8。而額外模組 鎖協助確保在模製樹脂9 0内延伸的裝置晶粒接觸，也為下 方結合9 2提供一個便利的接合區域。例如·.下方結合可以 用來提供裝置晶粒4 0頂端上的一接地接觸，是除了該晶粒 底部表面上的一接地接觸之外的。此額外的模組鎖以用於 電鍍模組鎖3 4的抗蝕刻遮罩，所提供的額外開口製成的。 如圖11所示，半導體裝置94可以製造裝置70，80和84相 似的製程方法生產。此外，裝置9 4也可配合多種半導體裝 置晶粒96和98 ，位於相同的模製樹脂遮蓋1 〇〇内。 圖12至17以縱向截面圖顯示，根據本發明另外一個具體 實施例中的製程步驟。本發明的此具體實施例對於電源裝 置的製造特別有幫助，該電源裝置包括大的半導體裝置晶 粒，同時必須散去相當大量的熱能。製程步驟和先前敘述 的具體實施例很類似，所以在此不再詳細敘述。
第13頁 45g〇/4_ 五'發明說明（9) 如圖1 2所顯示，製程方法開始於一導電薄片1 2 0。在一 較佳具體實施例中，其包括了三明治式的一層鉬1 2 2 ，夾 在上層的銅124和下層的銅126中間。其他金屬也可用於此 三明治結構，以組成導體薄片1 2 0。但是發現銅和鉬的優 點，是具備導電和高散熱效果《選擇金屬組成導體薄片 1 2 0的一個條件是，中間的金屬1 2 2必須能夠抵抗用於蝕刻 1 2 4和1 2 6層的ϋ刻劑。 如圖13所示，製程步驟繼續在導電薄片120的兩面選擇 性地電鑛金屬層，如鎳和纪的連續層次。選擇性的電鍍錄 和鈀規劃出晶粒附著區域1 3 0 ，模組鎖區域1 3 2，晶粒接觸 區域134，和導線接觸區域136。晶粒附著區域130最妤是 對準晶粒接觸區域1 3 4，同時模組鎖區域1 3 2最好也是對準 導線接觸區域1 3 6。 接著在導電薄片1 2 0上電鍍金屬層之後，利用在晶粒附 著區域130和模組鎖區域132上的電鍍金屬層，當作蝕刻遮 罩來蝕刻上層1 2 4。另外，在蝕刻步驟中，當然必須保護 導電薄片1 2 0的背面，延伸至所想要的範圍，以避免蝕刻 到1 2 6層。繼續蝕刻層1 2 4層直到鉬層1 2 2的部份曝露出來 。當蝕刻到此一厚度時，即規劃出隔絕的晶粒接觸區域 1 3 8和模組鎖區域1 4 0。蝕刻銅層1 2 4進行時，蝕刻劑下切 電鍍的遮罩層131和132，形成下切區域142。這些下切區 域將形成晶粒結合區域1 3 8和模組鎖1 4 0 ，在後面的製程步 驟中，接著要形成模製樹脂固體時，當作模組鎖之用。 如圖1 5所示，半導體裝置晶粒1 4 4是附著在每一個晶粒
第14頁 ά 4 五、發明說明（10) 附著區域138，形成的電氣互連146 ，是從半導體裝置晶粒 144頂上表面的終端延伸至附帶的模組鎖區域140。相互連 接1 4 6可以先前敘述的方法形成。 如圖1 6所示，根據一較佳具體實施例，一單元的模製樹 脂遮蓋是形成於複數個半導體裝置晶粒144和其附帶的互 連之上層。在模製操作過程中，下切區域1 4 2作為確保晶 粒附著區域1 3 8和模組鎖區域1 4 0，都安全地鎖在該樹脂遮 蓋内。 如圖1 7所示，個別且隔絕的晶粒接觸區域和導線接觸區 域，是利用電鍍的抗蝕刻物質區域1 3 4和1 3 6為蝕刻遮罩， 以蝕刻穿過銅層1 2 6的厚度而形成的。蝕刻步驟繼續穿透 鉬層122的厚度，完成各式裝置接觸區域的電氣隔絕。此 型式的複數個半導體裝置，如果想要的話，可以做電氣測 試。然後如先前的敘述，鋸開單元的塑膠遮蓋1 4 8，形成 複數個個別的半導體裝置，那麼裝置製造就完成了。 以此方式製造的半導體裝置，可以不需要設計和製作量 身定製為結合半導體裝置晶粒於其上的導線框架，便能生 產。而只需要兩個量身定製的光微影遮罩，所以商品化的 裝置製造，可在短的轉換時間内完成製造。完成的裝置在 尺寸上縮小，有助於高封裝密度和降低導線感應，同時提 供良好的吸熱體，以散開裝置運作時所產生的熱量。每一 個半導體裝置晶粒144，是位於且結合至一銅/鉬/銅厚層 的吸熱體上，以助於散熱。 為此，很明顯地根據本發明提供一種製造半導體裝置的
第15頁 五、發明說明（11) 製程方法，完全符合前面敘述所列舉的需要。雖然根據本 發明的製程方法已敘述過，且參考明確的具體實施例，而 目的並不希望本發明受限於這些呈現的具體實施例。本技 藝中的這些技巧確知可以做各種的修正和改變，而沒有偏 離本發明的範圍。例如：其他的金屬可以用來做導電薄片 ，也可以做為電鍍在薄片上的物質。此外，可以使用不同 的厚度、形狀、和佈局，達到特定的裝置型態。為此，包 括在本發明内的所有變化和修正，都在所附的申請專利範 圍内。
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Claims (1)

  1. 45β〇 1 ή 六、申請專利範圍 1.—種製造一半導體裝置（70)之方法，其步驟包括： 提供一導電物質的薄片（20)，具有第一（27)和第二 (23)表面以及一厚度（21); 於該薄片（2 0 )的第一表面（2 7 )，選擇性地使用一抗蝕 刻物質（2 4， 26); 形成一模組鎖（34)，從該薄片（20)的第二表面（23)向 上延伸； 附著一半導體晶粒於該薄片（20)的第二表面（23); 從該半導體晶粒（4 0 )到該模組鎖（3 4 )，形成一電氣連 接（42); 提供一壓封的樹脂（50)於該薄片（20)的第二表面（23) 上，以壓封該模組鎖（3 4 )、半導體晶粒（4 0 )、和電氣連接 (4 2 );以及 選擇地從第一表面（27)蝕刻穿過該薄片（20)的厚度 (2 1 )，其利用抗蝕刻物質（2 4， 2 6 )當作一蝕刻遮罩。 2 .如申請專利範圍第1項之方法，其令形成一模組鎖 (34)的步驟包括： 在導電物質薄片（20)的第二表面（23)上，形成一印有 圖樣的電鍍遮罩（32); 將銅電鍍在部份的導電物質薄片（20)曝露處，並穿過 印有圖樣的電鍍遮罩（3 2 )中之開口；以及 去除該有圖樣的電鍍遮罩（32)。 3.如申請專利範圍第1項之方法，其中選擇性的應用步 驟包括：
    第17頁 d5^〇1 4 六、 中讀 •專利範圍 於第一 表 面 (27) 上 使 用 — 層 可 成 像 的 光 阻 ; 在該可 成 像 的 光 阻 層 印 上 圖 樣 以 形 成 一 些開口 穿 過 該 開口即 曝 露 出 部 份 的 第 — 表 面 t 以 及 經由該開c 7 將錄和把的金厲層 電鍍在已曝露第 一 表 面（27) 上 部 份（2 4， 26) 0 4. 一種製 造 複 數 個 半 導 體 裝 置 (70) 之 方 法 其步驟 包 括 ： 提供一 第 一 導 電 物 質 的 薄 片 (20) 具 有 第 一（23) 和 第 二 (27)面： 選擇性 地 將 一 第 二 導 電 物 質 電 鍍 在 該 薄 片（20) 的 第 一 面（2 3 )， 以 形 成 複 數 個 晶 粒 附 著 區 域（22) 選擇性 地 將 —, 第 二 抗 蝕 刻 導 電 物 質 電 鍍 在該薄 片 的 第 二 面（27) 以 規 劃 複 數 個 裝 置 導 線 接 觸 (26) 和複數 個 裝 置 晶 粒接觸 (24) 該 裝 置 晶 粒 接 觸 (24) 係 對 準 晶粒附 著 區 域（22)處； 選擇性 地 將 一 第 四 導 電 物 質 電 鍍 在 該 薄 片（20) 的 第 一 面 (23)， 以 形 成 複 數 個 對 準 複 數 個 裝 置 導 線 接觸（26) 處 之 模 組鎖（3 4 ) ； 將一半 導 體 晶 粒（4 0 ) 附 著 在 該 每 一 個 晶 粒 附著區 域 (22) 中； 形成一 電 氣 互 連（42) » 從 該 半 導 體 晶 粒（4 0 )延伸 至 相 關 之 一模組 鎖 (34) 中 將所有 的 該 半 導 體 晶 粒 和 該 電 氣 互 連 壓 封在一 單 元 的 模 製樹脂 遮 蓋 (50) 内
    第18頁 ά 5 Q r> , ^ ^ •~v ____ 六'申請專利範圍 利用該第三抗蝕刻導電物質（2 4， 2 6 )當作一蝕刻遮罩 ，選擇性地從第二面（2 7 )蝕刻穿過該薄片（2 0 )，以形成複 數個隔絕的裝置導線接觸（6 2 )和複數個隔絕的裝置晶粒接 觸（6 0 );以及 鋸穿該單元的模製樹脂遮蓋（5 0 )，將複數個半導體晶 粒分開成為複數個個別的裝置結構（7 0 )。 5. 如申請專利範圍第4項之方法，其中壓封的步驟包括： 將具有已附著之半導體晶粒（40)的該第一導電物質的 薄片（2 0 )，放置在一模製腔内，該模製腔和半導體晶粒附 著至薄片的型態無關；以及 將該模製腔内填入一樹脂物質，以形成該單元的模製 樹脂遮蓋（50)，位於該第一導電物質薄片的第一面（23)上 方。 6. 如申請專利範圍第4項之方法，其中的步驟還包括在 選擇性的蝕刻之後和鋸開以前，電氣測試每一個該半導體 晶粒。 7. —種製造複數個半導體裝置的方法，其步驟包括： 提供一可耗損物質的導電薄片（2 0 ); 在該導電薄片（20)的一第一表面（23)上，規劃出複數 個晶粒附著區域（2 2 )和複數個互連結合區域（3 4); 將複數個半導體晶粒（40 )附著在該晶粒附著區域 (2 2 )，並於每一該半導體晶粒（40 )和其相關之互連結合區 域（34)之間，提供一互連（42); 將該複數個半導體裝置晶粒壓封在一單元的樹脂遮蓋
    第19頁 45 6〇 1 4 六、申請專利範圍 (50 )内； 選擇性地蝕刻該導電薄片，以去除該導電薄片的第一 部份，留下該導電薄片（2 0 )中接合至晶粒附著區域（2 2 )和 該互連結合區域（3 4 )的第二部份（6 0， 6 2 );以及 鋸開該單元的樹脂遮蓋，將該半導體裝置晶粒分為單 一裝置。 8. 如申請專利範圍第7項之方法，其中規劃複數個互連 結合區域的步驟包括： 形成一電鍍的遮罩層（32)，在該導電薄片（20)的第一 表面（23)上，有複數個開口穿過表面，該複數個開口曝露 出該導電薄片的第一表面之區域；以及 將銅電鍍在該曝露區域，形成了複數個模组鎖（34)， 延伸至該導電薄片的表面上方，每一個模組鎖有一上方表 面，是為形成一互連結合區域。 9. 如申請專利範圍第7項之方法，其中選擇性蝕刻的步 驟包括： 在導電薄片（20)的一第二表面（27)上，使用一印有圖 樣的蝕刻遮罩（2 4 , 2 6 )，該圖樣蝕刻遮罩包括複數個遮 罩，對準複數個晶粒附著區域（2 2 )和複數個互連结合區域 (3 4 );以及 於導電薄片的第二表面，蝕刻沒有被複數個遮罩蓋住 的部份。 10. —種製造複數個半導體裝置的方法，其步驟包括： 提供一包含銅的薄片（20)，該薄片有第一（23)和第
    第20頁 45^〇ι4 六、申請專利範圍 二表面； 選擇性地電鍍該薄片的第一表面（23)，以形成複數 個晶粒附著區域（2 2 ); 選擇性地以一抗蝕刻導電物質，電鍍該薄片的第二 表面（2 7 )，以規劃複數個晶粒接觸區域（2 4 )和複數個結合 接觸區域（2 6 )，而該結合接觸區域（2 6 )對準該晶粒附著區 域（22); 選擇性地將銅電鍍在該薄片的第一表面（23)，以形 成複數個模組鎖（3 4 )，其中每一個模組鎖（3 4 )對準相對的 複數個結合接觸區域（2 6 )中之一個，而且每一個模組鎖有 一結合表面； 將半導體晶粒（4 0 )附著至複數個晶粒附著區域（2 2 ) 中的每一個； 於每一個半導體晶粒（4 0 )和相關的該結合表面（34 ) 之間，提供一電氣互連（4 2 ); 形成一單元的樹脂遮蓋（50)，壓封所有的半導體晶 粒（4 0 ); 利用該抗蝕刻導電物質（2 4， 26)當作一蝕刻遮罩， 蝕刻該薄片的第二表面（2 7 )，將該薄片分成複數個電氣隔 絕的晶粒接觸區域（6 0 )和複數個結合接觸區域（6 2 );以及 將該單元的樹脂遮蓋鋸開，以分割半導體晶粒，成 為複數個單一的半導體裝置（70)。
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