TW419797B - Substrate used for carrying semiconductor device, the fabrication method and the semiconductor apparatus - Google Patents
Substrate used for carrying semiconductor device, the fabrication method and the semiconductor apparatus Download PDFInfo
- Publication number
- TW419797B TW419797B TW87106686A TW87106686A TW419797B TW 419797 B TW419797 B TW 419797B TW 87106686 A TW87106686 A TW 87106686A TW 87106686 A TW87106686 A TW 87106686A TW 419797 B TW419797 B TW 419797B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- wiring
- semiconductor element
- mounting
- recessed portion
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 251
- 239000000758 substrate Substances 0.000 title claims abstract description 210
- 238000000034 method Methods 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims description 56
- 229920005989 resin Polymers 0.000 claims abstract description 63
- 239000011347 resin Substances 0.000 claims abstract description 63
- 229910052751 metal Inorganic materials 0.000 claims description 68
- 239000002184 metal Substances 0.000 claims description 68
- 239000011888 foil Substances 0.000 claims description 33
- 238000012545 processing Methods 0.000 claims description 29
- 238000004080 punching Methods 0.000 claims description 16
- 238000007789 sealing Methods 0.000 claims description 15
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 14
- 230000002079 cooperative effect Effects 0.000 claims description 10
- 239000010931 gold Substances 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 235000015170 shellfish Nutrition 0.000 claims description 7
- 239000004745 nonwoven fabric Substances 0.000 claims description 4
- 229940098465 tincture Drugs 0.000 claims description 4
- 230000002441 reversible effect Effects 0.000 claims description 3
- 238000003860 storage Methods 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 238000002360 preparation method Methods 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 65
- 239000011889 copper foil Substances 0.000 abstract description 40
- 229910000990 Ni alloy Inorganic materials 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 118
- 235000012431 wafers Nutrition 0.000 description 54
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 44
- 238000005530 etching Methods 0.000 description 25
- 239000010949 copper Substances 0.000 description 23
- 229910052802 copper Inorganic materials 0.000 description 23
- 239000011521 glass Substances 0.000 description 23
- 229910052759 nickel Inorganic materials 0.000 description 22
- 239000002344 surface layer Substances 0.000 description 18
- 238000003825 pressing Methods 0.000 description 16
- 239000004744 fabric Substances 0.000 description 14
- 229910000679 solder Inorganic materials 0.000 description 14
- 238000005520 cutting process Methods 0.000 description 12
- 238000000465 moulding Methods 0.000 description 10
- 239000004020 conductor Substances 0.000 description 8
- 230000000875 corresponding effect Effects 0.000 description 8
- 239000004593 Epoxy Substances 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 239000003822 epoxy resin Substances 0.000 description 7
- 239000007788 liquid Substances 0.000 description 7
- 229920000647 polyepoxide Polymers 0.000 description 7
- 238000012546 transfer Methods 0.000 description 7
- 238000009751 slip forming Methods 0.000 description 6
- 239000003365 glass fiber Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 239000004809 Teflon Substances 0.000 description 2
- 229920006362 Teflon® Polymers 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- -1 copper Chemical compound 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
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- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Landscapes
- Engineering & Computer Science (AREA)
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- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
f 419797 A7 B7 經濟部中央橾隼局員工消費合作社印氧 五、發明説明(1〉 (技術領域) 本發明有關於搭載半導體元件之半導體元件用基板以 及其製造方法,以及實裝半,導體元件之具備半導體元件搭 載用基板之半導體裝置。 (發明之背景) 最近之半導體裝置係由於積體度之增大,高頻化,以 此希望爲多梢且小型之封裝。因此使用以往之引線架之周 邊端子乃端子數之一增加就會使封裝大型化,對大型化之 對策雖可採端子節距之縮小,惟0 . 4mm以下就有困難 之狀況。 對於端子數之增加之對應策而有將端子配置成面狀之 面陣列型之封裝,此面陣列(Area Array )封裝時,即須 要由晶片端子將配線引至外部端子電極用之配線基板。如 果將外部端子電極設於配線基板下面|即晶片之搭載面將 分爲設於配線之上面或設於配線之下面之兩種情形。如果 在配線基板上面搭載晶片時,即必要設有連給配線基板上 面與下面之層間連結。如果在配線基板下面搭載晶片時即 不需要此種連接。惟將晶片搭載於配線基板下面時*爲了 吸收晶片之厚度以及密封所必要,之厚度需要有凹部。 此凹部稱謂空腔(Carity),當空腔存在於下面時稱 謂下空腔(Cavity-down)構造,爲了製作此構造通常採取 對基板之削面加工,或控空基板後接著底板來製作。此構 造時,由於配線面爲同一平面上,因此欲改變晶片連接部 (錆先Μ讀背面之注意事項再填耗本瓦) 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公嫠) Λ -4 - 經濟部中央標準局負工消費合作社印製 丨 419797 A7 B7五、發明説明(2 ) 與外部電極之高度時,需要多層構造之配線,依此方法即 可形成滿足晶片收容部與晶片連接部與外部電極部之立體 位置關係之配線構造。 面陣列型半導體封裝之一種有,在其連接端子上使用 焊錫球之B G A ( Ball Grid Array )。此BGA乃與以往 之使用引線架之半導體裝匱相比較時,其價格昂貴而被要 求設法減低其價格,價格高之理由爲,其半導體元件搭載 用基板之構造或製程係與引線架方式複雜乃其主要原因* 因此開發出構'造及製程之單純之半導體元件搭載用基板之 要求很殷切。 使用於面陣列型半導體封裝之配線基板乃通常稱之謂 「插入式選擇指」(inter poser),插入式選擇指大別爲 膜片形狀及硬板形狀。配線層數即一層或二層或三層以上 ,一般而言配線層數少者之製造成本低· 最能期望低成本者乃一層之配線構造,配線之存在於 插入式選擇指之至少兩面時*可以將半導體晶片搭載部及 外部端子分爲表•背面,惟一層之配線構造之插入式選擇 指時由於半導體晶片搭載部與外部端子將成爲同一面,因 此此種一層之配線構造時,須在配線面側設置爲收容半導 體晶片用之至少晶片之厚度程度之凹部|因此其製造法乃 成爲硏究之課題。 稱謂 T A B ( Tape Automated Bonding )或丁 C P ( Tape Carrier Package)之插入式選擇指及封裝技術時,即 控空插入式選擇指之中央部而設置半導體晶片。又硬板形 本纸張尺度適用中國國家揉準(CNS >A4規格(210X297公釐) ~ { ^M讀背面之注意事項再填寫本頁w 經濟部中央標準局負工消費合作社印笨 ί 419797 Α7 _Β7_____五、發明説明(3 ) 狀時也是控空插入式選擇指之中央部而製作半導體晶片收 容部而接著金屬板爲其底板,或將插入式選擇指之中央部 予以削面加工來形成凹部。此種方法時配線在平面部沒有 存在於凹部β (發明之槪要) 本發明乃考慮上述之點所開發,其目的乃提供一種可 能小型化,高可靠性,低廉,使其設計及製造方法之標準 化容易化之搭載半導體元件之半導體元件搭載用基板及其 製造方法,以及在半導體元件搭載用基板實裝半導體元件 之半導體裝置。 爲了達成上述目的,本發明乃在於具備凹部之半導體 元件搭載用基板,或在該凹部搭載半導體元件之後,藉由 密封樹脂而予以密封之半導體裝置中,其特徵爲: 上述半導體元件搭載用基板乃備有沿著該基板表面及 上述凹部之基板壁面所配置之配線,上述配線乃由:連接 於設置於上述凹部所開口側之該基板表面之外部連接端子 之外部連接端子部,及與上述搭載之半導體元件連接之內 連接端子部,及上述外部連接端子部與上述內連接端子部 間之配線部,而構成,上述配線係埋入於上述基板表面及 上述凹部之基板壁面,上述內連接端子部乃據位於上述凹 部內之位置者。 例如上述凹部之基板壁面係具備有延伸於該凹部之底 面方向之預先規定之傾斜角度範圍內之坡度。 (请先閱讀背面之注意事項再填寫本筲) 本紙張尺度通用中國國家標準(CNS ) Α4規格(210Χ297公釐) -6- 經濟部中央標準局頁工消费合作社印繁 ί 4i9797 Α7 _Β7_五、發明説明(4 ) 而上述凹部基板壁面之傾斜角度爲5〜4 0度之範圍 內。更合宜爲1 0〜4 0度之範圔。又上述凹部之基板壁 面之傾斜構造之高度G與其水平距離之比L/G爲1·5 <L/G<10之範圍內*更合宜爲2<L/G<10, 最合宜爲3<L/G<10之範圍內· 上述凹部乃例如藉由凸形之沖壓成形所構成。又上述 凹部乃複數級階地形成之構成亦可· 又上述凹部上,設置將該凹部再施予削面加工所形成 之爲收容半導體元件用之半導體元件收容部之搆成亦可以 〇 此時上述經削面加工而成之半導體元件收容部之深度 乃,較欲搭載之半導體元件之厚度大者爲宜。 又上述之半導體元件搭載用基板及半導體裝置中。 該基板表面部之上述外部連接端子部與上述凹部內之 上述內連接端子部之級階高度差爲〇·〇5mm以上爲宜 〇 該搭載於上述凹部之半導體元件之端子與上述內連接 端子部乃以引線連接地予以連接。 或將半導體元件之端子以背面饋送方式地直接連接於 上述內連接端子部爲宜。 又上述配線係設置於上述凹部之除了角部之壁面領域 〇 又上述凹部乃形成於該基板之主平面之略中心位置1 於上述凹部內,對於該半導體元件搭載用基板之厚度 (谇先閱讀背面之注意事項再填寫本 -訂 -^ 本紙張尺度適用中國國家橾隼(CNS ) Α4規格(2丨0X297公釐} ! 419797 經濟部中央標準扃負工消费合作社印家 A7 __B7 _五、發明説明(5 ) 方向之略中央地搭載半導體元件者。 在上述凹部內,對於該基板之厚度方向由中央以該基 板之厚度之3 0%偏倚以內地搭載半導體元件之構成亦可 〇 又將上述凹部乃於底面領域備有可以收容之複數之元 件之寬度,同時形成有對上述複數之元件之配線,而在該 凹部搭載複數之半導體元件及受動元件而構成亦可。 又上述配線乃利用全部由金臑所構成之可能抽拉加工 之配線構成體所形成者* 上述可能抽拉加工之配線構成體係至少含有備有構成 上述配線之第1之金靥層,及擔任該載置層之機能之第2 之金屬層之多層構造者爲宜。 又上述凹部之深度乃較所搭載之半導體元件之厚度小 I 而將上述凹部之底面,對於該半導體元件搭載用基板 之厚度方向,由中央實施該搭載之該半導體元件之厚度之 0.5乃至2.5倍之範圍內之深度地施予削面加工亦可 以。 上述凹部之深度乃較欲搭載之半導體元件之厚度爲小 ,且對該凹部施予削面加工,該至少露出之削面加工之底 面爲由不織布所成之預含浸樹脂之叠層予以硬化而成之樹 脂層之構成亦可。 此時在形成上述凹部之樹脂層之背面接著厚度 I 0 . 0 3 5mm以上之金屬板*令上述凹部之深度小於欲 {請先Μ讀背面之注項$填苑本頁) 本紙張尺度適用中國國家標準(CNS) A4说格(2丨OX”7公釐) -8 - 419797 經濟部中央標率局負工消费合作社印製 A7 B7_五、發明説明(6 ) 搭載之半導體元件之厚度,且對於該凹部之底面施予削面 加工使上述金屬板露出·或在形成上述凹部之樹脂層之背 面接著厚度0 _ 2mm以上之金屬板’使上述凹部之深度 小於所搭載之半導體之元件之厚度爲小’且上述土屬板之 削面深度能達0 . 0 5mm以上地對於該凹部之底面實施 削面加工。 又樹脂層之削面乃在到達於上述金屬板之前使之終了 亦可。 再者,爲了達成上述目的之本發明乃 在半導體元件搭載用基板之製造方法中,將且有,至 少含有第1之金靥層及擔任該載置層之機能之第2金屬層 之多層構造。將全部由金屬所構成之可能抽拉加工之配線 構成體,壓接於樹脂基板予以接著,同時在該樹脂基板上 *形成備有預先規定之傾斜角度範圍內之坡度之壁面之凹 部,而藉留存上述第1之金屬層去除其他之金屬層,以資 沿著該基板表面到上述凹部之基板壁面地配置形成, 由:連接於設置於上述凹部所開口側之該基板表面之 外部連接端子之外部連接端子部•及與上述搭載之半導體 元件連接之內部連接端子部,及上述外部連接端子部與上 述內連接部端子間之配線部而構成,埋入於上述基板表面 及上述凹部之基板壁面之配線,爲其特徵* 本案中上述可能抽拉加工之配線構成體之破斷延伸率 爲2 %以上爲宜》 又上述構成可能抽拉加工之配線構成體之上述載置層 ---------,------訂------呤--1 ... ' *·-{請先閲讀背面之注意Ϋ項再填寫本頁)_ 本纸張尺度適用中囷國家樣準(CNS )以規格(210X2们公釐) -9 - 經濟部中央樣準局員工消費合作社印聚 419797 A7 B7五、發明説明(7 ) 之厚度乃在於0 . OlOmm〜0 . 050mm之範圍爲 宜。 又上述凹部之基板壁面之傾斜角範圍爲5度以上4 0 度以下, 而上述凹部之深度乃其所收容之半導體元件之至少 3 0 %以上爲宜。 又形成上述凹部之後,在上述凹部之底面施予削面加 工,在上述削面加工之後,去除上述其他之金屬層之構成 亦可以。在有其他之金屬層之狀態下,施予削面加工時即 可以精度良好的實施削面加工。 又爲了達成上述目的,本發明乃於備有搭載半導體元 件用之凹部及配線之半導體元件搭載用基板之製造方法中 ,使上述凹部之深度小於所搭載之半導體元件之厚度,且 在該凹部之底面施予削面加工者,在上述削面加工時,切 斷對於上述搭載之半導體元件之配線之一部份,而使該配 線之端部到著於以削面加工所形成之凹部之邊緣部爲其特 徵由而凹部之邊緣部之加工精度會提高。 依本發明時可形成可以收容半導體元件之凹部,同時 可形成對應於半導體元件之連接之微細配線,合乎於面陣 列型半導體封裝,利用此技術之半導體封裝件乃適合於 C S P ( Chip Scale Package ) · F B G A ( Fine Pitch Ball Grid Array ) * B G A ( Ball Grid Array ) · L G A (Land Grid Array )等。
(請先《讀背面之注意事項再填爲本頁W 本紙張尺度適用中國囷家標準{ CNS ) A4規格(2丨0X297公釐) -10- 經濟部中央標準局員工消費合作社印聚 」4 ί9了9 7 Α7 _ Β7五、發明説明(8 ) (實施發明之最良形態) 參照圖1〜圖4說明適用本發明之半導體裝置之實施 形態。又本發明並不侷限於下述之形態。 依本發明之半導體裝置乃如各圖所示,具備有,半導 體元件(半導體晶片)1 |及備有用於搭載半導體晶片1 用之凹部或貫穿孔部之絕緣基板7,及電氣的連接於f形 成於絕緣基板7之表面之半導體晶片•同時在實裝時實施 與外部之連接之外部電極5,以及密封了收容半導體晶片 1之凹部或貧穿孔部之密封樹脂4· 本實施形態之半導體裝置上,再設有電氣的連接半導 體晶片1及外部電極5之配線2 ·此配線2乃由:連接有 爲與半導體晶片1連接用之引線3之內連接端子部,及連 接於外部電極5之外部端子連接部,及由該內連接端子部 與外部連接端子部之間之配線部所構成,上述內連接端子 部與上述外部連接端子部之間設有級階高低差。 本例中•連接引線3與外部電極5之間之配線2乃採 用從配置外部電極5之基板表層部到上述凹部壁面或底面 之表層部地連續的埋入之方式。又半導體晶片1·引線3 ,引線3與配線2之連接部(內連接端子部),及配線2 之主要部份或全部之部份均據位於上述凹部內,而由密封 樹脂4而予以密封。 又圖1〜圖4中,標號6乃設於絕緣基板7之表面之 表面層,標號8係設於絕緣基板7之背面側之金屬板。 上述半導體裝置及半導體元件搭載用基板乃具有至少 _----------------訂------^ ί (請先《讀背面之注意事項再填寫本w ) 本紙張尺度逍用中國國家梂隼(CNS ) Α4说格(210X29?公釐) -11 - 經濟部中央樣準局貝工消費合作社印製 f 419797 , A7 B7_五、發明説明(9 ) 包含有第1之金屬層,及做爲該載置層之機能之第2金展 層之多層構造。將全部由金屬所構成之可能抽拉加工之配 線構成體接著於樹脂基板,同時在該樹脂基板上形成,備 有預先規定之傾斜角度範圍內之坡度之壁面之上述凹部’ 留存上述之第1金屬層而去除其他之金屬層,由而沿著該 基板表面至上述凹部之基板壁面地配置形成,埋入於上述 基板表面及上述凹部之基板壁面之,由:連接於設置於上 述凹部所開口側之該基板表面之外部連接端子之外部連接 端子部*及與上述搭載之半導體元件連接之內連接端子部 ,以及上述外部連接端子部與上述內連接端子部之間之配 線部所構成之配線,而製造。 將上述可能抽拉加工之配線構成體壓接,接著於樹脂 基板,留存第1之金靥層而去除其他金屬層時•第1之金 屬層之配線之不接觸於其他之金屬層之3面乃被埋入於樹 脂基板,接觸於配線之其他之金靥層之1面乃以樹脂基板 之同一面地會露出,本發明中,配線之埋入乃代表下述之 意義。 上述可能抽拉加工之配線構成體中,該第1之金屬層 之配線之接觸於其他之金屬層之配線面(a )之寬度乃與 配線面(a )之相反面之配線面(b )之寬度相比較時會 變大。本發明中寬度大之配線(a )之面露出,以此面可 供端子之用,因此可以使每單位面積之配線密度增大,可 能達高密度化。 關於可能抽拉加工之配線構成體乃以,至少包含做爲 <請先W讀背面之注意事項再填寫本萸) 本紙張尺度適用中國國家#準(CNS ) A4洗格(210X297公嫠) -12- 419797 A7 經濟部中央標隼局員工消費合作社印装 B7_五、發明説明(10 ) 配線之機能之第1金靥層及做爲其載置層之機能之第2金 屬層之多層構造之方式,或由:一片之金屬箔之一面介著 規定之抗蝕劑花樣施予半蝕刻而形成配線而做爲配線之機 能之第1金屬層,以及做爲其載置層之機能之第2金屬層 所成之構造亦可以》 將上述可能抽拉加工之配線構成體壓接於樹脂基板而 予以接著,留存第1之金屬層而去除其他之金屬層時留存 其他之金屬層之一部份,例如內連接端子部,外部連接端 子部之處所等情形亦可以。 上述凹部乃以對應於它之凸形之壓製成形者,將它本 身或該凹部再加以削面加工以資形成供半導體晶片1之收 容部之半導體元件收容部。又凹部即以設置複數之級階方 式亦可。 又對上述凹部或將該凹部予以削面加工而形成之半導 體元件元件收容部之深度乃使之大於所搭載之半導體晶片 1之厚度爲宜β 又對於上述凹部施予削面加工時,即施予該削面加工 之後才去除其他之金靥層(載置層)之構成亦可以。 又本實施形態中,設置配線2之傾斜部之傾斜角度乃 定於在下面詳述之該裝置用基板之製造方法之對應於製造 條件地予以設置之預先規定之角度範圍內。 更具體的說,上述凹部壁面之傾斜角度定爲5〜4 0 度以下,又更合宜爲5〜2 5度,又最合宜爲5〜1 8度 ,此傾斜角度乃不但是對應於使用於壓製加工之沖壓模加 (婧先閲讀背面之注意事項再填寫本黃> 訂 Λ 本紙張尺度速用中國國家標準(CNS ) Α4規格(210X297公釐) -13 - 經濟部中央標窣局貝工消费合作社印装 1 419797 A7 _ B7_五、發明説明(11 ) 工之模突起部之形狀,也對應於形成於配線2所使用之可 能抽拉加工之配線構成體(轉印用金屬箔)之物性及凹s/ 壓製成型之製造條件等所決定•傾斜角度乃代表最大傾斜 角度》 又使用傾斜部之高度G及水平距離L來表示時(參照 圖1 )即,關於本實施形態之半導體裝置之傾斜部份即 1.5<L/G<10。 更合宜爲2<L/G<10,最合宜爲3<L/G< 10。 又上述級階之深度乃以應收容之半導體晶片1之厚度 之3 0 %爲宜。 半導體晶片1之厚度一般係〇 . 2乃至0 . 5mm所 以級階深度至少須要0.06乃至0.15mm* 級階之深度乃由電極5之高度也不同,如圖1〜圖4 所示以焊錫球做爲外部電極5時,由焊錫球之大小而餘裕 度將不同,例如焊錫球之直徑爲0 . 7mm程度時,實施 低的引線連接,將密封樹脂4之高度抑制於0.2mm程 度即可充分保持封裝與母基板之間隔*惟焊錫球之直徑爲 0 . 4mm以下時,即不設凹部而保持封裝(殻體)與母 基板之間隔會很困難* 又不使用焊錫球之LGA ( Land Grid Array )時須在 凹部內設置引線連接部。 在半導體晶片1之絕緣基板7上,如設正方形長方形 之級階高度差時,其角隅部最容易破斷》又雖不至於破斷 t讀先閲讀背面之注$項再填寫本買) —衣. 订 本紙張尺度適用中國國家糅準(CNS > A4規格(2丨0X297公釐} · 14 - A7 B7 經濟部中央橾率局貝工消費合作杜印製 五、發明説明(12 ) 也受很大的變形,因此在於角隅部設配線時會引起長期時 可靠性會有問題之可能,所以在該處不設配線爲宜,如果 需在角隅部設配線,角隅部上設R即可以》 又在絕緣基板7之凹部,對於該基板之厚度方向能位 於中央部地搭載半導體晶片1»因此可以當在發生溫度循 環時之該半導體裝置之蹺變抑制於最小· 另一方面將半導體元件由中央部偏倚地搭載時*乃與 基板之剛性與密封樹脂之硬化收縮量有關係,在基板厚度 之3 0 %之偏倚之情形下》仍然可確保可靠性。 又半導體晶片1之收容部乃,在藉壓製加工之凹部形 成再加上例如圖1或圖4所示,對於凹部內再施予削面加 工而可製作種種規格之半導體元件搭載用基板,削面加工 乃在印刷配線基板上一般性的實施者,因此藉端銑刀而機 械的實施•加工尺寸即XY Z方向均能精密地控制。 本實施形態時,削面加工深度需要維持於收容晶片之 厚度之0.5倍至2.5倍之範圍內。這是受引線接觸之 容易性之關係。在於高度低之低環引線連接時,晶片側連 接位置與基板側連接位置之高度乃變化少者爲宜。 削面加工面之狀態會影響至半導體晶片1之接著及密 封樹脂4之接觸。以布狀之連續玻璃纖維來形成搭載半導 體晶片1用之絕緣基板7時,在削面加工面而玻璃纖維及 樹脂有剝離之情形|在此情形時,對於削面加工面之密封 樹脂或模連接樹脂之濡順性不佳,接著力弱。不織布時即 其玻璃纖維乃短纖維,其削面加工面平滑,所以對於削面 « 背. 面' 之 注
I 訂 \ 本纸張尺度逍用中國國家揉準(CNS ) A4現格(210X 297公釐} - 15- 經濟部中央標準局貝工消费合作社印製 A7 B7_五、發明説明(13 ) 加工面之密封樹脂或模連接樹脂之濡順性良好’接著力強 〇 關於製造方法之詳狀將於下面再說明。 再者,亦可以在絕緣基板7之中心部形成收容半導體 元件不充分厚度之凹部及配線,再對於該凹部施予削面加 工於削面加工時切斷配線2之一部份,使配線2之端部能 到達於藉由削面加工所形成之凹部之.構成亦可。 又如圖3所示,在絕緣基板7之中心部形成可收容複 數之元件之凹部及配線2,在該凹部搭載複數之半導體元 件或受動元件等之構成亦可以。配線2乃使用於凹部內之 半導體晶片間之配線及凹部與凹部外之配線* 再者,如在凹部之壓製形成時,將金屬板設置於背面 側時即同時成一體地形成具有散熱層等之機能之可能之金 屬部。 又如圖4所示,在安裝於絕緣基板7之背面之金屬板 8實施削面加工,在削面加工之凹部之底面露出金屬層之 構成亦可以。在爲了露出金屬層之削面加工上採用端銑刀 時須對金屬面銑進,所以須要加厚金屬板8,使用薄的金 屬層時,實質上採用端銑刀加工時板厚精度之補正很困難 |惟單獨使用或併用雷射加工,電漿加工*樹脂蝕刻加工 而可製作。又對於須削面加工之部份予以挖空加工*接著 別的基板或金屬板來形成亦可以》 下面參照圖5〜圖8說明本實施形態之半導體裝置之 製造方法。 (请先聞讀背面之注意事項再填寫本肓) 本纸張尺度適用中囷國家標準(CNS ) A4規格{ 210X297公釐)--J6- 經濟部中央樣準扃負工消费合作杜印製 A7 B7五、發明説明(Η ) 說明第1之例 依本例之製造方法中’首先爲形成包含配線2之配線 用之轉印用金靥箔而使用例如圖5或圖6所示,在厚度 3 5 pm之銅箔(載置層)1 〇上’以電鍍形成〇 · 5 Aim之錬層1 1,又再形成之銅范12之二層構造 箔。此銅箔乃日本電解(株)所製。- 又本發明中轉印用金靥箔乃只要全部以金屬所構成不 含一些樹脂等:即可上述構造以外者亦無妨。即轉印用金屬 箔至少具有載置層(本例中銅箔10),及配線層(本例 中銅層1 2 )即足,載置層與配線層爲由同種之金廇所構 成時,即於層間設置由不同種之金靥所成之遮屏層(本例 中鎳合金11),又載置層乃在後過種中以蝕刻來去除。 載置層亦可留存一部份應用做端子之用。 又轉印用金屬箔乃須具有於製程溫度領域(壓製溫度 150 °C〜250 °C)中,2%以上之破斷延伸率(破斷 延伸率乃100%以下爲宜)* 轉印用金屬箔乃規定其載置層之厚度以0 . 0 1 〇 mm〜〇 . 050mm之範圍*如果比它薄,即處理上困 難。比它厚即很難順從於壓製模之形狀。載置層乃在轉印 過程之壓製之直前,將沒有形成配線之面施予前面蝕刻, 使之做成較薄者》 本例中,將供配線構件之厚度5 //m之銅層1 2,藉 由通常之光致抗蝕劑法形成抗蝕劑圖樣,而施予蝕刻,蝕 ^ ---------^------iT---------------- (請先《讀背面之注$項再填寫本頁) 本紙張尺度逋用中8國家標準(CNS ) A4规格(210X297公釐> 17 · 經濟部中央標準局員工消费合作社印製 '419797 A7 __B7___五、發明説明(15 ) 刻液需具有可蝕刻銅,不蝕刻鎳之選擇性’在印刷基板業 適用之鹸性蝕刻液即很合宜,厚度3 5 之載置層1 0 以抗蝕劑來防止其受蝕刻。 以圖7所示之構成,溫度180t壓力2·5kg/ cm2,二小時加熱加壓備有圖樣之銅箔1 0〜1 2 >圖7 中,在沖壓上模1 3與沖壓下模1 7之間,由上依序配置 了複數之鋁箔1 8,三層構造之具有.圖樣之銅箔(銅箔 10,鎳合金11,銅配線12),複數之玻瑀布含浸叠 層體1 4,不織布含浸叠層體1 5 *玻璃布含浸叠層體 1 4,以及用做金屬板之銅箔1 6之構成》 沖壓上模1 3之突起部1 3 a乃其斷面呈台形形狀, 其高度0 . 1 5mm *其側面坡度角度爲45度。在模與 銅箔1 6之間夾三張厚度2 5 之鋁箔1 8做爲緩衝層 ,而施予壓製加工,含浸疊層體乃使用玻璃布等含浸了耐 熱環氧樹脂之日立化成工業(株)製者》 本例中厚度0 . 1mm之玻璃布含澄叠層體14 —共 用八張,又使用玻璃纖維之厚度0.2mm之不織布含浸 疊層體1 5 —張,此不織布含浸叠層體係插入於玻璃布含 浸叠層體之6張與7張之間*以此條件所製作之玻璃環境 基板乃供切取多數個單元之用,多數地形成有同一配線及 凹部,將它以前述之鹼性蝕刻劑而全面地蝕刻去除載置銅 箔1 0,接著以鎳選擇蝕刻液而蝕刻去除鎳層1 1。 由以上之條件而在於,於厚度1.〇mm之板上備有 0 . 1 5mm之凹部,在包含凹部之表面層連續地形成配 本紙張又度逍用中圉國家樣準(CNS ) A4洗格(210X297公釐)~. 18- 先閲請背面之注意事項再填寫本頁) 訂. 經濟部中央標準局貝工消费合作社印«. ! 419797 a? _ B7_五、發明説明(16 > 線,對此基板再以端銑刀裝置而,從凹部而調整深度起見 ,再銑製到0 · 5 5mm深度,加工成可裝置半導體晶片 。以通常之方法設置焊錫抗蝕劑層,在端子部電鍍鎳1 5 //m,金 0 . 厚度。 於是在該凹部接著厚度0.28mm之半導體晶片1 ,以引線連接來連接。以液狀樹脂4來密封半導體晶片1 與引線連接部(引線3及配線2之內.連接端子部),裝置 焊錫球5之後切斷分離成個片形成半導體裝置。 以上述之製造方法可獲得例如圖1所示之構造,依本 構造時可製造近乎晶片尺寸之比較小之封裝件,可製作晶 片尺寸之封裝件(CSP)。 說明第2之例 在本例之製造方法中,亦準備,厚度3 5 之銅箔 (載置箔)上,以電鍍形成05#m之鎳層•又形成5 之銅層之三層構造箔,此銅層乃日本電解(株)製。 對於上述厚度5 jt/m之銅層,藉由通常之光致抗蝕劑 法形成抗蝕劑圖樣而施予蝕刻*蝕刻劑液乃須具有對鎳不 蝕刻對銅蝕刻之選擇性,在印刷基板業常用之鹼性蝕刻劑 乃很適宜,厚度3 5 之載置箔以抗蝕劑來保護使之不 會被蝕刻。 以圖8所示之構成,將由銅箔1 0,鎳合金1 1及銅 層1 2所構成之具有圖樣之銅箔,以溫度1 8 0°C,壓力 2 5 k g / c m 2加熱加壓2小時。 本纸張尺度速用中國困家樣準(CNS ) A4規格(2丨0X297公釐)~~- 19- nf ^^1 m ^—t I ^^^1 i 1··^*J - . (诗先聞讀背面之注項再填寫本頁) 419 了 97 A7 B7 經濟部中央標準局貝工消费合作社印策 五、發明説明(17 ) 圖8表示,在沖壓上模1 3與沖壓下模i 7之間配置 了銘箱1 8 ’三層構造之具有圖樣之銅箔(銅箔1 〇 ’鎳 合金11’銅層12),玻璃布含浸叠層體14,具有多 數之挖空部之含浸叠層體1 9,複數之玻璃布含浸疊層體 14 ’以及做爲金屬板之銅箔16上構成。 沖壓上模1 3之突起部之高度爲0 . 5mm,該側面 之坡度之傾斜角度乃以3 0度來製作.,模與銅箔之間夾入 厚度2 5 /zm之鋁箔一張做爲緩衝層而予以壓製。 含浸叠層體乃使用在玻璃布含浸了耐熱環氧樹脂之日 立化成工業(株)製者。 製作挖空相當於上述壓製上模13之突起部之部份之 含浸疊層體,而將相當於突起部之高度之份用做層構成* 本例之突起部高度0 . 5mm時,使用厚度0 . 1mm之 挖空之含浸叠層體五張,沒有挖空之含浸叠層體五張。 以上述之條件所製作之玻璃環氧基板乃供採取多個單 元之用,多數地形成同一配線及凹部,將它以前述之鹸性 餓刻劑而對搭載銅箔1 0施予蝕刻全面的予以去除。接著 以鎳選擇蝕刻液而蝕刻去除鎳層1 1 · 由上述形成厚度lmm之板備有深度0.5mm之凹 部,而可在包含凹部之表面層連續的形成配線•以通常之 方法設置焊錫抗蝕劑層’而在端子部電鍍了鎳5 //m,金 0 . 5 仁 m « 將半導體晶片1接著於該凹部’而以引線連接來連接 ,以液狀樹脂4來密封晶片及引線連接部’裝置焊錫球5 ---------*米------"*------Λ {讀先聞讀背面之注意事項再填寫本頁) 本紙張尺度逋用中國國家橾準(CNS)A4规格(210x297公釐)-20- 4 丨 9797 A7 B7五、發明説明(18) 之後切斷基板*使之成爲個片之半導體裝置。 依本例之製造方法即可獲得例如圖2或圖3所示,在 基板之背面再安裝了金屬板之構造,依本例之構造即由於 傾斜部之傾斜角度小,因此傾斜部變長,而封裝尺寸會變 大,惟不需要削面過程由而可能低成本化,又如圖3所示 ,具有收容之複數之晶片,該晶片間之配線也同時可能形 成之效果· 說明第3之例' 在本例之製造方法中,準備在厚度3 5 jum之銅箔( 載置箔)上以電鍍形成0 . 5jum之鎳層,又形成5em 之銅層之三層構造箔,此銅箔乃曰本電解(株)製者。 對於上述厚度5 之銅層,藉由通常之光致抗蝕劑 法形成抗蝕劑圖樣而施予蝕刻,蝕刻劑液乃須具有對鎳不 蝕刻對銅蝕刻之選擇性蝕刻,在印刷基板業常用之鹼性蝕 刻劑乃很適宜,厚度3 5 jt/m之載置箔即以抗蝕劑來保護 使之不會被蝕刻。 以圖9所示之構成,將此具有圖樣之銅箔,在溫度 180°C,壓力25kg/cm2加熱加壓二小時。 圖9所示,在於沖壓上模1 3與沖壓下模1 7之間, 由上方依序配置鋁箔1 8,三層構造之具有圖樣之銅箔( 銅箔10,鎳合金11,銅層12),複數之玻璃布含浸 疊積體1 4,1 9及做爲金屬板之銅板1 6 /之構成。 模之突起部之高度爲0 . 2 0mm,側面之坡度之傾 本纸張尺度適用中SS家揉準(CNS ) A4洗格(210X297公釐)-21 - 經濟部中央標準局員工消费合作社印製 A7 __B7__五、發明説明(19 ) 斜角度即以3 0度來製作,在模與銅箔之間夾入厚度 2 5 2之鋁箔1 8—張做爲緩衝層而施予壓製加工· 含浸叠層體即在玻璃布中含浸耐熱環氧樹脂之日立化 成工業(株)製者,使用厚度〇 . 1mm之含浸叠層體六 張,在第二張及第三張之含浸叠層體1 9挖空加工相當於 模突起部。又在基板之背面側配置了厚度0 . 4 Omm之 施予接著粗糙化處理之銅板而施予壓.製加工,壓製加工後 之總厚度即1.0mm。 依上述條件所製作之玻璃環氧基板乃做成可切成多數 個單元,多數地形成同一配線及凹部,將它以前述之鹼性 蝕刻劑來蝕刻載置銅箔而全面地予以去除。接著以鎳選擇 蝕刻液來蝕刻鎳層而去除鎳層。 依上述而得於形成在厚度1.0mm之板上,具有深 度0 . 2 0mm之凹部,而含有凹部之表面層連續的形成 配線。又以端銑刀裝置將此基板銑製到0.65mm深度 ,加工成可以裝置半導體晶片狀,以通常之方法設置焊錫 抗蝕劑層,而在端子部電鍍鎳5 //m,金0 . 5 jwm之厚 度。 在該凹部接著半導體晶片而以引線連接來做連接,以 液狀樹脂4來密封晶片及引線連接部,裝置焊錫球5之後 ,切斷分離成個片做成半導體裝置。 依本例之製造方法即可獲得例如圖4所示之構造,依 本構造時,即以一括壓製加工而可能做散熱板之組合’可 以提供可達成低成本’高可靠性’低廉’很容易使設計及 HI ^^^1 ^ur ^^^1 HI m In ^^^1 n^i 1^1 ^^^1 -. ^ . (诗先M讀背面之注意事項再填寫本頁) 本紙張尺A逍用中®國家橾率(CNS ) A4規格(210X297公釐)-22 - 經濟部中央標準局貝工消費合作社印«. A7 B7___五、發明説明(2〇 ) 製造方法之標準化之搭載半導體元件之半導體元件搭載用 基板及其製造方法,以及在半導體元件搭載用基板上實裝 了半導體元件之半導體裝置。 下面參照圖10〜圖16說明依本發明之半導體裝置 ,基板及製造方法之其他實施形態" 本實施形態之半導體裝置即在配線基板之一部份設置 凹部,而在此凹部裝置半導體晶片而成之半導體裝置’在 配線基板之包含凹部之配線基板表層部埋入有連續之配線 導體》 更具體的說明之,即,在具有高度不同之二個以上之 表層部之配線基板中,例如如圖1 0所示,在第1之表層 設置,與外部連接端子5連接之外部連接端子部,在第2 之表層部設匱與半導體晶片1連接之內連接端子部,第1 之表層部與第2表層部間有0.05mm以上之級階高度 差,在第1之表層部及第2之表層部及其中間部之表層埋 入了連續之配線導體而形成配線2之配線基板。 此配線基板乃由在銅等之金靥箔設置配線導體,而在 該金屣箔接著樹脂層之時同時地形成凹部之製造法而可實 現· 又實現它之方法有,疊合設有配線導體之金屬箔及含 浸樹脂之複數之玻璃布而予以壓縮,形成凹部之配線基板 之製造方法中,預先去除對應於凹部之玻璃布之一部份之 後予以壓縮而可製造。 又本實施形態之其他之態樣乃,在備有凹部之配線基 ---------.农-- -, -\ _ (請先聞讀背面之注意事項再填寫本頁) 訂 本紙張尺度適用中國國家橾準(CNS ) A4规格(210X297公釐)· 23 - i 419797 經濟部中夬標準局負工消費合作社印裝 A7 B7五、發明説明(21〉 板中,如圖1 1所示,在引線連接部及晶片接著部之二級 階地形成凹部之配線基板及其製造方法’在此形成二級階 之凹部之方法中第1級階乃使用備有凸部之沖壓模而壓縮 含浸(樹脂)叠層體而形成凹部,而第二級階即以削面加 工而可形成。 * 在一張之配線基板設置多數之凹部,而在各凹部裝置 晶片,以密封樹脂’裝置焊錫球後,.施予切斷分離由而可 以製造半導體裝置。 圖1 0〜1 3即本實施形態之典型的半導體裝置之剖 面圖- 標號1爲半導體晶片,2爲配線,3爲引線,4爲密 封用樹脂,5爲外部端子電極,6爲表面絕緣層* 7爲絕 緣基板,8爲金屬板,9爲絕緣板。 如圖1 1所示,凹部之一部份乃貫穿孔亦可以,此半 導體裝置乃如圖1 2,1 3所示,背面即得於金屬板8 ’ 絕緣板9來支撐。 以圖1 4說明依本實施形態之半導體裝置之製造方法 之一例。 準備在厚度3 5 之銅箔(搭載箔曰本電解(株) 製)10上,以電鍍形成0 _ 5jum之鎳層11,又形成 5 jum之三層構造箔。以通常之光致抗蝕劑法形成抗蝕劑 圖樣施予蝕刻形成配線導體1 2。 蝕刻液乃須要具有不能蝕刻鎳而可蝕刻銅之選擇性, 在印刷基板業界廣用之鹸性蝕刻液即很合宣’厚度3 5 ---------.衣------訂------ΛΊ -- .Λ - / {請先W讀背面之注意事項再填寫本頁) 本紙張尺度逍用中國园家揉準(CNS ) A4规格(210X297公釐)-24 - 經濟部中央標隼局工消費合作杜印製 4 1 9 7 q 7 ' A7 _ B7_五、發明説明(22 ) 之載置箔即以抗蝕劑保護使之不會被蝕刻。 以圖1 4所示之構成,對於此具有圖樣(配線導體 1 2 )之銅箔在溫度1 8 0°C壓力2 5 k g/cm2加熱加 壓二小時。 模1 3之突起部爲0 . 1 5mm,突起部之坡度即以 9 0度來製作. 在模1 3,1 7與銅箔1 0,1.6之間插入厚度50 之鐵氟龍片(杜邦製)(不圖示)而加以壓製。含浸 叠層體(不控空)1 4即使用對玻璃布含浸耐熱環氧樹脂 之曰立化成(株)製* 以此條件所製作之玻璃環氧基板乃採用可切取多數個 單元之方式,多數地形成有同一配線及凹部*以上述之鹸 性蝕刻液而對載匱箔施以蝕刻全面地予以去除。 接著以鎳選擇蝕刻液而對鎳層施予蝕刻去除。 以上述之條件在厚度1mm之基板備有0 . 1 5mm 之凹部,而在包含凹部之表面層連續地形成配線。對於此 基板又以銑刀裝置而銑製0.5mm之深度,加工成可裝 置半導體晶片1狀後,切斷成個片,將半導體晶片接著於 凹部,以引線連接方式連接,以液狀樹脂密封半導體晶片 1及引線連接部製成半導體裝置。 參照圖15說明依本實施形態之製造方法之其他例。 將如上述圖1 4之例同樣之具有圖樣之銅箔1 〇 ·使 用圖15所示之構造,以溫度180乞·壓力25kg/ cm2加熱加壓二小時。本例中模13之突起部爲0.5 ‘ ---------衣-- (婧先W1*背面之注意事項再填寫本頁) -訂 本紙張尺度適用中國困家標準(CNS } A4规《格(210X297公釐)-25- 鲤濟部中央橾準局貝工消费合作社印製 4^9797 a? __Β7__五、發明説明(23 ) mm,突起部之坡度爲4 5度來製作。 在模13,17與銅箔10,16之間插入厚度50 //m之鐵氟龍片(杜邦製)做爲緩衝層而施予壓製· 含浸(樹脂)叠層體1 4即使用在玻璃布含浸耐熱環 氧樹脂之日立化成(株)製。製作了挖空相當於模突起部 之部份之含浸叠層體15,而將相當於突起部之高度份做 爲層構成。 如本例,突起部高度0 · 5mm時即使用厚度0 . 1 m m之挖空含浸叠層體1 5五張,及沒有挖空之含浸叠層 體1 4五張。 依此條件所製作之玻璃環氧樹脂基板係供切取多數個 單元者,形成有多數之同一配線及凹部。將它以前述之鹸 性蝕刻液全面地去除載置銅箔*接著以鎳選擇蝕刻液而蝕 刻去除鎳層 以上述條件在厚度lmm之基板工具有0 . 5 mm深 之凹部之包含該凹部之表面層連續的形成配線,於凹部接 著半導體晶片1 ,以引線連接方式連接,以液狀樹脂密封 半導體晶片1及引線連接部,裝置焊錫球5之後,切斷基 板做成個片之半導體裝置。 參照圖16說明依本實施形態之製造方法之其他例子 〇 將上述圖1 4之例之同樣之具有圖樣之銅箔1 0,以 圖1 6所示之構成,以溫度1 80°C,壓力25kg/ c in 2加熱加壓二小時。 ---------农-- (請先聞讀背面之注意Ϋ項再填寫本頁) 訂 本紙張尺度逍用中國國家揉準(CNS ) A4規格(210X297公釐)· 26 - A7 B7 419797 五、發明说明(24 ) 模13之突起部爲0·5mm,突起部之坡度爲45 度來製作。 n ^^1 ί i^v ^^1 HI I m ^^^1 ., ·-,- , (讀先《讀背面之注意事項再填寫本頁) 模13,17與銅箔10,16之間插入厚度50 //m之鐵氟龍片(杜邦製)(不圖示)而施予壓製,含浸 疊層體乃使用,在玻璃布含浸耐熱環氧樹脂之曰立化成( 株)製。 對於厚度0 · 5mm之玻璃環氧.基板1 8 >挖空相當 於模突起部之部份。此時將厚度0 · 1 mm之不挖空之含 浸疊層體1 4置於一張玻璃環氧基板1 8 -與具有圖樣之 銅箔1 0之間,在玻璃環氧基板1 8 /之下部即使用三張 含浸叠層體1 4。 依此種條件所製作之玻璃環氧基板係採用可切成多數 之個片單元,多數的形成同一配線及凹部》將它以上述之 鹼性蝕刻液而對載置銅箔施予蝕刻而全面地予以去除。接 著以鎳選擇蝕刻液來去除鎳層。 經濟部中央標準局貝工消费合作社印装 以上述之條件,在厚度lmm之板,備有0.5mm 之深度,包含凹部之表面層連續地形成了配線,在其凹部 接著半導體晶片1,以引線連接方式連接,以液狀樹脂來 密封半導體晶片1及引線連接部,裝置焊錫球之後,切斷 基板製作爲個片之半導體裝置。 依以上之本實施形態時,即得以簡單的構造且以簡單 的製程,以低成本即可製造半導體裝置。 下面參照圖1 7〜圖2 0說明依本發明之半導體裝置 ,基板及製造方法之其他之實施形態。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)-27 - 經濟部中央標準局員工消費合作社印装 * 419797 A/ ________B7_五、發明説明(25〉 依本實施形態之半導體裝置乃,如圖1 7所示*具備 有:半導體晶片1,及具備用於搭載半導體晶圓1用之半 導體元件收容部之絕緣基板7,及電氣的連接於形成於絕 緣基板7之表面之半導體晶片1,同時實裝時與外部連接 之外部電極5,以密封收容半導體晶片1之半導體收容部 之密封樹脂4,再具備在於半導體晶片1連接用之引線3 與外部電極5之間*設置級階高度差用於連接該級階高 度差間之沿著傾斜部所配置之配線2。又圖7之標號6乃 表示形成於絕緣基板7之表面之表面絕緣層。 本實施形態之半導體裝置乃例如以下述之圖2 0之製 造方法所製造之具有凹部之半導體元件搭載用基板上,再 對於該凹面之底面施予削面加工來形成用於搭載半導體晶 片1之半導體元件收容部。 又基板之凹部之壁面傾斜角度即使之較4 5度緩和之 角度《此傾斜角度乃由用於沖壓成型之模之突起部之傾斜 角度,用於轉印之銅箔(載置層)1 0之剛性,沖壓壓力 之平衡等所決定者。 本實施形態之半導體裝置並不侷限於圖1 7之例》例 如如圖1 8所示,不在凹部壁面而是在於凹部之底面設置 配線2同時在其下方夾著絕緣層而設置了接地層18 0 1 之多層構造亦可以,又具備連接接地層1 8 0 1與外部電 極5之層間連接部1 8 0 2之構成亦可以。 本實施形態中之接地層1 8 0 1之形成方法及層間連 接之方法並不特別限定•例如將做爲接地層1 8 0 1之銅 本紙i尺度適用中圃國家搮準(CNS > A4规格(210X297公釐)~~.98 - ---------..衣------訂-------t,Y- - * ·-. . <請先Μ讀背面之注意事項再填寫本頁) 419797 A7 B7 經濟部中央標準局貝工消費合作杜印製 五、發明説明(26 ) 箔或銅圖樣,與形成之配線基板對向’而在其間夾入含浸 樹脂疊層體等之絕緣接著片’再疊層含浸樹脂疊層體施予 壓製形成多層構造之基板。 參照圖1 9,圖2 0說明依本實施形態之半導體元件 搭載用基板之製造方法之例子· 本實施形態之製造方法中與上述二個實施形態之製造 方法其基本的構成乃同樣。下面即主要對於不同部份加以 說明,對於同樣部份即省略其說明* 又在本例之製造方法中乃與上述實施形態一樣,該形 成配線2用之轉印用金饜箔而使用由厚度2 5 之銅箔 (載置層)1 0,及成爲配線層之銅層1 2 *以及載置層 1〇與銅層12之間之遮屏層11所構成之三層構造箔, 又在圖中將11,12之二層合併表示。 本例中即如圖1 9所示將此具有圖樣之銅箔1 0〜 12,以溫度190 °C之熱盤1901及頂板1902而 挾持,以壓力3 0 k g/cm2加熱加壓•在此例中沖壓上 模1 3與沖壓下模之間,由圖之上方依序配匱了一張鋁箔 1 8,三層構造之具有圖樣之銅箔1 0〜1 2,複數張之 含浸樹脂疊層體1905,1906以及厚度之 銅箱1 6。 沖壓上模1 3之突起部之剖面乃呈台形形狀,其側面 之坡度角度係3 0度》含浸樹脂疊層體1 9 0 6之對應於 沖壓上模1 3之部份乃被開窗,配置於由上面之第2序張 (請先《讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4规格·( 210X297公漦)-29 - 419797 經濟部中央標準局貝工消费合作社印— A7 B7_五、發明説明(27 ) 又本實施形態之製造方法並不侷限於圖19之例子, 例如如圖2 0之構成亦可以。 即以溫度1 9 OeC之熱盤1 9 0 1及頂板1 9 0 2來 挾持具有圖樣之銅箔1 ◦〜12,以壓力2〇kg/cm 來加熱加壓。本例中即在突起部側面之坡度角度爲4 5度 之沖壓上模1 3與沖壓下模1 7之間,由上面依序配置三 張包括鋁箔18,厚度35;im之銅.箔1 0之三層構造箔 10〜12,一張之開窗之含浸樹脂叠層體1906,複 數張之含浸樹脂疊層體1 9 0 5以及厚度5 之銅箔 16° 依上述圖2 0之製造方法時可製造如圖1 7所示之備 有緩和之傾斜角度之壁面之凹部之半導體裝置。 本發明之半導體元件搭載用基板乃,於具備有圖2 1 (a),圖22(b)所示之凹部之半導體元件搭載用基 板中,備有沿著該基板表面及上述凹部之基板壁面所配置 之配線,上述配線乃由:連接於配置於上述凹部所開口側 之該基板表面之外部連接端子之外部連接端子部,及與上 述搭載之半導體元件連接之內連接端子部,及上述外部連 接端子部與上述內連接端子部間之配線部而構成,上述配 線乃埋入於上述基板表面及上述凹部之基板壁面,上述內 連接端子部乃據位於上述凹部內之位置者。‘ 在圖21 (a) *圖22 (a)中,標號7爲絕緣基 板,2爲埋入於基板表面及上述凹部之基板壁面所彤成之 配線。在圖2 1 ( a )之半導體元件搭載用基板上在凹部 {讀先《讀背面之注意事項再4寫本育) i衣. 訂 本纸張尺度適用中國固家標率{ CNS } A4規格(210X297公釐)-30- 經濟部中央操準局肩工消費合作社印装 419797 A7 _B7_五、發明説明(28 ) 之中央部形成有貫穿孔. 在圖21 (b)揭示使用此基板之半導體裝置,在圖 2 1 (b)中,標號1即接著於基板之狀態地搭載之半導 體元件,4係密封樹脂,5係外部連接端子。在基板凹部 形成有配線之內連接端子部,以樹脂來密封•此基板即以 前述之方法而可製造。 圖2 2 ( a )之半導體元件搭載用基板上凹部乃形成 於兩端之構造,以可切成多數個個體之單元來製造基板, 由凹部來切斷來製造出個體單元,在圖22 (b)掲示使 用此基板之半導體裝置,圖22(b)中,標號1乃以接 著於基板之狀態而搭載之半導體元件,4係密封樹脂,5 係外部連接端子在基板兩端之凹部形成有配線之內連接端 子部,而以樹脂密封。 依本發明半導體元件搭載用基板得於可切成多數個體 單元地,即以一括壓製製作多數個也。 圖2 3表示製造可切成多數個個體單元之半導體元件 搭載用基板之過程之壓製構成之剖面圖。標號1 3乃形成 多數之凹模13 a之沖壓上模,17乃沖壓下模,10乃 形成多數組之配線之銅箔,14乃含浸樹脂叠層體。 以圖2 3之壓製構成而在上模•下模之間加熱加壓即 由縱橫均等配置之多數之凸模1 3 a而可一括形成多數之 凹部,同時配線1 2乃由基板表面之外部連接端子部而介 經凹部之壁面而連續地埋入形成於凹部內之內連接端子部 。此時基板表面之外部連接端子部乃*由於有形成相鄰接 ---------,衣------訂------Λ 1 -.· - . ... (請先閏讀背面之注意事項再填寫本頁) 本紙乐尺度適用中國國家揉準(CNS > Α4規格(210X297公釐)· 31 ·
419T9T 娌濟部中央楯隼局兵工消费合作社印裂 A7 B7_五、發明説明(29 ) 之凹部所以均等地受張力。而將壓製前之平面之位置保持 於高精度(尺寸之高安定性)* 即由本發明之半導體元件搭載基板之可切成•多數個個 體單元之設計而不會發生外部連接端子部之位置之偏倚地 可實施凹部形成,又爲了最外側之基板’在上模1 3之緣 外周設置暫設凸模1 3 b (暫置突起部)而不但可防止最 外側基板之外部連接端子部之位置之偏倚,也可防止含浸 樹脂叠層體之樹脂之流出。又切成多數之個體單元係以7 X 7以上爲宜》 如上所述本發明乃由:包括準備備有縱横均等配置之 多數之突起部之沖壓上模,與上述突起部對準(定位)位 置之規定之配線,及由載置金屬箔所成之配線構體,含浸 樹脂疊層體,沖壓下模之壓製構成之製程,而以沖壓上模 沖壓下模之間實施壓製加工,由而在被壓製之含浸樹脂叠 層體而成之基板上一括形成多數之凹部,同時將上述規定 之配線埋入於上述基板表面及上述之凹部之基板壁面之製 程,去除上述載置金屬箔之製程,搭載半導體元件之製程 ,以樹脂密封凹部之製程,形成外部連接端子之製程,以 及將它切斷分離爲個體單元之製程而可製造半導體裝置也 (請先閲讀背面之注意事項再填寫本頁) 圖式之簡單說明 第1圖係表示本發明之半導體封裝之剖面構成之一例 之剖面圖。 本紙張尺度逋用中國國家樣準(CNS > A4规格(210X297公釐)· 32 - 經濟部中央標準局貝工消费合作社印製 I 419797 A7 B7五、發明説明(3〇 ) 第2圖係表示本發明之半導體封裝之剖面構成之他例 之剖面圖。 第3圖係表示搭載複數之半導體元件之本發明之半導 體封裝之剖面構造例之剖面圖" 第4圖係表示使之具備高散熱機能之本發明之半導體 封裝之剖面構造例之剖面圖。 第5圖係表示全部由金屬所成之抽拉可能之配線構成 體之剖面構造例之剖面圖。 第6圖係表示全部由金屬所成之抽拉可能之配線構成 體之其他剖面構造例之剖面圖。 第7圖係表示壓製成型時之材料構成,將不織布含浸 樹脂疊層體用於構成中之例子之說明圖。 第8圖係表示壓製成型時之材料構成,使用將含浸樹 脂疊層體挖空之構成時之構成之說明圖* 第9圖係表示爲了高散熱構造用之壓製成型時之材料 構成,將金屬板使用於背面之例子* 第10圖係表示本發明之半導體裝置之他例之剖面圖 〇 第11圖係表示本發明之半導體裝置之他例之剖面圖 〇 第12圖係表示本發明之半導體裝置之他例之剖面圖 第13圖係表示本發明之半導體裝置之他例之剖面圖 —^ϋ ml ^^^1 ί. n^i -' · (請先《讀背面之注意i項再填寫本頁) 本紙張尺度適用中國國家標率(CNS ) A45SJ4· ( 210X297公釐)· 33 - .41 經濟部中央橾準局貝工消费合作社印製 A7 _B7_五、發明説明(31 ) 第1 4圖係表示本發明之半導體裝置之製造法(壓製 成型)之他例之剖面圖· 第1 5圖係表示本發明之半導體裝置之製造法(壓製 成型)之他例之剖面圖。 第1 6圖係表示本發明之半導體裝置之製造法(壓製 成型)之他例之剖面圖。 第1 7圖係表示本發明之半導體裝置之他例之剖面圖 第1 8圖係表示本發明之半導體裝置之他例之剖面圖 〇 第1 9圖係表示本發明之半導體裝置之製造法(壓製 成型)之他例之剖面圖° 第2 0圖係表示本發明之半導體裝置之製造法(壓製 成型)之他例之剖面圖。 第2 1 ( a )圖係表示本發明之半導體元件搭載用基 板之他例之剖面圖。 第21(b)圖係表示本發明之半導體裝置之他例之 剖面圖· 第2 2 ( a )圖係表示本發明之半導體元件搭載用基 板之他例之剖面圖。 第2 2 ( b )圖係表示本發明之半導體裝置之他例之 剖面圖· 第2 3圖係表示本發明之半導體裝置之製造法(壓製 成型)之剖面圖。 (請先W讀背面之注意事項再填寫本頁 訂· 本紙張尺度適用中困困家標丰(CNS > A4規格(2丨0X297公藿)-34-
Claims (1)
- 經濟部中央標準局更工消费合作社印製 AS B8 C8 ____ D8六、申請專利範圍 1 · 一種半導體裝置,主要係在半導體元件搭載用基 板上形成凹部,而在該凹部搭載半導镫元件之後,以密封 用樹脂而予以密封之半導體裝置中,其特徵爲 上述半導體元件搭載用基板乃備有沿著該基板面面及 上述凹部之基板壁面所配置之配線, 上述配線乃由:連接於設置於上述凹部所開口側之該 基板表面之外部連接端子之外部連接端子部,及與上述搭 載之半導體元件連接之內連接端子部,及上述外部連接端 子部與上述內連接端子部之間之配線部,而構成, 上述配線係埋入於上述基板表面及上述凹部之基板壁 面, 上述內連接端子部乃據位於上述凹部內之位置者。 2 .如申請專利範圍第1項所述之半導體裝置,其中 上述凹部之基板壁面係備有延伸於該凹部之底面方向 之預先規定之傾斜角度範圍內之坡度者。 3 .如申請專利範圍第2項所述之半導體裝置,其中 上述凹部之基板壁面之傾斜角度在5〜4 0度之範圍 者。 4 .如申請專利範圍第2項所述之半導體裝置•其中 上述凹部之基板壁面之傾斜構造之高度G與其水平距 離之比L/G乃在1.5CL/GC10之範圍內者。 5 .如申請專利範圍第1項所述之半導體裝置,其中 上述凹部係由凸型之沖壓成形所構成者。 6 .如申請專利範圍第1項所述之半導體裝置,其中 請 先: « , 讀. 背― 面· 之 項 再 填 頁 订 本紙張尺度逍用中國國家揉準(CNS >A4规格(210x297公釐)-35- A19T97 A8B8C8DB 經濟部中央揉牟局負工消費合作社印裝 六、申請專利範園 上述凹部乃被複數階級狀地形成者* 7 .如申請專利範圍第5項所述之半導體裝置,其中 在上述凹部上設有將該凹部再予以削面加工所形成之 收容半導體元件用之半導體元件收容部者· 8 .如申請專利範圍第7項所述之半導體裝置,其中 上述削面加工而成之半導體元件收容部之深度乃大於 欲搭載之半導體元件之厚度者。 9 .如申請專利範圍第1項所述之半導體裝置•其中 據位於該基板表面位置之上述外部連接端子部與上述 凹部內之上述內連接端子部之級階差爲0.5mm以上。 1 0 .如申請專利範圍第1項所述之半導體裝置,其 中 將搭載於上述凹部之半導體元件之端子與上述內連接 端子部乃以引線連接地予以連接者。 1 1 .如申請專利範圍第1項所述之半導體裝置,其 中 將半導體元件之端子以背面饋送方式地直接連接於上 述內連接端子部者。 1 2 .如申請專利範圍第1項所述之半導體裝置,其 中 上述配線係設置於上述凹部之除了角部之壁面領域者 〇 1 3 .如申請專利範圍第1項所述之半導體裝置*其 中 本纸SUUt逋用t國»家椹準(CNS)A4规格(210x297公釐)"""-36- ,--J—----k.ί <請先《讀背面之注意事項*填寫本頁) 訂 419了97 A8 BS C8 D8 經濟部中央標準局負工消費合作社印* 夂、申請專利範園 上述凹部乃形成於該基板之主平面之略中心位置, 於上述凹部內,對於該半導體元件搭載用基板之厚度 方向之略中央地搭載半導髖元件者。 1 4 .如申請專利範圍第1項所述之半導體裝置,其 中 在上述凹部內,對於該基板之厚度方向由中央以該基 板之厚度3 0%偏倚以內地搭載半導體元件者。 1 5 ·如申請專利範圍第1項所述之半導體裝置,其 中 上述凹部乃於其底面領域備有可以收容之複數之元件 之寬度,'同時形成有對上述複數之元件之配線,而在該凹 部搭載複數之半導體元件及受動元件者。 16 .如申請專利範圍第1項所述之半導體裝置,其 中 上述配線乃利用全部由金麕所構成之可能抽拉加工之 配線構成體所形成者, 上述可能抽拉加工之配線構成體係至少含有備有構成 上述配線之第1之金屬層,及擔任該載置層之機能之第2 之金屬層之多層構造者。 1 7 . —種半導體元件搭載用基板,主要乃具備有用 於搭載半導體元件之凹部之半辫體元件搭載用基板中,其 特徵爲: 備有沿著該基板表面及上述凹部之基板壁面所配置之 配線* ---------^ — _ - * , I 一-', * {請先閲讀背面之注意事項再樣寫本頁) 訂 本紙乐尺度速用中國國家椹準(CNS ) A4优格(210X297公釐)-37- 41979 (經濟部中央標车局貝工消费合作社印装 六、申請專利範園 上述配線乃由:連接於設置於上述凹部所開口側之該 基板表面之外部連接端子之外部連接端子部,及與上述搭 載之半導體元件連接之內連接端子部,及上述外部連接端 子部與上述內連接端子部間之配線部,而構成 上述配線係埋入於上述基板表面及上述凹部之基板壁 面, 上述內連接端子部乃據位於上述凹部內之位置者。 1 8 .如申請專利範圍第1 7項所述之半導體元件搭 載用基板,其中 上述凹部之深度乃較所搭載之半導體元件之厚度小, 而將上述凹部之底面,對於該半導體元件搭載用基板 之厚度方向,由中央實施該搭載之該半導體元件之厚度之 0.5乃至2.5倍之範圍內之深度地施予削面加工者· 19.如申請專利範圍第17項所述之半導體元件搭 載用基板,其中 上述凹部之深度乃較欲搭載之半導體元件之厚度爲小 ,且對該凹部施予削面加工者, 該至少霣出之削面加工之底面爲由不織布所成之預含 浸樹脂之叠層體予以硬化而成之樹脂層者》 2 0 .如申請專利範圍第1 7項所述之半導體元件搭 載用基板,其中 上述凹部乃對於被形成之樹脂層之背面接著金屬板而 構成者。 21.—種半導體元件搭載用基板之製造方法, ---------^-- ' · . . * <請先W讀背面之注意事項再填寫本页) 訂 本紙诛尺度適用t國國家#準(CNS ) A4规格(210X297公釐)-38 · 經濟部中央標率局負工消費合作社印策 1 419797 as B8_S六、申請專利範圍 將且有,至少含有第1之金屬層及擔任該載置層之機 能之第2金屬層之多層構造之全部由金屬所構成之可能抽 拉加工之配線構成體,壓接於樹脂基板予以接著,同時在 該樹脂基板上,形成備有預先規定之傾斜角度範圍內之坡 度之壁面之凹部,而藉留存上述第1之金屜層去除其他之 金饜層,以資沿著該基板表面到上述凹部之基板壁面地配 置形成, 由:連接於設置於上述凹部所開口側之該基板表面之 外部連接端子之外部連接端子部,及與上述搭載之半導體 元件連接之內部連接端子部,及上述外部連接端子部與上 述內連接部端子間之配線部而構成*埋入於上述基板表面 及上述凹部之基板壁面之配線,爲其特徵· 2 2 .如申請專利範圍第2 1項所述之半導體搭載用 基板之製造方法,其中 上述可能抽拉加工之配線構成體之破斷延伸率爲2% 以上。 2 3 .如申請專利範圍第2 1項所述之半導體搭載用 基板之製造方法•其中 上述構成可能抽拉加工之配線構成體之上述載置層之 厚度乃在於0 . 010mm〜〇 . 050mm之範圍。 2 4 .如申請專利範圍第2 1項所述之半導體搭載用 基板之製造方法,其中 上述凹部之基板壁面之傾斜角範圍爲5度以上4 0度 以下, 表紙張XJt逍用中國面家揉準(CNS ) A4洗格(210X297公釐)-39- ^^^1 m tmj J ^^^1 11· 1^1 m- ^^^1 m·· <請先閱讀背面之注$項再填寫本頁) 9 A8 B8 C8 D8 經濟部中央揉率局貝工消费合作社印製 六、申請專利範圍 上述凹部之深度乃其所收容之半導體元件之至少3 0 %以上· 2 5 . —種半導體元件搭載用基板之製造方法, 主要係,具備有用於搭載半導體元件用之凹部及配線 之半導體元件搭載用基板之製造方法,其特徵爲: 令上述凹部之深度小於所搭載之半導體元件之厚度, 且在該底面施予削面加工, 而在於上述削面加工時,切斷上述對搭載之半導體元 件之配線之一部份,使該配線之端部到達由削面加工所形 成之凹部之端緣部者。 2 6 .如申請專利範圍第2 1項所述之半導體元件搭 載用基板之製造方法, 其中形成上述凹部之後,對於該凹部之底面施予削面 加工,在上述削面加工之後,實施上述其他金屬層之去除 者。 2 7 .如申請專利範圍第1 7項所述之半導體元件搭 載用基板•其中上述凹部之基板壁面係具備有延伸於該凹 部之底面方向之預先規定之傾斜角度範圍內之坡度者。 2 8 .如申請專利範園第2 7項所述之半導體元件搭 載用基板,其中 上述凹部基板壁面之傾斜角度爲5〜4 0度之範圍內 〇 2 9 .如申請專利範圍第2 7項所述之半導體元件搭 載用基板*其中 ^:1:!~丨,—^II <請先閱讀背面之注$項再填寫本頁) 订 本纸張尺度逋用中《«家揉準(CNS > A4规格(21 〇 X 297公釐)-40 - ^19797 經濟部中央標隼局属工消费合作社印31 A8 B8 C8 D8六、申請專利範固 上述凹部之基板壁面之傾斜構造之高度G與其水平距 離之比L/G爲1.5<L/G<10之範圍內。 3 0 ·如申請專利範圍第1 7項所述之半導體元件搭 載用基板,其中 上述凹部乃藉由凸形之沖壓成形所構成》 3 1 ·如申請專利範圍第1 7項所述之半導體元件搭 載用基板,其中 上述凹部乃複數級階地形成。 3 2 .如申請專利範圍第3 0項所述之半導體元件搭 載用基板,其中 上述凹部上,設有將該凹部再施予削面加工所形成之 爲收容半導體元件用之半導體元件收容部者· 3 3 .如申請專利範圍第3 2項所述之半導體元件搭 載用基板,其中 上述經削面加工而成之半導體元件收容部之深度乃, 較欲搭載之半導體元件之厚度大者。 3 4 .如申請專利範圍第1 7項所述之半導體元件搭 載用基k *其中 該基板表面部之上述外部連揆..端子部與上述凹部內之 ! .1-; : _ 1 上述內連接端子部之級階高度差. 0 5 m m以上。 ί Ί 3 5 . —種半導體裝置之製_,具備: ? _ · 準備;具有縱*橫均等地配多數之突起部之沖壓 用上模,與上述突起部定位*由規定之配線及置搭金屬箔 所成之配線構成體,包含預浸叠積·沖壓下模之沖壓構成 {請先W讀背面之注意事項再#寫本貰) 本紙張尺度逋用中國两家揉準(CNS ) A4规格(2丨OXM7公釐)-41 - I 419797 A8 B8 C8 D8 經濟部中失標準局貝工消費合作社印装 六、申請專利範園 之製程, 在沖壓上模與沖壓下模之間實施沖製,對於經壓製而 成之預浸叠積體之基板上,一括形成多數之凹部,同時將 上述規定之配線埋入於上述基板表面及上述凹部之基板壁 面之製程, 去除上述載置金屬箔之製程 搭載半導體元件之製程, 實施凹部之樹脂基板之製程, 形成外部連接端子之製程Pij • "!νΐΐ| 斷分離成爲個片之製程者。 \ 3 6 ·如申請專利範圍第項所述之半導體裝置之 製造 >法,其中 » 祌壓上模之周緣形成暫置突起部者。 3 7 · —種半導體元件搭載用基板,主要乃具備有凹 部之半導體元件搭載用基板中,其特徵爲, 備有,沿著該基板表面及上述凹部之基板壁面所配置 之配線, 上述配線乃由:連接於設於上述凹部所開口側之該基 板表面之外部連接端子之外部連接端子部,及與上述搭載 之半導體元件連接之內連接端子部以及上述外部連接端子 部與上述內連接端子間之配線所而構成, 上述配線乃埋入於上述基板表面及上述凹部之基板壁 面, — 上述內連接端子部內據位於上述凹部內者。 n n^i- ί- In (請先閲讀背面之注意事項再填寫本K > 本纸張尺度逍用中國國家標準(CNS ) A4規格(2丨Ο X W7公釐)-42 ·
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-
1998
- 1998-04-30 TW TW87106686A patent/TW419797B/zh not_active IP Right Cessation
- 1998-04-30 EP EP98917736A patent/EP0980096A4/en not_active Withdrawn
- 1998-04-30 US US09/423,062 patent/US6268648B1/en not_active Expired - Fee Related
- 1998-04-30 WO PCT/JP1998/001970 patent/WO1998049726A1/ja active IP Right Grant
- 1998-04-30 JP JP54683398A patent/JP3314939B2/ja not_active Expired - Fee Related
- 1998-04-30 AU AU70827/98A patent/AU7082798A/en not_active Abandoned
- 1998-04-30 CN CNB988045907A patent/CN100370602C/zh not_active Expired - Fee Related
- 1998-04-30 KR KR1019997009932A patent/KR100553281B1/ko not_active IP Right Cessation
-
2000
- 2000-09-27 HK HK00106137A patent/HK1027215A1/xx not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI567909B (zh) * | 2014-06-09 | 2017-01-21 | 三菱電機股份有限公司 | 半導體封裝件的製造方法 |
US9953844B2 (en) | 2014-06-09 | 2018-04-24 | Mitsubishi Electric Corporation | Manufacturing method of semiconductor package |
Also Published As
Publication number | Publication date |
---|---|
US6268648B1 (en) | 2001-07-31 |
KR20010020324A (ko) | 2001-03-15 |
EP0980096A1 (en) | 2000-02-16 |
CN1253662A (zh) | 2000-05-17 |
AU7082798A (en) | 1998-11-24 |
KR100553281B1 (ko) | 2006-02-22 |
HK1027215A1 (en) | 2001-01-05 |
WO1998049726A1 (fr) | 1998-11-05 |
EP0980096A4 (en) | 2005-03-09 |
JP3314939B2 (ja) | 2002-08-19 |
CN100370602C (zh) | 2008-02-20 |
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