TW201104797A - Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP - Google Patents

Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP Download PDF

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Publication number
TW201104797A
TW201104797A TW099123256A TW99123256A TW201104797A TW 201104797 A TW201104797 A TW 201104797A TW 099123256 A TW099123256 A TW 099123256A TW 99123256 A TW99123256 A TW 99123256A TW 201104797 A TW201104797 A TW 201104797A
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Taiwan
Prior art keywords
semiconductor
component
semiconductor component
die
conductive
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TW099123256A
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English (en)
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TWI508226B (zh
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Reza A Pagaila
Heap Hoe Kuan
Dioscoro A Merilo
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Stats Chippac Ltd
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    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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Description

201104797 六、發明說明： 【發明所屬之技術領域】 本發明大體上關於半導體裝置，且更明確地說，其關 於以直通矽晶穿孔鑲嵌半導體組件於基板的孔穴中用以扇 入封裝疊加的電互連之半導體裝置和方法。 【先前技術】 在現代的電子產品中經常會發現半導體裝置。半導體 裝置會有不同數量與密度的電子組件。離散半導體裝置通 常含有一種類型的電子組件，舉例來說，發光二極體（Light Emitting Diode ’ LED)、小訊號電晶體、電阻器、電容器、 電感器、以及功率金屬氧化物半導體場效電晶體（Metal
Oxide Semiconductor Field Effect Transistor，MOSFET)。整 合半導體裝置典型地含有數百個至數百萬個電子組件。整 合半導體裝置的範例包含微控制器、微處理器、電荷耦合 裝置（Charged-Coupled Device，CCD)、太陽能電池、以及 數位微鏡裝置（Digital Micro-mirror Device，DMD)。 半導體裝置會實施廣泛的功能，例如，高速計算、傳 送與接收電磁訊號、控制電子裝置、將太陽光轉換成電能、 以及產生電視顯不器的視覺投影。在娛樂領域、通訊領域、 電力轉換領$、網路領域、電腦領域以&消費性產品領域 中皆會發現半導體裝置。在軍事應用、航空、自動車、工 業控制器、以及辦公室設備中同樣會發現半導體裝置。 半導體裝置利用半導體材料的電氣特性。半導體材料 201104797 的原子結構使得可藉由施加電場或基礎電流或是經由摻雜 處理來操縱其導電性》摻雜會將雜質引入至該半導體材料 之中，以便操縱及控制該半導體裝置的傳導性。 半導體裝置含有主動式電氣結構與被動式電氣結構。 主動式結構（其包含雙極電晶體與場效電晶體）控制電流的 流動。藉由改變摻雜程度以及施加電場或基礎電流，該電 晶體會k咼或限制電流的流動。被動式結構（其包含電阻 器' 電容器、以及電感器）創造用以實施各式各樣電功能所 需要的電壓和電流之間的關係。該等被動式結構與主動式 結構會被電連接以形成讓該半導體裝置實施高速計算及其 它實用功能的電路。 半導體裝置通常會使用兩種複雜的製程來製造，也就 是，剛端製造以及後端製造，每一者皆可能涉及數百道步 驟。前端製造涉及在-半導體晶圓的表面上形成複數個晶 粒。每m通常相同並且含有藉由電連接主動式組件 和被動式組件而形成的電路。後端製造涉及從已完成的晶 圓中單體化裁切個別的晶粒並且封裝該晶粒以提供結構性 支撐及環境隔離。 半導體製造的其中-個目標便係製造 置。較小的裝置典型地會消耗較少電力，具有較高效能= 且能夠更有效地生產。&外’較小的半導體裝置還具有較 小的覆蓋面積，這係為較小的末端產品所需要的。藉由改 善前端製程可以達成較小的晶粒尺寸，從而導致具有較小 以及較兩在、度之主動式么日/生$ 4也斗，4 Λ、、且件和被動式組件的晶粒。後端製 201104797 程可以藉由改善電互連及封锭 褒材料而導致具有較小覆蓋面 積的半導體裝置封裝^ π权』復益® 在許多應用中，期望能知 互堆疊複數個半導體晶粒以 形成一堆疊的半導體封裝》 過’堆疊半導體晶粒卻同時 會增加該半導體封裝的整體尺 避尺寸與厚度。舉例來說，在包 含三或更多個堆疊晶粒的封裝中 w A ^ 装中吕亥封裝會需要.用到數塊 基板以幫助在每一個半導體ββ ι干导體曰日粒之間形成電互連線。在習 知的封裝巾’舉例來說’在形成扇人封裝叠加（Fas
Package wPaekage ’ Fi_p〇p)封裝時經常會需要用到三塊基 板’以便在頂端晶粒、中間曰斗 甲間日日粒、以及底部晶粒之間形成 必要的連接線。即使只用到一兔 1塊基板，被鑲嵌在該基板對 邊上的晶粒仍會增加封裝厚卢 衣序度並且延長傳導路徑，其會損 降電氣效能。 【發明内容】 配置中電互連堆疊半導體 ，本發明係一種製造半導 .it供一具有第一表面與 基板之該等第一表面與第 第一半導體晶粒的穿孔 ’用以形成一傳導穿孔； 穴之中；將一囊封劑沉積 第一表面上方；從該第一 囊封劑的一部分以暴露該 本發明需要在扇入封裝疊加 晶粒。據此，於其中一實施例中 體裝置的方法，其包括下面步驟 第二表面的基板；形成一貫穿該 二表面的孔穴；形成一貫穿一 (via);利用傳導材料填充該穿孔 將該第一半導體晶粒鑲嵌在該孔 於該基板及該第一半導體晶粒的 半導體日日粒的第一表面處移除該
Si 7 201104797 傳導穿孔；以及將-第二半導體晶粒鑲嵌於該第—半導體 晶粒的該第-纟面。言亥第二半導體晶粒會被電連接至該傳 導穿孔。該方法進一步包含下面步驟：將一第三半導體晶 粒鑲嵌在該第-半導體晶粒之第—表面對面的該第一半導 體晶粒之第二表面的上方。 於另-實施例中’本發明係一種製造半導體裝置的方 法，*包括下面步驟：提供一具有第一表面與第二表面的 基板；形成一f穿該基板之該等第一表面與第二表面的孔 穴；以及將一第一半導體組件鑲嵌在該孔穴之中。該第一 半導體組件具有一傳導直通矽晶穿孔（TSV)。該方法 步包含下面步驟：將-囊封劑沉積於該基板及該第一半導 體組件的第一表面上方；從該第一半導體組件的第一表面 處移除該囊封劑的一部分以暴露該傳導直通矽晶穿孔；以 及將一第二半導體組件鑲嵌於該第一半導體組件的該第— 表面。該第二半導體組件會被電連接至該傳導直通矽晶穿 孔。 曰曰 於另一實施例中，本發明係一種製造半導體裝置的方 法，其包括下面步驟：提供一具有第一表面與第二表面的 基板；形成-貫穿該基板之該等第一表面與第二表面的孔 穴；以及將一第一半導體組件鑲嵌在該孔穴的上方。該第 一半導體組件具有一傳導直通矽晶穿孔。該方法還進:步 包含下面步驟H二半導體組件鑲嵌於該第—半導體 組件的一第一表面的上方；將一囊封劑沉積於該基板及第 二半導體組件的上方；以及將一第三半導體組件鑲嵌在該 8 201104797 第一半導體組件之第一表面對面的該第一半導體組件之第 —表面的上方。 於另一實施例中，本發明係一種半導體裝_置，其包括 一基板，其具有一被形成貫穿該基板之第—表面與第二表 面的孔穴。一第一半導體組件會被鑲嵌在該孔穴之中。該 第一半導體組件具有一傳導直通矽晶穿孔。—第二半導體 組件被鑲嵌於該第一半導體組件的一第一表面的上方。一 囊封劑會被沉積於該基板及第二半導體組件的上方。一第 二半導體組件會被鑲嵌在該第一半導體組件之第一表面對 面的該第一半導體組件之第二表面的上方。 【實施方式】 下面的說明書中會參考圖式於一或多個實施例中來說 明本發明’於該等圖式十，相同的符號代表相同或相似的 元件。雖然本文會以達成本發明目的的最佳模式來說明本 發明；不過，熟習本技術的人士便會明白，本發明希望涵 蓋受到下面揭示内容及圖式支持的隨附申請專利範圍及它 們的4效物所定義的本發明的精神與範_内可能併入的替 代、修正以及等效物。 半導體裝置通常會使用兩種複雜的製程來製造：前端 製迨和後端製造。前端製造涉及在一半導體晶圓的表面上 形成複數個晶粒。該晶圓上的每一個晶粒皆含有主動式電 子組件和被動式電子組件，它們會被電連接而形成功能性 電路。主動式電子組件（例如電晶體與二極體）能夠控制電流 201104797 電感器、電阻器、 需要的電壓和電流 的流動。被動式電子組件（例如電容器、 以及變壓器）會創造用以實施電路功能所 之間的關係。 的製程步驟被 被動式組件和主動式組件會藉由一連串 形成在該半導體晶圓的表面上方，該等製程步驟包含：摻 雜、沉積、光微影w、蝕刻、以及平坦化。摻雜會藉由離 子植入或是熱擴散將雜質引入至半傳導材料之中雜製 程會修改主動式裝置中半傳導材料的導電性，將該半傳導 或是響應於電場或基礎電流來 。含有摻雜的不同類型和程度 材料轉換成絕緣體、導體， 動態改變半傳導材料傳導性 的範圍’參雜女排為必要的，以在施加一電場或基礎電流 時讓該電晶體提高或限制電流的流動。 主動式組件和被動式組件係由具有不同電氣特性的多 層材料構成。4等層能夠藉由各式各樣的沉積技術來形 成其某種程度上取決於要被沉積的材料的類型。舉例來 說’薄膜沉積可能包含：化學氣相沉積（Chemical Vap〇r
DeP〇Slti〇n，CVD)製程' 物理氣相沉積（Physical Vapor 以㈣出⑽，PVD)製程、電解質電鍵製程、以及無電極電鍍 製程。每-層通常都會被圖樣化，以便形成主動式組件、 破動式組件 '或是組件之間的電連接線的一部分。 "亥等層忐夠利用光微影術來圖樣化，其涉及在要被圖 樣化的層的上方沉積光敏材料，舉例來說，光阻。圖樣會 利用光從一光罩處被轉印至該光阻。該光阻圖樣中受到光 作用的部分會利用溶劑移除，從而露出下方層之中要被圖 10 201104797 樣化的β分。該光阻中 p ® 4 %餘h會破移除，從而留下— 已圖樣化層。或者，某4b 乃雷經哲带M U的材科會利用纟電極電鑛以 及電解質電鑛之類的 技知，藉由將該材料直接沉至 A 沉積及/或蝕刻製程所形 先則 樣化。 ㈣成的£域或空隙㈣d)之中而被圖 在一既有圖樣的上方沉積-薄臈材料可能會擴大下方 圖樣並且產生―不均勾平坦的表面。生產較小且更密2 裝的主動式組件和被動式組件需要用到均勻平坦的表面。 平坦化作用可用來從晶圓的表面處移除㈣，並且產生均 勾平坦的表面。平坦化作用涉及利用-研磨塾來研磨晶圓 的表面。纟研磨期間加入研磨的材料以及腐蝕性的化學藥 劑到晶圓的表面、结合研磨料的機械作用及化學藥劑的磨 蝕作.用來移除任何不規律的表面形狀，從而產生均勻平坦 的表面。 後端製造係指將已完成的晶圓切割或單體化裁切成個 別晶粒，並且接著封裝該晶粒，以達結構性支撐及環境隔 離的效果。為單體化裁切晶粒，晶圓會沿著該晶圓中被稱 為切割道（saw street)或切割線（scribe)的非功能性區域被刻 痕並且折斷。該晶圓會利用雷射切割工具或鋸片來進行單 體化裁切。經過單體化裁切之後，個別晶粒便會被鑲嵌至 包含接針或接觸觸墊的封裝基板’以便和其它系統組件進 行互連。被形成在該半導體晶粒上方的接觸觸墊接著會被 連接至该封裝裡面的接觸觸墊。該等電連接線可利用焊料 凸塊、短柱凸塊、導電膏、或是焊線來製成。一囊封劑或 201104797 是其它模造材料會被沉積在該封裝的上方，以提供物理性 支樓和電隔離。接著，該已完成的㈣便會被插人n 系統之中並且讓其夕备# & μ β & 丹匕糸統組件可取用該半導體裝置的功 能。 圖1說明一電子裝置5〇,其具有一晶片載體基板或是 印刷電路板（PCB)52 ’其表面上鑲嵌複數個半導體封裝。電 子裝置5G可能係某—類型的半導體封裝或是多種類型的半 導體封裝’端視應用而定。為達解釋目的，圖1中顯示不 同類型的半導體封裝。 電子裝置5G可能係_獨立系統，其會使用該等半導體 封裝來實施-或多項電功能。或者，電子裝置Μ亦可能係 較大型系統中的一子組件。舉例來說，電子裝置可能 係一圖形卡、一網路介面卡、或是能夠被插入在一電腦: 中的其它訊號處理卡。該半導體封I可能包含：微處理器、 記憶體、特定應用積體電路（AppHcati()n Speeifie加叩咖 Circuits，ASIC)、邏輯電路、類比電路、射頻電路、離散式 裝置、或是其它半導體晶粒或電子組件。 在圖1巾£Ρ刷電路板52提供一通用基板，用以結構 性支撐及電互連被鑲嵌在該印刷電路板之上的半導體封 裝。利用蒸發製程、電解質電鍍製程、無電極電鍍製程、 網印製程、或是其它合宜的金屬沉積製程形成導體訊號線 路54於印刷電路板52的一表面上方或是多層裡面。訊號 線路54在該等半導體封裝、被鑲嵌的組件、以及其它外部 系統組件中的每—者之間提供電通訊。線路54還會提供連 12 201104797 接至每一個該等半導體封裝的電力連接線及接地連接線。 於某些實施例中’一半導體裝置會有兩個封裝層。第 一層封裝係一種以機械方式及電氣方式將該半導體晶粒附 接至一中間載體的技術。第二層封裝則涉及以機械方式及 電氣方式將該中間載體附接至該印刷電路板。於其它實施 例中，一半導體裝置可能僅有該第—層封裝，其中，該晶 粒會以機械方式及電氣方式直接被鑲嵌至該印刷電路板。 為達解釋目的，顯示在印刷電路板52上之顯示數種類 型的第一層封裝，其包含焊線封裝56以及覆晶58。除此之 外’還顯示被鑲嵌在印刷電路板52上的數種類型之第二層 封裝，其包含，球栅陣列（Ball Grid Array , BGA)60 ;凸塊 晶片載體（Bump Chip Carrier，BCC)62 ;雙直列封裝（Dual In-hne Package ’ DIP)64 ;平台格柵陣列（Land Grid Array， LGA)66 ;多晶片模組（Multi_chip M〇dule，MCM)68 ;方形 扁平無導線封裝（Quad Flat Non-leaded package , QFN) 70 ; 以及方形扁平封裝72。端視系統需求而定，任何半導體封 裝之組合、任何結合第一及第二層封裝形式之組合和其他 電子組件皆能夠被連接至印刷電路板52。於某些實施例 中’電子裝置50包含單—附接半導體封裝；而其它實施例 則要求多個互連封裝。藉由在單一基板上方組合一或多個 半導體封t ’製造商便能夠將事先製造的組件併入電子裝 置和系統t中。04言亥等半導體封裝包含精_^ ^ =，電子裝置能夠使用較便宜的組件及有效率的製程來製 把。所產生的裝置比較不可能失效而且製造價格較低廉， 13 201104797 從而讓消費者的成本會較低β 圖2a至2c所示的係示範性半導體封裝。圖2a所示的 係被鑲嵌在印刷電路板52之上的DIp 64的進一步細節。半 導體Ba粒74包含一含有類比電路或數位電路的主動區，該 等類比電路或數位電路會被執行為形成在該晶粒裡面的主 動式裝置、被動式裝置、傳導層、以及介電層，並且會根 據-玄曰曰粒的電氣設計來進行電互連。舉例來說，該電路可 ，包含破形成在半導體晶粒74之主動區裡面的—或多個電 曰:體、一極體、電感器、電容器、電阻器、以及其它電路 疋件接觸觸塾76係—或多層傳導材料（例如銘⑽ '銅 ㈣、錫_、錄（Ni)、金（Au)'或是銀（Ag))製成，並且會 被電連接至形成在半導體晶粒Μ裡面的電路元件。在Da 二的：裝期間，半導體晶粒74會利用-金-石夕共熔合金層 :材料(例如熱環氧樹脂)被黏著至一中間載體78。 ’裝主體包含'絕緣封裝材料 體導線以及焊線82會在半導體…疋陶是。導 之 . f隹牛導體日日粒74與印刷電路板52 止、舜_ 互連。囊封劑84會被沉積在該封裝的上方，防 境保護的目的。 粒74或焊線82以達環 的進-圖鑲嵌在印刷電路板52之上—^ 樹脂膠點材料92被黏著會利用底層填充材料㈣^ 被黏者在載體9〇的上方。捏 觸觸塾％與98之間提供第一層封裝 斗線94會在接 囊封劑100㈣_ 模造化合物或 傾社午導體晶粒88和焊線94的上方， 201104797 用以為該裝置提供物理性支撐以及電隔離效果。接觸觸墊 102會利用合宜的金屬沉積製程（例如電解質電鍍或無電極 電鍍）被形成在印刷電路板52的表面上方以防止氧化。接觸 觸墊102會被電連接至印刷電路板52中的一或多條導體訊 號線路54。凸塊104會被形成在BCC 62的接觸觸墊98和 印刷電路板52的接觸觸墊102之間。 在圖2c中，半導體晶粒58會利用覆晶樣式的第一層封 裝以面朝下的方式被鑲嵌至中間載體106。半導體晶粒58 的主動區108含有類比電路或數位電路，該等類比電路或 數位電路會被執行為根據該晶粒的電氣設計所形成的主動 式裝置、被動式裝置、傳導層、以及介電層。舉例來說， 該電路可能包含在主動區108裡面的一或多個電晶體、二 極體、電感器、電容器、電阻器、以及其它電路元件。半 導體晶粒5 8會經由凸塊110以電氣方式及機械方式連接至 載體106。 BGA 60會利用凸塊112的BGA樣式第二層封裝以電 氣方式及機械方式被連接至印刷電路板52。半導體晶粒58 會經由凸塊110、訊號線114、以及凸塊112被電連接至印 刷電路板52中的導體訊號線路54。一模造化合物或囊封劑 116會被沉積在半導體晶粒58和載體106的上方，以為該 裝置提供物理性支撐以及電隔離效果。該覆晶半導體裝置 從半導體晶粒58上的主動式裝置至印刷電路板52上的傳 導軌提供一條短的電傳導路徑，以便縮短訊號傳導距離、 降低電容、並且改善整體電路效能。於另一實施例中，該 § 15 201104797 半導體晶粒5 8會利用遵晶媒+ # _ 用復Β曰樣式的第一層封裝以機械方式及 電氣方式直接連接至印刷電路板52，而沒有中間載體1〇6。 圖“至处所示的係和圖1及h至2c有關之利用在一 基板的孔穴中鑲嵌具有直通^穿孔料導體晶粒來形成 扇入封裝#加的製程。圖3項示的係—半導體晶圓12〇, 其含有基礎基板材料122’例如十鍺、神化鎵 '磷化銦' 或是碳化碎’用以達成結構性支樓…絕緣層或純化層124 會被形成在基板㈣122的第一表面上方。同樣地，一絕 緣層或鈍化層126會被形成在基板材料122的第二表面上 方，其在基板材料1 22的第一表面的對面。該等絕緣層i 24 與126含有由下面所製成的一或多層：二氧化矽（si〇2)、氮 化矽（Si3N4) '氮氧化矽（Si〇N)、五氧化二鈕（Ta2〇5)、三氧 化二鋁（A1203)、或是具有相似絕緣特性及結構特性的其它 材料。該等絕緣層124與126係利用下面方法所形成：pvD、 CVD、印刷、旋塗、t塗、燒結、或是熱氧化。如圖所示， 絕緣層1 2 4與1 2 6的一部分會被移除β 在圖3b中，會利用pvd、CVD、濺鍍、電解質電鍍、 無電極電鍍製程、或是其它合宜的金屬沉積製程形成導電 層128於絕緣層124的已移除部分之中並且形成導電層13〇 於絕緣層126的已移除部分之中。傳導層ns與130可能 係由下面所製成的一或多層：A卜Cu、Sn、Ni、Au、Ag、 或疋其匕合且的導電材料。傳導層128與130中的部分可 能為共接或被電隔離’端視該半導體裝置的設計及功能而 定。 16 201104797 C ’ 一孔穴或開口 13 6利用雷射切割工具或鋸 2被形成，以貫穿絕緣層124與126以及基板材料122。孔 穴136可能為矩形、圓形、或是其它合宜的形狀因數。 在圖3(1中，半導體晶粒或組件138會被設置在孔穴136 中並且利用背冑14〇固定。半導體晶粒138包含一含有類 比電路或數位電路的主動表面142，該等類比電路或數位電 路會被執行為形成在該晶粒裡面的主動式裝置、被動式裝 置、傳導層、以及介電層，並且會根據該晶粒的電氣設計 與功能來進行電互連。舉例來說，該電路可能包含被形成 在主動表面142裡面的一或多個電晶體、二極體、以及其 它電路元件’用以執行基頻類比電路或數位電路.，例如， 數位訊號處理器（DSP)、ASIC、記憶體、或是其它訊號處理 電路。半導體晶粒138可能還含有用於射頻訊號處理的整 合被動元件（IPD)，例如，電感器、電容器、以及電阻器。 一典型的射頻系統在一或多個半導體封裝中需要用到多個 整合被動元件，用以實施必要的電功能。具有直通有機穿 孔（Through Organic Via，TOV)的半導體晶粒能夠被設置在 孔穴136中。於另一實施例中.，半導體晶粒或組件138係 一被設置在孔穴1 3 6中之具有多個直通石夕晶穿孔的中介片。 複數個穿孔係利用雷射鑽鑿或触刻製程（例如深反應離 子餘刻（Deep Reactive Ion Etching，DRIE))被形成貫穿半導 體晶粒或中介片138。該等穿孔會利用pvd、CVD、電解質 電鍵、無電極電鍍製程、或是其它合宜的金屬沉積製程被 Al、Cu、Sn、Ni、Au、Ag、鈦（Ti)、w、多晶石夕、或是其 § 17 201104797 它合宜的導電材料填充，以便形成傳導直通矽晶穿孔 (Through Silicon Via ’ TSV)144 » 直通矽晶穿孔 144 會在將 該晶粒鑲敌於孔穴1 3 6中之前被形成在半導體晶粒13 8 中。直通矽晶穿孔144會根據晶粒的設計以在主動表面142 和基板120上之非必要的重新分配層（ReDistributi〇n Layer，RDL) 145來進行電互連。 在圖3e中’焊線146會被形成在傳導層128與直通矽 晶穿孔144之間。一囊封劑或模造化合物丨48會利用焊膏 印刷（paste printing)塗敷機、壓縮模造（compressive m〇lding) 塗敷機、轉印模造（transfer molding)塗敷機、液體囊封劑模 造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷機被沉 積在半導體晶粒13 8與絕緣層12 4的上方。囊封劑14 8可 為聚合物復合材料，例如，具有填充劑的環氧樹脂、具有 填充劑的環氧丙烯酸酯、或是具有適當填充劑的聚合物。 囊封劑148係非導體並且為半導體裝置提供環境保護，避 免受到外部元素與污染物破壞。一部分的囊封劑148會被 蝕刻製程移除，以暴露主動表面142與直通矽晶穿孔144。 背膠140會在圖3f中被移除。 在圖3g中，該裝置會被倒轉，而半導體晶粒或組件1 5〇 則會利用凸塊152被鑲嵌至直通矽晶穿孔丨44，在主動表面 142的對面。半導體晶粒15〇包含一含有類比電路或數位電 4的主動表面154’該等類比電路或數位電路會被執行為形 成2該晶粒裡面的主動式裝置、被動式裝置、傳導層、以 μ電層，並且會根據該晶粒的電氣設計與功能來進行電 18 201104797 互連舉例來說，該電路可能包含被形成在主動表面154 裡面的一或多個電晶體、二極體、以及其它電路元件，用 以執行基頻類比電路或數位電路，例如，數位訊號處 遺、記憶體、或是其它訊號處理電路。半導體晶粒m 可能還含有用於射頻訊號處理的整合被動元件，例 感器、電容器、以及電阻器…典型的射頻系統在一或多 個半導體封裝中需要用到多個整合被動元件1以實施必 要的電功能。一底層填充材料156(例如環氧樹脂)會被沉積 在半導體晶粒15〇的下方。於另—實施例中，半導體組件 150可能係被鑲嵌至直通矽晶穿孔144的離散半導體裝置。 一導電凸塊材料會利用蒸發製程、電解質電鍍製程、 無電極電鍍製程、丸滴製程⑽1 drop)、或是網印製程被沉 積在傳導I 130的上方。該凸塊材料可能係μ、如、犯、 Au Ag Pb、Bi、Cu、焊料、以及它們的組合’其會有— 非必要的助熔溶劑。舉例來說，該凸塊材料可能是sn/pb 共熔合金、高鉛焊料、或是無鉛焊料。該凸塊材料會利用 合宜的附著或焊接製程被焊接至傳導層13〇。於其中一實施 例中’ s玄凸塊材料會藉由將該凸塊材料加熱至其熔點以上 而被口焊’以形成球狀的丸體或凸塊158。於某些應用中， 凸塊158會被二次回焊，以便改善和傳導層13〇的電接觸 效果。該等凸塊也能夠被壓縮焊接至傳導層13〇。凸塊158 代表能夠被形成在傳導層13〇上方的其中一種類型的互連 結構。該互連結構亦能夠使用焊線、短柱凸塊、微凸塊、 或疋其它電互連線。 201104797 在圖3h中，該裝置會再次被倒轉，而在覆晶配置中具 有朝下方之接觸觸墊162的半導體晶粒或組件16〇則會利 用凸塊164被鑲嵌至直通矽晶穿孔144。半導體晶粒會 被鑲嵌在囊封劑148的已移除部分中，以便縮減裝置厚度。 半導體晶粒160包含一含有類比電路或數位電路的主動表 面166,該等類比電路或數位電路會被執行為形成在該晶粒 裡面的主動式裝置、被動式裝置 '傳導層、以及介電層， 並且根據該晶粒的電氣設計與功能來進行電互連^舉例來 說’該電路可能包含被形成在主動表面166裡面的一或多 個電晶體、二極體、以及其它電路元件，用以執行基頻類 比電路或數位電路，例如，數位訊號處理器、ASIC、記憶 體、或是其它訊號處理電路。半導體晶粒16〇可能還含有 用於射頻§fL號處理的整合被動元件’例如，電感器、電容 器、以及電阻器。一典型的射頻系統在一或多個半導體封 裝中需要用到多個整合被動元件，用以實施必要的電功 能。於另一實施例中，半導體組件16〇可能係被鑲嵌至直 通矽晶穿孔144的離散半導體裝置。 圖4顯示具有半導體晶粒、整合被動元件或中介片之 扇入封裝疊加’其以直通矽晶穿孔或直通有機穿孔置於基 板1 20之孔穴1 36中。該直通矽晶穿孔或直通有機穿孔電 互連半導體組件1 50與1 60。藉由以直通矽晶穿孔或直通有 機穿孔將半導體晶粒、整合被動元件、或中介片放置在孔 穴136中，能夠降低扇入封裝疊加168的高度《此外，將 半導體晶粒160鑲嵌在囊封劑148的已移除部分中亦縮減 20 201104797 扇入封裝疊加168的厚度。經由被設置在孔穴136中的半 導體晶粒、整合被動元件、或中介片的直通矽晶穿孔或直 通有機穿孔進行直接連接，半導體組件15〇與16〇之間的 訊號傳導距離會縮短。 圖5所示的係包含在圖3a至3f中所述之特點的扇入封 裝疊加結構1 70。此外，層疊片或導線架中介片j 72會利用 凸塊176被電連接至直通矽晶穿孔144。焊線U6會經由中 介片1 72被電連接至直通矽晶穿孔144。在覆晶配置中具有 朝下方之接觸觸墊的半導體晶粒或組件178會利用凸塊丄82 被鑲嵌至中介片172。半導體晶粒178包含一含有類比電路 或數位電路的主動表面184,該等類比電路或數位電路會被 執行為形成在該晶粒裡面的主動式裝置、被動式裝置、傳 導層、以及介電層，並且會根據該晶粒的電氣設計與功能 來進行電互連。舉例來說，該電路可能包含被形成在主動 表面184裡面的一或多個電晶體、二極體、以及其它電路 元件’用以執行基頻類比電路或數位電路，例如，數位訊 號處理器、ASIC、記憶體、或是其它訊號處理電路。半導 體晶粒178可能還含有用於射頻訊號處理的整合被動元 例如，電感器、電容器、以及電阻器。一典型的射頻 系統在一或多個半導體封裝中需要用到多個整合被動元 件，用以實施必要的電功能。於另一實施例中，半導體組 件丨78可能係被鑲嵌至中介片172的離散半導體裝置。圖 3 g至3 h中所述的其餘特點皆會被加入至扇入封裝疊加結構 1 70 中。 21 201104797 圖6所示的係包含在圖3 a至3 f中所述之特點的扇入封 裝疊加結構190。此外，埋置凸塊i 92被電連接至直通矽晶 穿孔144與焊線46。一衮封劑或模造化合物i 93利用焊膏 印刷塗敷機、壓縮模造塗敷機 '轉印模造塗敷機、液體囊 封劑模造塗敷機、真空層疊塗敷機、或是其它合宜的塗敷 機被沉積在半導體晶粒138與絕緣層丨24的上方。或者， 亦可形成多根埋置導體柱或模造穿孔取代形成埋置凸塊， 以達更細間距互連的目的。囊封劑丨93可能係聚合物復合 材料，例如，具有填充劑的環氧樹脂、具有填充劑的環氧 丙烯酸酯、或是具有適當填充劑的聚合物。囊封劑193係 非導體並且為半導體裝置提供環境保護’避免受到外部元 素與污染物破壞。 在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或 組件194利用凸塊i 96被鑲嵌至埋置凸塊丨92〇半導體晶粒 B4 ^含一含有類比電路或數位電路的主動表面198，該等
數位訊號處理器 曾、以及介電層’並且根據該 f電互連。舉例來說，該電路 198裡面的一或多個電晶體、 匕Λ號處理電路。半導體晶粒 號處理的整合被動元件，例如 阻器。一典型的射頻系統在— ’用以執行基頻類比電路或數 f器' ASIC、記憶體、或是其 -194可能還含有用於射頻訊 口’電感器、電容器、以及電 或多個半導體封裝中需要用 22 201104797 到多個整合被動元件，用以實施必要的電功能。於另一實 施例中，半導體組件丨94可能係被鎮喪至埋置凸塊1 Μ的 離散半導體裝置。圖3g至3h中所述的其餘特點皆會被加 入至扇入封裝疊加結構19〇中。凸塊192會讓半導體組件 194被鑲嵌在囊封劑193的上方並且被電連接至直通矽晶穿 孔144，其並不需要用到專屬的模具包封（m〇id此“幼製程 或特別的囊封製程以露出半導體晶粒138。 圖7所示的係包含和圖3a至3f相似特點的扇入封裝疊 加結構20(^此外，屏障材料或膜内繞線（wire_in fiim，wif) 囊封材料202會被沉積在半導體晶粒138的上方，其不需 要用到專屬的模具包封製程或特別的囊封製程以露出晶 粒圖3g至3h中所述的其餘特點皆會被加入至扇入封裝 疊加結構200中。 圖8所示的係包含在圖3&至3[中所述之特點的扇入封 裝疊加結構210。此外，半導體晶粒或組件212會利用凸塊 218被鑲嵌在半導體晶粒138的上方並且被電連接至直通矽 晶穿孔144與傳導層128。半導體晶粒212包含一含有類比 電路或數位電路的主動表面214,該等類比電路或數位電路 會被執行為被形成在該晶粒裡面的主動式裝置、被動式裝 置傳導層、以及介電層，並且會根據該晶粒的電氣設計 與功旎來進行電互連。舉例來說，該電路可能包含被形成 在主動表面214裡面的一或多個電晶體、二極體、以及其 匕電路元件’用以執行基頻類比電路或數位電路，例如， 數位訊號處理器、ASIC、記憶體、或是其它訊號處理電路。 23 201104797 半導體晶粒2 1 2可能還含有用於射頻訊號處理的整合被動 元件，例如，電感器、電容器 '以及電阻器。一典型的射 頻系統在一或多個半導體封裝中需要用到多個整合被動元 件，用以實施必要的電功能。於另一實施例中，半導體晶 粒或組件212係一被鑲嵌在半導體晶粒138上方具有多個 直通石夕晶穿孔的中介片。 複數個穿孔會利用雷射鑽鑿或蝕刻製程（例如drie)被 形成貫穿半導體晶粒或中介片212。該等穿孔會利用、 CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金 屬况積製程以A卜Cu、Sn、Ni、Au、Ag、Ti ' W、多晶矽、 或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿 孔216。直通矽晶穿孔216會在將該半導體晶粒212鑲嵌於 孔八136上方之前被形成在半導體晶粒212中。直通矽晶 穿孔2 16會根據晶粒的設計以非必要的rdl 2 1 9在主動表 面214上進行電互連。 220會被形成在傳導層128與直通石夕晶穿孔216 之間。一囊封劑或槿冶外厶榀，在立丨,m丨。士」
24 201104797 刻製程移除，以便露出主動表面214與直通碎晶穿孔川。 半導體晶粒或組件224會利用凸塊226被鑲嵌至直通 :晶穿孔M4,在主動表面142的對面。半導體晶粒224包 含一含有類比電路或數位電路的主動表面228，該等類比電 路或數位電路會被執行為形成在該晶粒裡面的主動式裝 置、破動式裝置、傳導層、以及介電層，並且會根據該晶 粒的電喊計與功能來進行電互連。舉例來說，該電路可 旎包含被形成在主動表面228裡面的一或多個電晶體、二 極體以及其它電路元件，用以執行基頻類比電路或數位 電路’例如，數位訊號處理器、鐵、記憶體、或是其它 '處理電@ I導體晶粒224彳能還含有用於射頻訊號 :理的整合破動兀件，例如，電感器、電容器、以及電阻 7 -典型的射頻系統在—或多個半導體封裝中需要用到 整口被動元件’用以實施必要的電功能。一底層填充 材料23G(例如％氧樹脂）會被沉積在半導體晶粒的下 、於$冑施例中’半導體組件224彳能係被鑲嵌至直 通矽晶穿孔144的離散半導體裝置。 導電凸塊材料利用蒸發製程、電解質電鍍製程、無 電鍍製程、丸滴製程、或是網印製程被沉積在傳導層 β30的上方°該凸塊材料可能係A：l、Sn、Ni、Au、Ag、Pb、 ^ 焊料以及它們的組合，其會有一非必要的助熔 :^ °舉例來說’該凸塊材料可能是Sn/Pb共炼合金、高船 ,；"或疋無金0焊料。該凸塊材料會利用合宜的附著或焊 製程被焊接至傳導層13〇。於一實施例中，該凸塊材料會 25 201104797 藉由將該凸塊材料加熱至其熔點以上而被回焊，用以形成 球狀的丸體或凸塊232。於某些應用t，凸塊232會被二次 回焊，以便改善和傳導& 130的電接觸效果。該等凸塊也 能夠被i缩焊接至傳導層130。凸塊232代表能夠被形成在 傳導層130上方的其中一種類型的互連結構。該互連結構 亦能夠使料線、短柱凸塊、微&塊、或是其它電互連線。 在覆晶配置中具有朝下方之接觸觸塾的半導體晶粒或 組件234會利用凸塊236被鑲嵌至直通矽晶穿孔2ι^半導 體aa粒234包含-含有類比電路或數位電路的主動表面 238，該等類比電路或數位電路會被執行為被形成在該晶粒 裡面的主動式裝置、被動式裝置、傳導層、以及介電層， 並且會根據該晶粒的電氣設計與功能來進行電互連。舉例 來說，該電路可能包含被形成在主動表面238裡面的一或 多個電晶體、二極體、以及其它電路元件’用以執行基頻 類比電路或數位電路，例如，數位訊號處理器、asic、記 憶體、或是其它訊號處理電路。半導體晶粒234可能還含 有用於射頻訊號處理的整合被動元件，例如， = 容器、以及電阻器。一典型的射頻系統在—或多個；』 =裝中需要用到多個整合被動元件，用以實施必要的電功 月b。於另一實施例中，半導體組件16〇可能係被鑲嵌至直 通石夕晶穿孔216的離散半導體裝置。 曰曰 圖9所示的係包含圖3a至3f中所述之特點的扇入封裝 叠加結構240。此外，半導體晶粒或組件242會部分被設置 在孔穴136中且部分被設置在孔穴136的外面。半導體 26 201104797 粒242進一步包含於孔穴136外面伸出於基板i2〇上方的 凹口或凹寓243。半導體晶粒242包含一含有類比電路或數 位電路的主動表面244,該等類比電路或數位電路會被執行 為形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、 以及介電層，並且會根據該晶粒的電氣設計與功能來進行 電互連。舉例來說，該電路可能包含被形成在主動表面2料 裡面的一或多個電晶體、二極體、以及其它電路元件，.用 以執行基頻類比電路或數位電路，例如，數位訊號處理器、 ASIC、記憶體、或是其它訊號處理電路。半導體晶粒 可能還含有用於射頻訊號處理的整合被動元件，例如，電 感器、電容器、以及電阻器。一典型的射頻系統在一或多 個半導體封裝中需要用到多個整合被動元件，用以實施必 要的電功能。於另一實施例中，半導體晶粒或組件242係 具有多個直通矽晶穿孔的中介片，部分被設置在孔穴i36 中且部分被設置在孔穴1 36外面。 複數個穿孔會利用雷射鑽鑿或蝕刻製程（例如〇111£)被 形成貫穿半導體晶粒或中介片242 〇該等穿孔會利用PVD、 CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金 屬沉積製程以A卜Cu、Sn、Ni、AU、Ag、Ti、W、多晶矽、 或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿 孔246。直通矽晶穿孔246會在將該半導體晶粒242鑲嵌於 孔穴136中之前被形成在半導體晶粒242中。直通矽晶穿 孔246會根據晶粒的設計以非必要的RDL 245在主動表面 244與基板120上進行電互連會有。凹口 243中的直通矽晶 27 201104797 穿孔246會利用凸塊248電連接至傳導層ι28。 焊線250會形成在傳導層128與直通矽晶穿孔246之 間 囊封劑或模造化合物2 5 2會利用焊膏印刷塗敷機、 壓縮模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷 機 '真空層疊塗敷機、或是其它合宜的塗敷機被沉積在半 導體晶粒242與絕緣層124的上方。囊封劑252可能係聚 合物復合材料，例如，具有填充劑的環氧樹脂、具有填充 劑的％氧丙烯酸酯、或是具有適當填充劑的聚合物。囊封 Μ 252係非導體並且會為半導體裝置提供環境保護，避免 受到外部元素與污染物破壞。一部分的囊封齊）252會被触 刻製程移除’以便露出主動表面244與直通妙晶穿孔。 曰半導體晶粒或組件254會利用凸塊256被鑲嵌至直通 I阳穿孔246 ’在主動表面244的對面。半導體晶粒包 含一含有類比電路或數位電路的主動表面258，該等類比電 路或數位電路會被執行為形成在該晶㈣面的主動式裝 破動式裝置、傳導層、以及介電層’並且會根據該晶 粒的電氣料與功能來進行電互連。舉例來說，該電路可 此包3被形成在主動表自258裡面的一或多個電晶體、二 極體、以及其它電路元件，用以執行基頻類比電路或數I: 電路’例如，數位訊號處理器、逝、記憶體 訊號處理電路。丰莫辦a 處理的整^還含有用於射頻訊號 口被動70件，例如，電感器、電容器、以及電阻 益。一典型的射頻系統在— 多個整合被動元件，用^ 料導體封裝中需要用到 牛用以實施必要的電功能。一底層填充 28 2〇ll〇4797 材料260(例如環氧樹脂）會被沉積在半導體晶粒254的下 方。於另一實施例中，半導體組件254可能係被鑲嵌至直 通矽晶穿孔246的離散半導體裝置。 一導電凸塊材料會利用蒸發製程‘、電解質電鑛製程、 無電極電鍍製程、丸滴製程、或是網印製程被沉積在傳導 層130的上方。該凸塊材料可能係a卜Sn ' Ni、Αιι、Ag、 Pb、Bi、Cu、焊料、以及它們的組合’其會有一非必要的 助熔溶劑。舉例來說，該凸塊材料可能是Sn/pb共熔合金、 南鉛焊料、或是無鉛焊料《該凸塊材料會利用合宜的附著 或焊接製程被焊接至傳導層130〇於一實施例中，該凸塊材 料會藉由將該凸塊材料加熱至其熔點以上而被回焊，用以 形成球狀的丸體或凸塊262。於某些應用中，凸塊262會被 二次回焊’以便改善和傳導層130的電接觸效果。該等凸 塊也能夠被壓縮焊接至傳導層13〇。凸塊262代表能夠被形 成在傳導層130上方的其中一種類型的互連結構。該互連 結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互 連線。 在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或 組件264會利用凸塊266被鎮嵌至直通碎晶穿孔246。半導 體晶粒264包含一含有類比電路或數位電路的主動表面 268，該等類比電路或數位電路會被執行為形成在該晶粒裡 面的主動式裝置、被動式裝置、傳導層、以及介電層，並 且會根據該晶粒的電氣設計與功能來進行電互連。舉例來 說，該電路可能包含被形成在主動表面268裡面的一或多 1! 29 201104797 個電晶體、二極體、以及其它電路元件，帛以執行基頻類 比電路或數位電路，例如，數位訊號處理器、、記憶 體、或是其它訊號處理電路。半導體晶粒264可能還含= 用於射頻訊號處理的整合被動元件，例如，電感器、電容 器、以及電阻器…典型的射頻系統在一或多個半導體封 裝中需要用到多個整合被動元件，用以實施必要的電功 能。於另-實施例中，半導體組件264可能係被鎮嵌至直 通矽晶穿孔246的離散半導體裝置。 圖所示的係包含圖3aS3e中所述之特點的扇入封 裝Φ加結構270以及被鑲嵌在孔穴136上方的半導體晶粒 或組件274 »半導體晶粒274包含一含；^φ & ^ s a有類比電路或數位電 路的主動表面278,該等㈣電路或數位電路會被執行為被 形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、 以及介電層’並且會根據該晶粒的電氣設計與功能來進行 電互連。舉例來說，該電路可能包含被形成在主動表面Μ 裡面的-或多個電晶體、二極體、以及其它電路元件，用 以執行基頻類比電路或數位電路，例如，數位㈣處理器、 ASIC、記憶體 '或是其它訊號處理電路。半導體晶粒μ 可能還含有用於射頻訊號處理的整合被動元件，例如，電 感器、電容器、以及電阻器。一典型的射頻系統在一或多 個半導體封裝中需要用到多個整合被動元件，用以實施必 要的電功能。於另-實施例中’半導體晶粒或組件⑺係 被鑲嵌在孔A 136上方具有多個直通石夕晶穿孔的中介片。 複數個穿孔會利用雷射㈣或敍刻製程（例如dr即被 30 201104797 形成貫穿半導體晶粒或中介片274。該等穿孔會利用pVD、 CVD、電解質電鍍、無電極電鍍製程、或是其它合宜的金 屬沉積製程以A卜Cu、Sn、Ni、Au、Ag、Ti、W、多晶矽、 或是其它合宜的導電材料填充，以便形成傳導直通矽晶穿 孔280。直通矽晶穿孔280會在鑲嵌該半導體晶粒274之前 被形成在該晶粒中。直通矽晶穿孔28〇會根據晶粒的設計 以非必要的RDL 281在主動表面278上進行電互連。 焊線282會被形成在傳導層ι28與主動表面278之間。 囊封劑或模造化合物284會利用焊膏印刷塗敷機、壓縮 模造塗敷機、轉印模造塗敷機、液體囊封劑模造塗敷機、 真二層疊塗敷機、或是其它合宜的塗敷機被沉積在半導體 曰曰粒274與絕緣層！ 24的上方。囊封劑284可能係聚合物 f合材料，例如，具有填充劑的環氧樹脂、具有填充劑的 %氧丙稀酸酯、或是具有適當填充劑的聚合物。囊封劑284 係非導體並且為半導體裝置提供環境保護，避免受到外部 元素與污染物破壞。一部分的囊封齊"84會被蝕刻製程移 除，以便露出主動表面278與直通矽晶穿孔28〇。 θ半導體晶粒或組件286會利用凸&⑽被絲至直通 夕阳穿孔280 ’在主動表面278的對面。半導體晶粒286包 各β有類比電路或數位電路的主動表面，該等類比電 路或數位電路會被執行為形成在該晶粒裡面的主動式裝 置、被動式裝置、傳導層、以及介電層，並且會根據該晶 粒的電氣設計與功能來進行電互連。舉例來說，該電路可 能包含被形成在主動表面29〇裡面的一或多個電晶體、二 31 201104797 極體、以及其它電路元件，用以執行基頻類比電路或數位 電路’例如，數位訊號處理器、ASIC、記憶體、或是其它 :號處理電路。半導體晶粒286可能還含有用於射頻訊號 :理的整合被動元#，例如，電感器、電容器 '以及電阻 益 典型的射頻系統在一或多個半導體封裝中需要用到 多個整合被動元件，用以實施必要的電功能一底層填充 材料292(例如環氧樹脂）會被沉積在半導體晶粒的下 方。於另一實施例中，半導體組件286可能係被鑲喪至直 通矽晶穿孔280的離散半導體裝置。 一導電凸塊材料會利用蒸發製程、電解質電鍍製程、 …、電極電鍍製程、丸滴製程、或是網印製程被沉積在傳導 層130的上方。該凸塊材料可能係八卜Sn、见、Au、Ag、
Pb、Βι ' Cu、焊料、以及它們的組合，其會有—非必要的 助熔溶劑。舉例來說，該凸塊材料可能是Sn/pb共熔合金、 咼鉛焊料、或是無鉛焊料。該凸塊材料會利用合宜的附著 或焊接製程被焊接至傳導層丨3(^於一實施例中，該凸塊材 料會藉由將s玄凸塊材料加熱至其炼點以上而被回焊，用以 形成球狀的丸體或凸塊294。於某些應用中，凸塊294會被 二次回焊，以便改善和傳導層丨3〇的箪接觸效果。該等凸 塊也能夠被壓縮焊接至傳導層丨3〇 〇凸塊294代表能夠被形 成在傳導層130上方的其中一種類型的互連結構。該互連 結構亦能夠使用焊線、短柱凸塊、微凸塊、或是其它電互 連線。 在覆晶配置中具有朝下方之接觸觸墊的半導體晶粒或 32 201104797 組件296會利用凸塊298被鑲參$吉、s a 場瓜至直通矽晶穿孔280。半導 體晶粒296包含一含有類比雷 比電路或數位電路的主動表面 300，該等類比電路或數位電路 电叫θ被執仃為形成在該晶粒裡 面的主動式裝置、被動式裝置、傳導層、以及介電層，並 且會根據該晶粒的電氣設計與功能來進行電互連。舉例來 說，該電路可能包含被形成在主動表φ 3〇〇裡面的—或多 個電日日體、二極體、以及其它雷拉开 升匕€路几件，用以執行基頻類 比電路或數位電路’例如’數位訊號處理器、A·、記憶 體、或是其它訊號處理電路◊半導體晶粒296可能還含有 用於射頻訊號處理的整合被動元件，例如，電感器、電容 器、以及電阻器。一典型的射頻系統在—或多個半導體封 裝中需要用到多個整合被動元件，用以實施必要的電功 能。於另一實施例中，半導體組件296可能係被鑲嵌至直 通矽晶穿孔280的離散半導體裝置。 圖1 1所不的係被鑲嵌至印刷電路板3丨2之扇入封裝曼 加結構310’其包含圖3a至3g中所述之特點。一散熱片314 會被擺放在半導體晶粒1 5 〇之背表面與印刷電路板3 1 2之 間。散熱片314可能係Al、Cu、或是具有高導熱係數的另 一材料，以便為半導體晶粒150提供熱消散作用。 雖然本文已經詳細解釋過本發明的一或多個實施例. 不過’熟練的技術人士便會瞭解’可以對該些實施例進行 修改與改變，其並不會脫離隨後申請專利範圍中所提出的 本發明的範疇。 33 201104797 【圆式簡單說明】 圖1說明一印刷電路板，在其表面上鑲嵌著不同類型 的封裝； 圖2a至2c說明被鑲嵌至該印刷電路板的代表性半導體 封裝的進一步細節； 圖3a至3h說明利用在一基板的孔穴中鑲嵌具有直通矽 晶穿孔的半導體晶粒來形成扇入封裝疊加； 圖4說明經由該基板孔穴中的直通石夕晶穿孔晶粒互連 的堆疊晶粒； 圖5說明利用被設置在該基板之孔穴中的一直通矽晶 穿孔中介片互連的堆疊晶粒； 圖6說明利用該基板之孔穴中的埋置凸塊及直通矽晶 穿孔互連的堆疊晶粒； 圖7說明利用被膜内繞線覆蓋的直通石夕晶穿孔及焊線 互連的堆疊晶粒； 圖8說明利用被鑲嵌在該基板孔穴上方的直通石夕晶穿 孔晶粒互連的堆疊晶粒； 圖9說明利用延伸在該基板孔穴外面的直通矽晶穿孔 晶粒互連的堆疊晶粒； 圖10說明利用被設置在該基板孔穴外面的直通石夕晶穿 孔晶粒互連的堆疊晶粒；以及 圖11說明利用具有堆疊晶粒和散熱片的扇入封裝疊 加0 34 201104797 【主要元件符號說明】 50 電子裝置 52 印刷電路板（PCB) 54 線路 56 焊線封裝 58 覆晶 60 球柵陣列（BGA) 62 凸塊晶片載體（BCC) 64 雙直列封裝（DIP) 66 平台格柵陣列（LGA) 68 多晶片模組（MCM) 70 方形扁平無導線封裝（QFN) 72 方形扁平封裝 74 半導體晶粒 76 接觸觸墊 78 中間載體 80 導體導線 82 焊線 84 囊封劑 88 半導體晶粒 90 載體 92 底層填充材料或環氧樹脂膠黏材料 94 焊線 96 接觸觸墊 35 201104797 98 100 102 104 106 108 110 112 114 116 120 122 124 126 128 130 136 138 140 142 144 145 146 148 接觸觸墊 模造化合物或囊封劑 接觸觸墊 凸塊 載體 主動區 凸塊 凸塊 訊號線 模造化合物或囊封劑 半導體晶圓 基板材料 絕緣層或純化層 絕緣層或鈍化層 傳導層 傳導層 孔穴或開口 半導體晶粒或組件 背膠 主動表面 直通矽晶穿孔 重新分配層 焊線 囊封劑或模造化合物 36 201104797 150 半 導 體 晶 粒 或 組 件 152 凸 塊 154 主 動 表 面 156 底層 填 充材料 158 凸 塊 160 半 導 體 晶 粒 或 組 件 162 接 觸 觸 墊 164 凸 塊 166 主 動 表 面 168 扇 入 封裝 疊 加 170 扇 入 封 裝 疊 加 結 構 172 中 介 片 176 凸 塊 178 半 導 體 晶 粒 或 組 件 182 凸 塊 184 主 動 表 面 190 扇 入 封 裝 疊 加 結 構 192 凸 塊 193 囊 封 劑 或 模 造 化 合物 194 半 導 體 晶 粒 或 組件 196 凸 塊 198 主 動 表 面 200 扇 入 封 裝 疊 加 結 構 202 囊 封材料 37 201104797 210 扇入封裝疊加結構 212 半導體晶粒或組件 214 主動表面 216 直通石夕晶穿孔 218 凸塊 219 重新分配層 220 焊線 222 囊封劑 224 半導體晶粒 226 凸塊 228 主動表面 230 底層填充材料 232 凸塊 234 半導體晶粒或組件 236 凸塊 238 主動表面 240 扇入封裝疊加結構 242 半導體晶粒或組件 243 凹口或凹窩 244 主動表面 245 重新分配層 246 直通碎晶穿孔 248 凸塊 250 焊線 38 201104797 252 254 256 258 260 262 264 266 268 270 274 278 280 281 282 284 286 288 290 292 294 296 298 囊封劑或模造化合物 半導體晶粒或組件 凸塊 主動表面 底層填充材料 球狀丸體或凸塊 半導體晶粒或組件 凸塊 主動表面 扇入封裝疊加結構 半導體晶粒或組件 主動表面 直通妙晶穿孔 重新分配層 焊線 囊封劑或模造化合物 半導體晶粒或組件 凸塊 主動表面 底層填充材料 球狀丸體或凸塊 半導體晶粒或組件 凸塊 主動表面 39 300 201104797 310 312 扇入封裝疊加結構 印刷電路板 散熱片 314

Claims (1)

  1. 201104797 七、申請專利範圍：
    .......几软牙札，用以形成一傳 用以形成一傳導穿孔； 祖展罝的方法，其包括： 表面與第二表面的基板； 板之第一表面與第二表面的孔穴； 將該第一半導體晶粒鑲嵌在該孔穴之中； 將一囊封劑沉積於該基板及該第一半導體 表面上方； 粒的第一 從該第半導體晶粒的第一表面處移除該囊封劑的一 部分’用以露出該傳導穿孔； 將第一半導體晶粒鑲彼於該第一半導體晶粒的該第 表面。該第二半導體晶粒會被電連接至該傳導穿孔；以 將第二半導體晶粒鑲嵌在該第一半導體晶粒之第一 表面對面的該第一半導體晶粒之第二表面的上方。 2. 如申請專利範圍第1項的方法，其進一步包含： 在該基板的該第一表面上形成一第一傳導層；以及 在該第一傳導層與傳導穿孔之間形成一焊線。 3. 如申請專利範圍第1項的方法，其進一步包含將—中 介片設置在該第一半導體晶粒與第二半導體晶粒之間。 4. 如申請專利範圍第1項的方法，其進一步包含將一具 有多個傳導穿孔的第四半導體晶粒設置在該第一半導體晶 粒與第二半導體晶粒之間。 41 201104797 5_如申請專利範圍第1項的方法，装 晶粒會延伸在該孔穴的上方。 肖第一半導體 6·如申請專利範圍第丨項的方法，苴 =丰導栌曰輪沾主二 ’、進一步包含在該第 一 +導體曰曰粒的一表面上方形成一散熱 體晶粒的對面。 六你弟+導 7·—種製造半導體裝置的方法，其包括： 提供一具有第一表面與第二表面的基板； 形成-貫穿該基板之該等第一表面與第二表面的孔 將-第-半導體組件鎮嵌在該孔穴之中，該第 體組件具有一傳導直通矽晶穿孔（TSV); 將一囊封劑沉積於該基板及該第一 做久0农罘 牛導體組件的第一 表面上方； 從該第-半導體組件的第—表面處移除該囊封劑的一 部分，用以露出該傳導直通矽晶穿孔；以及 將一第二半導體組件鑲嵌於該第一半導體組件的該第 -表面’該第二半導體組件會被電連接至該傳導直通石夕晶 穿孔。 8. 如申請專利範圍第7項的方法，其進—步包含將一第 二半導體組件鑲嵌在該第一半導體組件之第一表面相反的 該第一半導體組件之第二表面的上方。 9. 如申請專利範圍第7項的方法，其進一步包含： 在該基板的該第一表面上形成一第一傳導層；以及 在該第一傳導層與傳導穿孔之間形成一焊線。 42 201104797 ίο.如中料利範圍第7項的方法，其進—步包含將一 中介片设置在該第一半導體組件與第二半導體組件之間。 比如申請專利範圍第7項的方法，其進一步包含將一 具有多個傳導穿孔的第三半導體組件設置在該第一半導體 組件與第二半導體組件之間。 12.如申請專利範圍 體組件會延伸在該孔穴 第7項的方法，其中，該第一半導 的上方。 13. 如申請專㈣圍第7項的方法，其t，該第-半導 體組件係一半導體晶粒、整合被動元件、或是中介片。 14. 一種製造半導體裝置的方法，其包括： 提供一具有第一表面與第二表面的基板； 形成一貫穿該基板之該等第一表面與第二表面的礼 穴； 將一第一半導體組件鑲嵌在該孔穴的上方，該第一半 導體組件具有一傳導直通矽晶穿孔（TSV); 將一第二半導體組件鑲嵌於該第一半導體組件的—第 一表面的上方； 將一囊封劑沉積於該基板及第二半導體組件的上方； 以及 將一第三半導體組件鑲嵌在該第一半導體組件之第一 表面對面的該第一半導體組件之第二表面的上方。 15. 如申請專利範圍第14項的方法，其進一步包含將在 該第一半導體組件與第二半導體組件之間形成多個凸塊。 16. 如申請專利範圍第14項的方法，其進一步包含將一 S 43 201104797 中介片設置在該第一半導體組件與第二半導體組件之間。 1 7.如申明專利範圍第14項的方法，其進一步包含將— 具有傳導直通矽晶穿孔的第四半導體組件設置在該第一半 導體組件與第二半導體組件之間。 18. 如申請專利範圍第14項的方法，其中，該第—半導 體組件係一半導體晶粒、整合被動元件、或是中介片。 19. 如申請專利範圍第14項的方法，其進一步包含： 在S玄基板的該第一表面上形成一第一傳導層； 在該第一傳導層與傳導直通矽晶穿孔之間形成—焊 線；以及 將膜内繞線材料沉積在該焊線上。 20. —種半導體裝置，其包括： 一基板，其具有一被形成貫穿該基板之第一表面與第 二表面的孔穴； “ 第一半導體組件，其被鑲嵌在該孔穴之中，該第一 半導體組件具有一傳導直通石夕晶穿孔（TSV); 第一半導體組件，其被鑲嵌於該第一半導體組件的 一第一表面的上方； 一囊封劑，其被沉積於該基板及第二半導體組件的上 方；以及 ， 第二半導體組件，其被鑲嵌在該第一半導體組件之 第表面對面的該帛導體組件之第二表自的上方。 人21.如申晴專利範圍第2〇項的半導體裝置，其進一步包 3被6又置在該第—半導體組件與第二半導體組件之間的 44 201104797 中介片》 22. 如申請專利範圍第2〇項的半導體裝置，其進一步包 含將一具有傳導直通矽晶穿孔的第四半導體組件設置在該 第一半導體組件與第二半導體組件之間。 23. 如申請專利範圍第2〇項的半導體裝置，其中，該第 一半導體組件係一半導體晶粒、整合被動元件或是中介片。 24. 如申請專利範圍第2〇項的半導體裝置，其進一步包 含一被形成在該第一半導體晶粒對面的該第三半導體晶粒 的一表面上方的散熱片。 25. 如申晴專利範圍第20項的半導體裝置，其中，該第 一半導體晶粒會延伸在該孔穴的上方。 八、圖式. (如次頁） S 45
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US9064876B2 (en) 2015-06-23
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