TWI588921B - 半導體裝置以及形成用於傳導互連結構之保護和支撐結構之方法 - Google Patents

半導體裝置以及形成用於傳導互連結構之保護和支撐結構之方法 Download PDF

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TWI588921B
TWI588921B TW101129342A TW101129342A TWI588921B TW I588921 B TWI588921 B TW I588921B TW 101129342 A TW101129342 A TW 101129342A TW 101129342 A TW101129342 A TW 101129342A TW I588921 B TWI588921 B TW I588921B
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layer
insulating layer
conductive
bumps
semiconductor
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TW101129342A
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TW201314804A (zh
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林耀劍
陳康
方建敏
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史達晶片有限公司
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Priority claimed from US13/239,080 external-priority patent/US9484259B2/en
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Description

半導體裝置以及形成用於傳導互連結構之保護和支撐結構之方法
本發明大體上和半導體裝置有關，更明確地說，本發明係關於半導體裝置以及形成用於傳導互連結構之保護和支撐結構之方法。
在現代的電子產品中經常會發現半導體裝置。半導體裝置會有不同數量與密度的電組件。離散式半導體裝置通常含有某一種類型的電組件，舉例來說，發光二極體(Light Emitting Diode，LED)、小訊號電晶體、電阻器、電容器、電感器、以及功率金屬氧化物半導體場效電晶體(Metal Oxide Semiconductor Field Effect Transistor，MOSFET)。積體式半導體裝置通常含有數百個至數百萬個電組件。積體式半導體裝置的範例包含微控制器、微處理器、電荷耦合裝置(Charged-Coupled Device，CCD)、太陽能電池、以及數位微鏡裝置(Digital Micro-mirror Device，DMD)。
半導體裝置會實施各式各樣的功能，例如，訊號處理、高速計算、傳送與接收電磁訊號、控制電子裝置、將太陽光轉換成電能、以及產生電視顯示器的視覺投影。在娛樂領域、通訊領域、電力轉換領域、網路領域、電腦領域、以及消費性產品領域中皆會發現半導體裝置。在軍事應用、航空、自動車、工業控制器、以及辦公室設備中同樣會發現半導體裝置。
半導體裝置係利用半導體材料的電氣特性。半導體材料的原子結構會使得可藉由施加電場或基礎電流或是經由摻雜處理來操縱其導電性。摻雜會將雜質引入至該半導體材料之中，以便操縱及控制該半導體裝置的傳導性。
一半導體裝置含有主動式電氣結構與被動式電氣結構。主動式結構(其包含雙極電晶體與場效電晶體)會控制電流的流動。藉由改變摻雜程度以及施加一電場或基礎電流，該電晶體便會提高或限制電流的流動。被動式結構(其包含電阻器、電容器、以及電感器)會創造用以實施各式各樣電氣功能所需要的電壓和電流之間的關係。該等被動式結構與主動式結構會被電連接用以形成能夠讓該半導體裝置實施高速計算以及其它實用功能的電路。
半導體裝置通常會使用兩種複雜的製程來製造，也就是，前端製造以及後端製造，每一者皆可能涉及數百道步驟。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。每一個半導體晶粒通常為相同並且含有藉由電連接主動式組件和被動式組件而形成的電路。後端製造涉及從已完成的晶圓中單體化裁切個別的半導體晶粒並且封裝該晶粒，用以提供結構性支撐及環境隔離。本文中所使用的「半導體晶粒(semiconductor die)」一詞兼具單數與複數兩種形式，據此，其可能係表示單一半導體裝置與多個半導體裝置兩者。
半導體製造的其中一個目標係生產較小型的半導體裝置。較小型的裝置通常會消耗較少的電力，具有較高的效 能，並且能夠被更有效地生產。此外，較小型的半導體裝置還具有較小的覆蓋範圍，這係較小型末端產品所需要的。藉由改善前端製程可以達成較小的半導體晶粒尺寸，從而導致具有較小尺寸以及較高密度之主動式組件和被動式組件的半導體晶粒。後端製程則可以藉由改善電互連材料及封裝材料而導致具有較小覆蓋範圍的半導體裝置封裝。
一習知的半導體裝置可能含有被鑲嵌至一半導體基板的半導體晶粒，以便減少在層壓基板中通常會發現的翹曲問題。由於利用焊線來形成電互連線的成本以及製造複雜性的關係，一傳導互連結構(例如，傳導凸塊(conductive bump)或是傳導通道(conductive via))可能會被形成用以將半導體晶粒鑲嵌並且電連接至該半導體基板，而非焊線。然而，形成傳導凸塊的製程卻可能會導致金屬間化合物(Inter-Metallic Compound；IMC)的成長，其可能會干擾該半導體晶粒的操作能力以及功能。再者，傳導凸塊的材料特性以及熱特性通常和半導體晶粒不同，從而導致會在遇熱時以不同的速率膨脹與收縮。傳導凸塊以及半導體材料之不同的膨脹速率與收縮速率會造成傳導凸塊以及半導體晶粒之間的電連接的早期失效。再者，傳導凸塊材料的塗敷與回焊亦可能會在相鄰的傳導凸塊之間造成橋接或是電氣短路。或者，形成傳導通道會造成非常小的傳導接觸面積，其會限制利用傳導通道所進行之電連接的功能性、容易排列性、以及可靠性。
美國優先權之主張
本申請案為2011年9月21日所提申之美國專利申請案第13/239,080號的部分接續案，本文以引用的方式將該申請案併入。
本技術領域需要提供一種用於半導體晶粒的簡單、低成本、並且可靠的垂直電互連結構。據此，於其中一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一具有複數個接觸觸墊的半導體晶圓；於該半導體晶圓以及該等接觸觸墊的上方形成一第一絕緣層；移除該第一絕緣層的一部分，用以露出該等接觸觸墊的一第一部分，同時留下該等接觸觸墊中被該第一絕緣層覆蓋的一第二部分；在該等接觸觸墊以及該第一絕緣層的上方形成一凸塊下層金屬層；於該凸塊下層金屬層的上方形成複數個凸塊；於該半導體晶圓的上方形成一第二絕緣層，用以覆蓋該第一絕緣層、該凸塊下層金屬層的側壁、該等凸塊的側壁、以及該等凸塊的上方表面；以及移除該第二絕緣層中覆蓋該等凸塊之上方表面的一部分，同時保持該第二絕緣層覆蓋在該等凸塊的側壁的上方以及該凸塊下層金屬層的側壁的上方，以便為該等凸塊提供結構性支撐並且防止金屬間化合物的成長。
於另一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一半導體晶圓；形成貫穿該半 導體晶圓的複數條傳導通道，其一部分會延伸超過該半導體晶圓的一表面；於該半導體晶圓以及該等傳導通道的上方形成一絕緣層；以及移除該絕緣層中覆蓋該等傳導通道的一上方表面的一部分，同時保持該絕緣層覆蓋在該等傳導通道的一側壁的上方，以便為該等傳導通道提供結構性支撐。
於另一實施例中，本發明係一種製造半導體裝置的方法，其包括下面步驟：提供一半導體晶圓；形成一傳導互連結構，其高度會延伸超過該半導體晶圓的一表面；於該半導體晶圓以及該傳導互連結構的上方形成一絕緣層；以及移除該絕緣層中覆蓋該傳導互連結構的一上方表面的一部分，同時保持該絕緣層覆蓋在該傳導互連結構的一側壁的上方。
於另一實施例中，本發明係一種半導體裝置，其包括一半導體晶圓。一傳導互連結構會被形成在該半導體晶圓的上方，其高度會延伸超過該半導體晶圓。一絕緣層會被形成在該半導體晶圓的上方，其會露出該傳導互連結構的一上方表面，同時保持覆蓋在該等傳導互連結構的一側壁的上方。
在下面的說明中會參考圖式於一或多個實施例中來說明本發明，於該等圖式中，相同的符號代表相同或雷同的元件。雖然本文係以達成本發明之目的的最佳模式來說明 本發明；不過，熟習本技術的人士便會明白，本發明希望涵蓋受到下面揭示內容及圖式支持的隨附申請專利範圍及它們的等效範圍所定義的本發明的精神與範疇內可能併入的替代例、修正例、以及等效例。
半導體裝置通常會使用兩種複雜的製程來製造：前端製造和後端製造。前端製造涉及在一半導體晶圓的表面上形成複數個晶粒。該晶圓上的每一個晶粒皆含有主動式電組件和被動式電組件，它們會被電連接而形成功能性電路。主動式電組件(例如電晶體與二極體)能夠控制電流的流動。被動式電組件(例如電容器、電感器、電阻器、以及變壓器)會創造用以實施電路功能所需要的電壓和電流之間的關係。
被動式組件和主動式組件會藉由一連串的製程步驟被形成在該半導體晶圓的表面上方，該等製程步驟包含：摻雜、沉積、光微影術、蝕刻、以及平坦化。摻雜會藉由下面的技術將雜質引入至半導體材料之中，例如：離子植入或是熱擴散。摻雜製程會修正主動式裝置之中的半導體材料的導電性，將該半導體材料轉換成絕緣體、導體，或是響應於一電場或基礎電流來動態改變半導體材料傳導性。電晶體含有不同類型和摻雜程度的多個區域，它們會在必要時被排列成用以在施加該電場或基礎電流時讓該電晶體會提高或限制電流的流動。
主動式組件和被動式組件係由具有不同電氣特性的多層材料所構成。該等層能夠藉由各式各樣的沉積技術來形 成，其部分取決於要被沉積的材料的類型。舉例來說，薄膜沉積可能包含：化學氣相沉積(Chemical Vapor Deposition，CVD)製程、物理氣相沉積(Physical Vapor Deposition，PVD)製程、電解質電鍍製程、以及無電極電鍍製程。每一層通常都會被圖樣化，以便形成主動式組件的一部分、被動式組件的一部分、或是組件之間的電連接線的一部分。
圖樣化係基礎的作業，藉此作業會移除該半導體晶圓表面之上的頂端層的多個部分。該半導體晶圓中的多個部分可以利用下面方式來移除：光微影術、光遮罩法、遮罩法、氧化物或金屬移除、照相術與模版印刷術、以及微型微影術(microlithography)。光微影術包含於多個主光罩(reticle)或是一光遮罩之中形成一圖樣並且將該圖樣轉印至該半導體晶圓的該等表面層。光微影術會於一雙步驟製程之中在該半導體晶圓的表面上形成主動式組件與被動式組件的水平維度。首先，該主光罩(reticle)該等遮罩上的圖樣會被轉印至一層光阻之中。光阻係一光敏感材料，當曝露於光之中時，結構與特性便會改變。改變該光阻之結構與特性的製程可以負向作用光阻(negative-acting photo resist)或是正向作用光阻(positive-acting photo resist)來進行。其次，該光阻層會被轉印至該半導體晶圓之中。當蝕刻移除半導體晶圓之頂端層中沒有被該光阻覆蓋的部分時，該轉印便會發生。光阻的化學特性會使得該光阻緩慢地溶解並且防止被化學蝕刻溶液移除，而該半導體晶圓之頂端層中 沒有被該光阻覆蓋的部分則會比較快速地被移除。形成、曝光、以及移除該光阻的製程以及移除該半導體晶圓之一部分的製程可以根據所使用的特殊光阻以及所希的結果來加以修正。
於負向作用光阻之中，光阻會曝露在光之中，並且在一被稱為聚合作用(polymerization)的製程之中從可溶解的狀態改變成不可溶解的狀態。於聚合作用之中，未被聚合的材料會曝露在一光或是能量源之中，而且多個聚合物則會形成一具有抗蝕刻性的交聯材料。於大部分的負向光阻之中，該等聚合物為聚異戊二烯(polyisoprene)。利用化學溶劑或是顯影劑移除該等可溶解的部分(也就是，沒有曝露在光之中的部分)會在該光阻之中留下一個孔洞，其會對應於該主光罩上的一不透明的圖樣。一在該等不透明的區域之中有圖樣存在的遮罩會被稱為透明場遮罩(clear-field mask)。
於正向作用光阻之中，光阻會曝露在光之中，並且在一被稱為可光溶解作用(photosolubilization)的製程之中從相對不可溶解的狀態改變成非常可溶解的狀態。於可光溶解作用之中，該相對不可溶解的光阻會曝露在適當的光能量之中並且被轉換成比較可溶解的狀態。該光阻之經過可光溶解作用的部分會在顯影製程之中被一溶劑移除。基礎的正向光阻聚合物為酚甲醛(phenol formaldehyde)聚合物，其亦稱為酚甲醛酚醛樹脂。利用化學溶劑或是顯影劑移除該等可溶解的部分(也就是，曝露在光之中的部分)會在該光 阻之中留下一個孔洞，其會對應於該主光罩上的透明圖樣。一在該等透明的區域之中有圖樣存在的遮罩會被稱為暗場遮罩(dark-field mask)。
移除該半導體晶圓中沒有被該光阻覆蓋的頂端部分之後，剩餘的光阻會被移除，從而留下一已圖樣化層。或者，某些類型的材料會藉由利用無電極電鍍以及電解質電鍍之類的技術將該材料直接沉積在由前一道沉積/蝕刻製程所形成的區域或是空隙之中而被圖樣化。
在一既有圖樣的上方沉積一薄膜材料可能會擴大下方的圖樣並且產生一不均勻平坦的表面。生產較小且更密集封裝的主動式組件和被動式組件會需要用到均勻平坦的表面。平坦化作用可以被用來從晶圓的表面處移除材料，並且產生一均勻平坦的表面。平坦化作用涉及利用一研磨墊來研磨晶圓的表面。一有磨蝕作用的材料以及腐蝕性的化學藥劑會在研磨期間被加到晶圓的表面。化學藥劑的磨蝕性作用及腐蝕性作用所組成的組合式機械作用會移除任何不規律的拓樸形狀，從而產生一均勻平坦的表面。
後端製造係指將已完成的晶圓切割或單體化裁切成個別的半導體晶粒，並且接著封裝該半導體晶粒，以達結構性支撐及環境隔離的效果。為單體化裁切該半導體晶粒，晶圓會沿著該晶圓中被稱為切割道(saw street)或切割線(scribe)的非功能性區域被刻痕並且折斷。該晶圓會利用雷射切割工具或鋸片來進行單體化裁切。經過單體化裁切之後，該個別的半導體晶粒便會被鑲嵌至一封裝基板，其包 含多根接針或是多個接觸觸墊，用以和其它系統組件進行互連。被形成在該半導體晶粒上方的接觸觸墊接著會被連接至該封裝裡面的接觸觸墊。該等電連接線可利用焊料凸塊、短柱凸塊(stud bump)、導電膏、或是焊線來製成。一囊封劑或是其它模造材料會被沉積在該封裝的上方，用以提供物理性支撐和電隔離。接著，該已完成的封裝便會被插入一電氣系統之中並且讓其它系統組件可以利用該半導體裝置的功能。
圖1所示的係一電子裝置50，其具有一晶片載體基板或是印刷電路板(Printed Circuit Board，PCB)52，在其表面上鑲嵌著複數個半導體封裝。電子裝置50可能具有某一種類型的半導體封裝或是多種類型的半導體封裝，端視應用而定。為達解釋的目的，圖1中便顯示該等不同類型的半導體封裝。
電子裝置50可能係一單機型系統，其會使用該等半導體封裝來實施一或多項電功能。或者，電子裝置50亦可能係一較大型系統中的一子組件。舉例來說，電子裝置50可能係一蜂巢式電話的一部分、一個人數位助理(Personal Digital Assistant，PDA)的一部分、一數位錄像機(Digital Video Camera，DVC)的一部分、或是其它電子通訊裝置的一部分。或者，電子裝置50亦可能係一圖形卡、一網路介面卡、或是能夠被插入一電腦之中的其它訊號處理卡。該半導體封裝可能包含：微處理器、記憶體、特定應用積體電路(Application Specific Integrated Circuits，ASIC)、邏輯 電路、類比電路、RF電路、離散式裝置、或是其它半導體晶粒或電組件。對此等產品來說，若要被市場接受，微型化和減輕重量係必要的。半導體裝置之間的距離必須縮短，以便達到更高的密度。
在圖1中，PCB 52提供一種通用基板，用以結構性支撐及電互連被鑲嵌在該PCB之上的半導體封裝。多條傳導訊號線路54會利用下面製程被形成在PCB 52的一表面上方或是多層裡面：蒸發製程、電解質電鍍製程、無電極電鍍製程、網印製程、或是其它合宜的金屬沉積製程。訊號線路54會在該等半導體封裝、被鑲嵌的組件、以及其它外部系統組件中的每一者之間提供電通訊。線路54還會提供連接至每一個該等半導體封裝的電力連接線及接地連接線。
於某些實施例中，一半導體裝置會有兩個封裝層。第一層封裝係一種用於以機械方式及電氣方式將該半導體晶粒附著至一中間載板的技術。第二層封裝則涉及以機械方式及電氣方式將該中間載板附著至該PCB。於其它實施例中，一半導體裝置可能僅有該第一層封裝，其中，該半導體晶粒會以機械方式及電氣方式直接被鑲嵌至該PCB。
為達解釋的目的，圖中在PCB 52之上顯示數種類型的第一層封裝，其包含焊線封裝56以及覆晶58。除此之外，圖中還顯示被鑲嵌在PCB 52之上的數種類型第二層封裝，其包含：球柵陣列(Ball Grid Array，BGA)60；凸塊晶片載板(Bump Chip Carrier，BCC)62；雙直列封裝(Dual In-line Package，DIP)64；平台格柵陣列(Land Grid Array，LGA)66；多晶片模組(Multi-Chip Module，MCM)68；方形扁平無導線封裝(Quad Flat Non-leaded package，QFN)70；以及方形扁平封裝72。端視系統需求而定，由被配置成具有第一層封裝樣式和第二層封裝樣式之任何組合的半導體封裝以及其它電子組件所組成的任何組合皆能夠被連接至PCB 52。於某些實施例中，電子裝置50包含單一附著半導體封裝；而其它實施例則可能需要多個互連封裝。藉由在單一基板上方組合一或多個半導體封裝，製造商便能夠將事先製造的組件併入電子裝置和系統之中。因為該等半導體封裝包含精密的功能，所以，能夠使用較便宜的組件及有效率的製程來製造電子裝置。所產生的裝置比較不可能會失效而且製造價格較低廉，從而讓消費者會有較低的成本。
圖2a至2c所示的係示範性半導體封裝。圖2a所示的係被鑲嵌在PCB 52之上的DIP 64的進一步細節。半導體晶粒74包含一含有類比電路或數位電路的主動區，該等類比電路或數位電路會被施行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計來進行電互連。舉例來說，該電路可能包含被形成在半導體晶粒74之主動區裡面的一或多個電晶體、二極體、電感器、電容器、電阻器、以及其它電路元件。接觸觸墊76係一或多層傳導材料(例如鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)、或是銀(Ag))，並且會被電連接至形成在半導體晶粒74裡面的電路元件。在DIP 64的組裝期 間，半導體晶粒74會利用一金-矽共熔合金層或是膠黏材料(例如熱環氧樹脂或環氧樹脂)被鑲嵌至一中間載板78。該封裝主體包含一絕緣封裝材料，例如聚合物或是陶瓷。導體導線80以及焊線82會在半導體晶粒74與PCB 52之間提供電互連。囊封劑84會被沉積在該封裝的上方，防止濕氣和粒子進入該封裝並污染半導體晶粒74或焊線82，以達環境保護的目的。
圖2b所示的係被鑲嵌在PCB 52之上的BCC 62的進一步細節。半導體晶粒88會利用底層填充材料或環氧樹脂膠黏材料92被鑲嵌在載板90的上方。焊線94會在接觸觸墊96與98之間提供第一層封裝互連。模造化合物或囊封劑100會被沉積在半導體晶粒88和焊線94的上方，用以為該裝置提供物理性支撐以及電隔離效果。多個接觸觸墊102會利用一合宜的金屬沉積製程(例如電解質電鍍或無電極電鍍)被形成在PCB 52的一表面上方，用以防止氧化。接觸觸墊102會被電連接至PCB 52之中的一或多條傳導訊號線路54。多個凸塊104會被形成在BCC 62的接觸觸墊98和PCB 52的接觸觸墊102之間。
在圖2c中，半導體晶粒58會利用覆晶樣式的第一層封裝以面朝下的方式被鑲嵌至中間載板106。半導體晶粒58的主動區108含有類比電路或數位電路，該等類比電路或數位電路會被施行為根據該晶粒的電氣設計所形成的主動式裝置、被動式裝置、傳導層、以及介電層。舉例來說，該電路可能包含被形成在主動區108裡面的一或多個電晶 體、二極體、電感器、電容器、電阻器、以及其它電路元件。半導體晶粒58會經由多個凸塊110以電氣方式及機械方式被連接至載板106。
BGA 60會利用使用多個凸塊112的BGA樣式第二層封裝以電氣方式及機械方式被連接至PCB 52。半導體晶粒58會經由凸塊110、訊號線114、以及凸塊112被電連接至PCB 52之中的傳導訊號線路54。一模造化合物或囊封劑116會被沉積在半導體晶粒58和載板106的上方，用以為該裝置提供物理性支撐以及電隔離效果。該覆晶半導體裝置會從半導體晶粒58上的主動式裝置至PCB 52上的傳導軌提供一條短的電傳導路徑，用以縮短訊號傳導距離、降低電容、並且改善整體電路效能。於另一實施例中，該半導體晶粒58會利用覆晶樣式的第一層封裝以機械方式及電氣方式直接被連接至PCB 52，而沒有中間載板106。
圖3a至3m配合圖1以及2a至2c顯示用以利用一支撐與保護結構在一半導體裝置之上形成傳導凸塊的一種製程。圖3a所示的係一半導體晶圓120，其具有一基礎基板材料122，例如，矽、鍺、砷化鎵、磷化銦、或是碳化矽，用以達成結構性支撐的目的。複數個半導體晶粒或組件124會被形成在晶圓120之上，如上面所述，它們會藉由一非主動、晶粒內的晶圓區、或是切割道126而被隔開。切割道126會提供多個切割區，用以將半導體晶圓120單體化裁切成個別的半導體晶粒124。
圖3b所示的係半導體晶圓120的一部分的剖視圖。每 一個半導體晶粒124皆具有一背表面128與主動表面130，該主動表面130含有類比電路或數位電路，該等類比電路或數位電路會被施行為被形成在該晶粒裡面的主動式裝置、被動式裝置、傳導層、以及介電層，並且會根據該晶粒的電氣設計與功能來進行電互連。舉例來說，該電路可能包含被形成在主動表面130裡面的一或多個電晶體、二極體、以及其它電路元件，用以施行類比電路或數位電路，例如，數位訊號處理器(Digital Signal Processor，DSP)、ASIC、記憶體、或是其它訊號處理電路。半導體晶粒124可能還含有用於RF訊號處理的整合被動裝置(Integrated Passive Device，IPD)，例如，電感器、電容器、以及電阻器。於其中一實施例中，半導體晶粒124係一覆晶類型的裝置。
一導電層132會使用PVD、CVD、電解質電鍍製程、無電極電鍍製程、或是其它合宜的金屬沉積製程被形成在主動表面130的上方。傳導層132可能係由下面所製成的一或多層：Al、Cu、Sn、Ni、Au、Ag、或是其它合宜的導電材料。傳導層132的操作方式如同被電連接至主動表面130上之電路的多個接觸觸墊。接觸觸墊132可能會以並列的方式被設置在和半導體晶粒124之邊緣相隔一第一距離的地方，如圖3b中所示。或者，接觸觸墊132亦可能會偏移排列在多列之中，俾使得第一列接觸觸墊係被設置在和該晶粒之邊緣相隔一第一距離的地方，而第二列接觸觸墊會錯開該第一列被設置在和該晶粒之邊緣相隔一第二距離 的地方。
圖3c所示的係半導體晶圓120的一部分的放大剖視圖，其重點放在接觸觸墊132以及一緊鄰包圍該接觸觸墊的區域上。一絕緣層或鈍化層134會被形成在主動表面130以及傳導層132的上方，其係利用下面方法所形成：PVD、CVD、印刷、旋塗、噴塗、燒結、或是熱氧化。絕緣層134含有由下面所製成的一或多層：二氧化矽(SiO2)、氮化矽(Si3N4)、氮氧化矽(SiON)、五氧化二鉭(Ta2O5)、三氧化二鋁(Al2O3)、或是具有雷同絕緣特性及結構特性的其它材料。一部分的絕緣層134會藉由一蝕刻製程經由一光阻層(圖中並未顯示)被移除，以便形成多個開口136並且露出傳導層132。或者，開口136係藉由雷射直接燒蝕(Laser Direct Ablation，LDA)利用雷射138所形成，以便移除絕緣層134的一部分並且露出傳導層132。於其中一實施例中，開口136的寬度為15μm至80μm。接觸觸墊132的另一部分會保持被絕緣層134覆蓋。
在圖3d之中，一毯覆傳導層148會利用一圖樣化與金屬沉積製程(例如，印刷、PVD、CVD、電解質電鍍、以及無電極電鍍)被沉積在絕緣層134以及傳導層132之上。於其中一實施例中，毯覆傳導層148的作用如同一晶種層。晶種層148可能係任何合宜的合金晶種層，例如，鈦銅合金(TiCu)、鈦鎢銅合金(TiWCu)、或是氮化鉭-銅合金(TaNCu)。晶種層148會遵循絕緣層134以及傳導層132的外形輪廓。晶種層148會被電連接至傳導層132。
一圖樣化層或光阻層140會利用印刷、旋塗、或是噴塗被形成在晶種層148、絕緣層134、以及傳導層132的上方。於運用一絕緣層來進行圖樣化的某些實施例中，該絕緣層可能包含由下面所製成的一或多層：SiO2、Si3N4、SiON、Ta2O5、Al2O3、或是具有雷同結構特性的其它材料。一部分的光阻層140會藉由一蝕刻製程被移除，以便形成多個開口144。開口144會露出一部分的晶種層148並且係被定位在傳導層132的上方。於其中一實施例中，開口144具有一圓形剖面的區域，其會被配置成用以形成具有包含一圓形剖面之圓柱形狀的傳導凸塊。於另一實施例中，開口144具有一矩形剖面的區域，其會被配置成用以形成具有包含一矩形剖面之立方體形狀的傳導凸塊。
在圖3e之中，一導電層152會使用一圖樣化與金屬沉積製程(例如，印刷、PVD、CVD、濺鍍、電解質電鍍、以及無電極電鍍)被保形塗敷在晶種層148的上方、開口144的裡面。傳導層152可能係由下面所製成的一或多層：Al、Cu、Sn、Ti、Ni、Au、Ag、或是其它合宜的導電材料。於其中一實施例中，傳導層152的作用如同一屏障層，並且可能係Ni、釩化鎳(NiV)、鉑(Pt)、鈀(Pd)、TiW、或是CrCu、或是其它合宜的材料。傳導層152會遵循晶種層148的外形輪廓。傳導層152會被電連接至晶種層148以及傳導層132。
傳導層156會使用一圖樣化與金屬沉積製程(例如，印刷、PVD、CVD、濺鍍、電解質電鍍、以及無電極電鍍)被 保形塗敷在傳導層152的上方。傳導層156可能係由下面所製成的一或多層：Al、Cu、Sn、Ti、Ni、Au、Ag、或是其它合宜的導電材料。於其中一實施例中，傳導層156的作用如同一黏著層，並且可能係Ti、TiN、TiW、Al、或是鉻(Cr)、或是其它合宜的材料。傳導層156會遵循傳導層152的外形輪廓。傳導層156會被電連接至傳導層152、晶種層148、以及傳導層132。
在圖3f之中，一導電膏或是凸塊材料158會利用蒸發製程、電解質電鍍製程、無電極電鍍製程、丸滴製程、或是網印製程被沉積在開口144裡面以及導體層156的上方。傳導凸塊材料158可能係Al、Sn、Ni、Au、Ag、Pb、鉍(Bi)、Cu、銦(In)、焊料、以及它們的組合，其會有一非必要的助熔溶液。舉例來說，該傳導凸塊材料158可能是Sn/Pb共熔合金、高鉛焊料、或是無鉛焊料。傳導凸塊材料158會利用合宜的附著或焊接製程被焊接至傳導層156。傳導凸塊材料158被沉積至開口144之中的體積係由光阻層140的厚度以及開口144的剖面積或孔徑尺寸來控制，從而控制稍後所形成之傳導凸塊的最終尺寸。
在圖3g之中，光阻層140，以及傳導層152與156的覆蓋範圍外面一部分晶種層148，會利用一蝕刻製程被移除。剩餘的晶種層148、傳導層152、以及傳導層156會共同構成凸塊下層金屬(Under Bump Metallization，UBM)層159。複數個凸塊162(其包括一由傳導凸塊材料158與UBM層159所組成的體積)會被電連接至傳導層132。於其中一 實施例中，該凸塊材料會藉由將凸塊材料158加熱至其熔點以上而被回焊。於某些應用中，凸塊162會被二次回焊，以便改善和傳導層156的電接觸效果。凸塊162的高度為H1，其係從絕緣層134的一上方表面延伸至凸塊材料158的一上方表面。
在圖3h之中，一絕緣層170會利用下面方法被沉積在凸塊162以及絕緣層134的上方：PVD、CVD、印刷、旋塗、噴塗、網印、或是層疊。絕緣層170可能係由下面所製成的一或多層：SiO2、Si3N4、SiON、Ta2O5、Al2O3、BCB、聚亞醯胺(PI)、合宜的介電質材料、光敏性或非光敏性聚合物介電質(例如，聚苯并噁唑纖維(PBO))、低溫固化聚合物介電質光阻(舉例來說，小於250℃)、SiN、SiON、或是SiO2、或是具有雷同絕緣特性及結構特性的其它材料。
在圖3i之中，絕緣層170會利用一電漿製程、濕式化學蝕刻、LDA、或是光阻顯影製程被毯覆蝕刻，用以縮減絕緣層170的厚度並且移除絕緣層170中覆蓋凸塊162的部分。於其中一實施例中，可能會在進行光微影顯影製程之前先進行一非必要的遮蔽式UV曝光。剩餘的絕緣層170會構成支撐結構180。
支撐結構180會覆蓋凸塊162的一側壁的一部分、UBM層159的側壁、UBM層159與絕緣層134之間的接面、以及相鄰於UBM層159的絕緣層134。支撐結構180會在材料的膨脹與收縮期間為凸塊162提供結構性支撐並且幫助保持凸塊162與接觸觸墊132之間的電連接。支撐結構180 還會環境密封UBM層159與絕緣層134之間的接面，以便降低IMC之成長的發生機率。支撐結構180還會在凸塊材料158的回焊期間含有多個凸塊162，以便降低相鄰凸塊162之間的橋接或是電短路的發生機率。於其中一實施例中，會使用端末點偵測或是時控蝕刻(time-controlled etching)來確保支撐結構180中相鄰於凸塊162的部分的高度會大於H1的四分之一。
於圖3j之中所示的另一實施例中，支撐結構180會覆蓋凸塊162的側壁的一部分、UBM層159的側壁、UBM層159與絕緣層134之間的接面、以及絕緣層134中相鄰於UBM層159的部分。移除絕緣層170的一部分用以形成支撐結構180的毯覆蝕刻製程還會移除支撐結構180中位於絕緣層134上方的一部分。
圖3k所示的係於支撐結構180已被形成在絕緣層134以及接觸觸墊132的上方之後具有圓形剖面的凸塊162的俯視圖或平面圖。支撐結構180會包圍凸塊材料158。圖3l所示的係於支撐結構180已被形成在絕緣層134以及接觸觸墊132的上方之後具有矩形剖面的凸塊162的俯視圖或平面圖。支撐結構180會包圍凸塊材料158。
於圖3m之中所示的其中一實施例中，凸塊材料158會藉由將傳導凸塊材料158加熱至其熔點以上而被回焊，從而創造凸塊162的半球狀上方表面。於某些應用中，凸塊材料158會被多次回焊，以便改善電氣連接效果以及機械連接效果。支撐結構180在該回焊製程期間含有凸塊材料 158並且會降低相鄰凸塊162之間的橋接或是電短路的發生機率。支撐結構180還會在該回焊製程期間減少IMC的成長。支撐結構180還會在材料的膨脹與收縮期間為凸塊162提供結構性支撐並且在凸塊162與接觸觸墊132之間提供電連接。該裝配件的會沿著切割道126被鋸片或是雷射切割工具200單體化裁切。
圖4所示的係在單體化裁切之後之圖3a至3m中的裝配件。多個接觸觸墊132會被形成在半導體晶粒124的主動表面130的上方，並且會被電連接至UBM層159以及凸塊材料158。凸塊材料158與UBM層159會共同構成多個凸塊162。凸塊162的高度為H1，其係從絕緣層134的上方表面延伸至凸塊162的上方表面。
一絕緣層170會被形成在凸塊162以及半導體晶粒124的上方。絕緣層170會被蝕刻以便移除絕緣層170中覆蓋凸塊162之上方表面的一部分。剩餘的絕緣層170會構成支撐結構180。支撐結構180會覆蓋凸塊162的一側壁的一部分、UBM層159的側壁、UBM層159與絕緣層134之間的接面、以及相鄰於UBM層159的絕緣層134。於其中一實施例中，支撐結構180中相鄰於凸塊162的部分的高度會大於H1的四分之一。
支撐結構180會在材料的膨脹與收縮期間為凸塊162提供結構性支撐並且幫助保持凸塊162與接觸觸墊132之間的電連接。支撐結構180還會環境密封UBM層159與絕緣層134之間的接面，以便降低IMC之成長的發生機率。 支撐結構180還會在凸塊材料158的回焊期間含有多個凸塊162，以便降低相鄰凸塊162之間的橋接或是電短路的發生機率。
圖5a至5n所示的係和圖1以及2a至2c有關之利用支撐結構以及電連接接觸觸墊來形成貫穿一半導體裝置的傳導通道的一種製程。在圖5a之中，一暫時性基板或載板212含有犧牲性基礎材料，例如，矽、聚合物、氧化鈹、玻璃、或是其它合宜的低成本剛性材料，以便達到結構性支撐的目的。一介面層或雙面膠帶213會被形成在載板212的上方，作為一暫時性黏著焊接膜、蝕刻阻止層、或是脫膜層。一半導體晶圓或基板214含有基礎材料，例如，矽、鍺、砷化鎵、磷化銦、或是碳化矽，以便達到結構性支撐的目的。作為半導體晶圓，基板214可能含有嵌入式積體半導體晶粒或是離散裝置。基板214還可能是一多層撓性層疊板、陶瓷板、或是導線架。基板214具有一非主動的晶粒間晶圓區或是切割道216，用以提供一切割區，以便將基板214單體化裁切成如上面所述的個別半導體晶粒。基板214會被鑲嵌至載板212上方的介面層213。複數個盲通道222會利用雷射鑽鑿、機械式鑽鑿、或是DRIE被形成貫穿基板214。於其中一實施例中，盲通道222並不會延伸貫穿整個基板214。
在圖5b之中，盲通道222的側壁會利用PVD、CVD、印刷、旋塗、或是噴塗而被一內襯層225塗佈。內襯層225可能係由下面以及一合宜的傳導膠黏層或屏障層所製成的 一或多層：氮化矽(SiN)、SiON、Ta2O3、或是其它的絕緣薄膜；並且可能包含任何合宜的傳導內襯合金，例如，TaN或TiN、或是任何其它合宜的傳導內襯材料。盲通道222會利用電解質電鍍製程、無電極電鍍製程、或是其它合宜的金屬沉積製程被Al、Cu、Sn、Ni、Au、Ag、Ti、W、多晶矽、或是其它合宜的導電材料填充，以便形成z方向的垂直傳導盲通道226。
在圖5c之中，介面層227會被形成在一暫時性基板或載板228的上方。載板228含有犧牲性基礎材料，例如，矽、聚合物、氧化鈹、玻璃、或是其它合宜的低成本剛性材料，以便達到結構性支撐的目的。介面層227充當一暫時性黏著焊接膜、蝕刻阻止層、或是脫膜層。基板214會被反向並且利用介面層227被鑲嵌在載板228的上方。傳導盲通道226的一表面會接觸介面層227。載板212以及介面層213會藉由下面方式被移除以便露出基板214的一表面：化學性蝕刻、機械性剝離、CMP、機械性研磨、熱烘烤、UV光、雷射掃描、或是濕式剝除。
在圖5d之中，一部分的基板214會藉由下面方式被移除以便露出基板214的一上方表面以及傳導通道226的一上方部分：機械性研磨、化學性蝕刻、化學-機械性平整法、或是反應離子蝕刻(Reactive Ion Etching，RIE)。傳導盲通道226具有剖面寬度W1。於其中一實施例中，寬度W1為10μm。傳導盲通道226的高度為H2，其係從基板214的上方表面延伸至內襯層225中覆蓋著傳導盲通道226之表 面230的部分。
在圖5e之中，內襯層225中覆蓋著傳導盲通道226的部分會藉由下面方式被移除以便露出傳導盲通道226的表面230：機械性研磨、化學性蝕刻、化學-機械性平整法、或是RIE。於內襯層225包含一絕緣材料與一膠黏層或屏障層的實施例中，在移除一部分的內襯層225而露出傳導盲通道226的表面230之後，表面230會提供一接觸表面，以便在傳導盲通道226以及接續形成的傳導層之間達到改善的電互連效果。
於圖5f之中所示的另一實施例中，內襯層225中覆蓋著傳導盲通道226的部分的絕緣薄膜會藉由機械性研磨、化學性蝕刻、化學-機械性平整法、或是RIE被移除；但會留下包含內襯層225之膠黏層或屏障層的傳導材料。內襯層225的剩餘部分會保持覆蓋在傳導盲通道226的表面230的上方並且構成一傳導內襯層231。傳導內襯層231包含該等傳導膠黏層或屏障層、傳導內襯合金、或是內襯層225的傳導內襯材料。移除內襯層225的絕緣薄膜用以在傳導盲通道226的表面230上方形成傳導內襯層231會在傳導盲通道226以及接續形成的傳導層之間達到改善的電互連效果。
接續圖5f，一絕緣層232會利用下面方法被沉積在基板214以及傳導通道226的上方：PVD、CVD、印刷、旋塗、噴塗、網印、或是層疊，如圖5g中所示。絕緣層232可能係由下面所製成的一或多層：SiO2、Si3N4、SiON、Ta2O5、 Al2O3、BCB、聚亞醯胺(PI)、合宜的介電質材料、光敏性或非光敏性聚合物介電質(例如，聚苯并噁唑纖維(PBO))、低溫固化聚合物介電質光阻(舉例來說，小於250℃)、SiN、SiON、或是SiO2、或是具有雷同絕緣特性及結構特性的其它材料。
在圖5h之中，絕緣層232會利用一電漿製程、濕式化學蝕刻、LDA、或是光阻顯影製程被毯覆蝕刻，用以縮減絕緣層232的厚度並且用以移除絕緣層232中覆蓋傳導通道226之上方表面的部分。於其中一實施例中，絕緣層232的毯覆蝕刻製程可能還會移除內襯層225中覆蓋傳導盲通道226之上方表面的部分，以便露出傳導盲通道226的表面230。於內襯層225係一絕緣材料的實施例中，移除一部分的內襯層225用以露出傳導盲通道226的表面230，表面230便會提供一接觸表面，以便在傳導盲通道226以及接續形成的傳導層之間達到電互連效果。於內襯層225係一傳導合金的實施例中，露出傳導盲通道226的表面230會在傳導盲通道226以及接續形成的傳導層之間達到改善的電互連效果。在該毯覆蝕刻製程之後，絕緣層232的剩餘部分會構成支撐結構236。
支撐結構236會覆蓋傳導通道226的一側壁的一部分、傳導通道226之間的接面、以及相鄰於傳導通道226的基板214。支撐結構236會在材料的膨脹與收縮期間為傳導通道226提供結構性支撐。支撐結構236還會環境密封傳導通道226與基板214之間的接面，以便降低IMC之成 長的發生機率。於其中一實施例中，會使用端末點偵測或是時控蝕刻來確保支撐結構236中相鄰於傳導通道226的部分的高度會大於H2的四分之一。
於圖5i之中所示的另一實施例中，支撐結構236會覆蓋傳導通道226的側壁的一部分、傳導通道226與基板214之間的接面、以及基板214中相鄰於傳導通道226的部分。移除絕緣層232的一部分用以形成支撐結構236的毯覆蝕刻製程還會移除支撐結構236中位於絕緣層232上方的一部分。
接續圖5h，一導電層242會利用PVD、CVD、電解質電鍍製程、無電極電鍍製程、或是其它合宜的金屬沉積製程被形成在支撐結構236、基板214、以及傳導通道226的上方，如圖5j中所示。傳導層242可能係由下面所製成的一或多層：Al、Cu、Sn、Ni、Au、Ag、或是其它合宜的導電材料。傳導層242的操作方式如同被電連接至傳導通道226的多個接觸觸墊，但是，上方表面積大於傳導通道226的上方表面積。
在圖5k之中，一絕緣層或鈍化層244會被形成在基板214、支撐結構236、以及傳導層242的上方，其係利用下面方法所形成：PVD、CVD、印刷、旋塗、噴塗、燒結、或是熱氧化。絕緣層244含有由下面所製成的一或多層：SiO2、Si3N4、SiON、Ta2O5、Al2O3、或是具有雷同絕緣特性及結構特性的其它材料。
在圖5l之中，一部分的絕緣層244會藉由一蝕刻製程 經由一光阻層(圖中並未顯示)被移除，以便形成多個開口248並且露出傳導層242。或者，開口248係藉由LDA利用雷射249所形成，以便移除絕緣層244的一部分並且露出傳導層242。於其中一實施例中，開口248的剖面寬度大於寬度W1。接觸觸墊242的另一部分會保持被絕緣層244覆蓋。開口248的側壁可能具有漸細、筆直、或是階梯狀的輪廓。於其中一實施例中，開口248的剖面積大於傳導通道226的上方表面的表面積。
圖5m所示的係圖5l之裝配件的俯視圖或平面圖，其具有圓形剖面的多個開口248，用以露出傳導層242的上方表面的一部分。於其中一實施例中，傳導層242的裸露表面的表面積會大於傳導通道226的上方表面的表面積。圖5n所示的係圖5l之裝配件的俯視圖或平面圖，其具有矩形剖面的多個開口248，用以露出傳導層242的上方表面的一部分。於其中一實施例中，傳導層242的裸露表面的表面積會大於傳導通道226的上方表面的表面積。因為裸露的傳導表面大於傳導通道226的表面積，所以和額外電子裝置的電連接的對齊排列、功能、以及可靠性會獲得改善。
在圖5o之中，會利用鋸片或是雷射切割工具250來單體化裁切圖5k中的裝配件，使其貫穿絕緣層244、支撐結構236、基板214、以及切割道126，變成個別的半導體封裝252。
圖6所示的係單體化裁切之後的半導體封裝252。多條傳導通道226會被形成貫穿基板214並且具有高度H2，其 係從基板214的上方表面延伸至傳導通道226的上方表面。
一絕緣層232會被形成在傳導通道226以及基板214的上方。絕緣層232會被蝕刻，以便移除絕緣層232中覆蓋傳導通道226之上方表面的一部分。剩餘的絕緣層232會構成支撐結構236。支撐結構236會覆蓋傳導通道226的一側壁的一部分、傳導通道226與基板214之間的接面、以及相鄰於傳導通道226的基板214。於其中一實施例中，支撐結構236中相鄰於傳導通道226的部分的高度會大於H2的四分之一。
支撐結構236會在傳導通道226與基板214的膨脹與收縮期間為傳導通道226提供結構性支撐。支撐結構236還會環境密封傳導通道226與基板214之間的接面，以便降低IMC之成長的發生機率。
傳導層242會被形成在支撐結構236、傳導通道226、以及基板214的上方並且操作方式如同一接觸觸墊。傳導層242會被電連接至傳導通道226，其表面積大於傳導通道226的表面積。絕緣層244係被形成在傳導層242的上方，而且一部分的絕緣層244會藉由一蝕刻製程被移除，用以創造多個開口248。於其中一實施例中，開口248的剖面積大於傳導通道226的上方表面。因為裸露的傳導表面大於傳導通道226的表面積，所以和額外電子裝置的電連接的對齊排列、功能、以及可靠性會獲得改善。
本文雖然已經詳細解釋本發明的一或多個實施例；但是，熟習本技術的人士便會明白，可以對此等實施例進行 修正與更動，其並不會脫離如後面的申請專利範圍之中所提出之本發明的範疇。
50‧‧‧電子裝置
52‧‧‧晶片載體基板或是印刷電路板(PCB)
54‧‧‧傳導訊號線路
56‧‧‧焊線封裝
58‧‧‧覆晶
60‧‧‧球柵陣列(BGA)
62‧‧‧凸塊晶片載板(BCC)
64‧‧‧雙直列封裝(DIP)
66‧‧‧平台格柵陣列(LGA)
68‧‧‧多晶片模組(MCM)
70‧‧‧方形扁平無導線封裝(QFN)
72‧‧‧方形扁平封裝
74‧‧‧半導體晶粒
76‧‧‧接觸觸墊
78‧‧‧中間載板
80‧‧‧導體導線
82‧‧‧焊線
84‧‧‧囊封劑
88‧‧‧半導體晶粒
90‧‧‧載板
92‧‧‧底層填充或環氧樹脂膠黏材料
94‧‧‧焊線
96,98‧‧‧接觸觸墊
100‧‧‧模造化合物或囊封劑
102‧‧‧接觸觸墊
104‧‧‧凸塊
106‧‧‧中間載板
108‧‧‧主動區
110‧‧‧凸塊
112‧‧‧凸塊
114‧‧‧訊號線
116‧‧‧模造化合物或囊封劑
120‧‧‧半導體晶圓
122‧‧‧基礎基板材料
124‧‧‧半導體晶粒或組件
126‧‧‧切割道
128‧‧‧背表面
130‧‧‧主動表面
132‧‧‧導電層
134‧‧‧絕緣層或鈍化層
136‧‧‧開口
138‧‧‧雷射
140‧‧‧圖樣化層或光阻層
144‧‧‧開口
148‧‧‧毯覆傳導層/晶種層
152‧‧‧導電層
156‧‧‧傳導層
158‧‧‧導電膏或是凸塊材料
159‧‧‧凸塊下層金屬(UBM)層
162‧‧‧凸塊
170‧‧‧絕緣層
180‧‧‧支撐結構
200‧‧‧鋸片或是雷射切割工具
212‧‧‧暫時性基板或載板
213‧‧‧介面層或雙面膠帶
214‧‧‧半導體晶圓或基板
216‧‧‧非主動的晶粒間晶圓區或是切割道
222‧‧‧盲通道
225‧‧‧內襯層
226‧‧‧盲通道
227‧‧‧介面層
228‧‧‧暫時性基板或載板
230‧‧‧表面
231‧‧‧傳導內襯層
232‧‧‧絕緣層
236‧‧‧支撐結構
242‧‧‧導電層
244‧‧‧絕緣層或鈍化層
248‧‧‧開口
249‧‧‧利用雷射的LDA
250‧‧‧鋸片或是雷射切割工具
252‧‧‧半導體封裝
H1,H2‧‧‧高度
W1‧‧‧寬度
圖1所示的係一印刷電路板，在其表面上鑲嵌著不同類型的封裝；圖2a至2c所示的係被鑲嵌至該印刷電路板的代表性半導體封裝的進一步細節；圖3a至3m所示的係利用一支撐與保護結構在一半導體裝置之上形成傳導凸塊的一種製程；圖4所示的係具有多個傳導凸塊的一半導體裝置，其具有一支撐與保護結構；圖5a至5o所示的係利用一支撐與保護結構以及多個電連接接觸觸墊來形成貫穿一半導體裝置的傳導通道的一種製程；以及圖6所示的係貫穿一半導體裝置的多條傳導通道，其具有一支撐與保護結構以及多個電連接接觸觸墊。
122‧‧‧基礎基板材料
132‧‧‧導電層
134‧‧‧絕緣層或鈍化層
148‧‧‧毯覆傳導層/晶種層
152‧‧‧導電層
156‧‧‧傳導層
158‧‧‧導電膏或是凸塊材料
159‧‧‧凸塊下層金屬(UBM)層
162‧‧‧凸塊
180‧‧‧支撐結構
200‧‧‧鋸片或是雷射切割工具

Claims (9)

  1. 一種製造半導體裝置的方法，其包括：提供一具有複數個接觸觸墊的半導體晶圓；於該半導體晶圓以及該等接觸觸墊的上方形成一第一絕緣層；在該等接觸觸墊以及該第一絕緣層的上方形成一凸塊下層金屬層(under bump metallization layer)；於該凸塊下層金屬層的上方形成複數個凸塊；於該半導體晶圓的上方形成一第二絕緣層，用以覆蓋該第一絕緣層、該凸塊下層金屬層的側壁、該等凸塊的側壁、以及該等凸塊的上方表面；以及蝕刻該第二絕緣層以移除該第二絕緣層中覆蓋該等凸塊之上方表面的一部分以及該凸塊的側壁的一第一部分，同時保持該第二絕緣層覆蓋在該等凸塊的側壁的一第二部分上方以及該凸塊下層金屬層的側壁的上方，以便為該等凸塊提供結構性支撐並且防止金屬間化合物的成長。
  2. 如申請專利範圍第1項的方法，其中，在移除該第二絕緣層的該部分之後，該第二絕緣層在該等凸塊之側壁處的厚度是大於該等凸塊的高度的四分之一。
  3. 如申請專利範圍第1項的方法，其中，移除該第二絕緣層的該部分進一步包含保持該第二絕緣層覆蓋在該等凸塊之覆蓋範圍以外的該第一絕緣層的上方。
  4. 如申請專利範圍第1項的方法，其中，形成該凸塊下層金屬層進一步包含： 在該等複數個接觸觸墊的上方形成一黏著層；在該黏著層的上方形成一屏障層；以及在該屏障層的上方形成一潤濕層。
  5. 一種製造半導體裝置的方法，其包括：提供一基板；形成一傳導互連結構，其穿過該基板並且其具有一高度，該高度會延伸超過該基板的一表面；形成一絕緣層於該基板的該表面的上方並且其完全覆蓋該傳導互連結構；以及移除該絕緣層的一部分從在該傳導互連結構的一側壁的一第一部份的上方並且向下至該基板的該表面，同時保持該絕緣層覆蓋在該傳導互連結構的該側壁的一第二部份的上方。
  6. 如申請專利範圍第5項的方法，其進一步包含移除該基板的一部份以露出該傳導互連結構。
  7. 如申請專利範圍第5項的方法，進一步包含：形成複數條通道貫穿該該基板；以及沉積一線性層於該些通道中。
  8. 如申請專利範圍第5項的方法，其中，在移除該絕緣層的該部分之後，該絕緣層的厚度是大於該傳導互連結構中延伸超過該基板之表面的高度的四分之一。
  9. 如申請專利範圍第5項的方法，其進一步包含在該傳導互連結構的該側壁的該第一部份上形成一傳導層。
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