TWI463581B - 半導體元件以及提供共同電壓匯流排與銲線可接合重新分配的方法 - Google Patents

半導體元件以及提供共同電壓匯流排與銲線可接合重新分配的方法 Download PDF

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TWI463581B
TWI463581B TW097128550A TW97128550A TWI463581B TW I463581 B TWI463581 B TW I463581B TW 097128550 A TW097128550 A TW 097128550A TW 97128550 A TW97128550 A TW 97128550A TW I463581 B TWI463581 B TW I463581B
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layer
wafer
semiconductor
contact pads
deposited
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TW097128550A
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TW200917393A (en
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Byung Tai Do
Stephen A Murphy
Yaojian Lin
Heap Hoe Kuan
Pandi Chelvam Marimuthu
Hin Hwa Goh
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Stats Chippac Ltd
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Description

半導體元件以及提供共同電壓匯流排與銲線可接合重新分配的方法
本發明一般係關於半導體元件以及，更特別地，係關於具有大型導電匯流排或銲線可接合區域的半導體元件。
主張國內優先權
本非臨時申請案係主張於2007年7月30日所提申之美國臨時申請案第60/952,789號及於2007年11月1日所提申之美國臨時申請案第60/984,666號之權益。
半導體元件係用於娛樂、通訊、網路、電腦，以及家用市場領域之許多產品中。半導體元件係亦用於軍用、航空、汽車、工業控制器以及辦公室設備中。該半導體元件係實行每一該些應用所需要的各種電氣功能。
半導體元件係藉由使用半導體材料的電氣性質以操作。一般而言，半導體材料具有在導體及絕緣體之間變化的電氣性質。在大多數的情況中，半導體具有較差的電氣導電性，然而其導電性係能通過掺雜及/或外加電場的使用以被修改。掺雜係涉及引入雜質於該半導體材料中以調整其之電氣性質。取決於所使用的掺雜量，半導體材料可永久地被修改變以傳導導電性以及修改為其它導體或作為絕緣體。藉由修改在材料內之導電粒子的分布，電場的施加亦可修改半導體材料的導電性。透過掺雜及電場的施加，積體電路係被形成以及被操作於一半導體基板上。該等電 路係包括多層的半導體、絕緣體以及導電性材料。
因為半導體材料的電氣性質可藉由電場的施加被變更，所以半導體材料係可被用來製造被動以及主動電路單元。被動電路單元係包括電容器、電感器、電阻器以及其它不能夠功率增益的電路單元。然而，主動電路單元係包括電晶體以及容許電路的建立，其係能放大又切換電氣訊號。電晶體係近代計算機系統的基本單元，以及容許邏輯電路的形成，其係包括複雜的功能性以及提供高性能。
許多電晶體可被結合於半導體晶圓或基板上所形成的單一積體電路。積體電路結合許多電晶體以及其它被動及主動電路單元於單一基板上，以提供諸如處理器、微控制器、數位訊號處理器以及記憶系統之複雜電子電路。近代積體電路可包括數以千萬計之電晶體，以及提供所有計算機系統的複雜功能。在電子系統中之積體電路以及其它半導體元件係在一小面積中提供高性能，並且係可使用有效成本製造製程而被建立。
該半導體元件以及積體電路的製造係涉及一具有複數個晶粒之晶圓的形成。每一個半導體晶粒係含有電晶體以及其它主動及被動電路單元，其實行各種電氣功能。對於一給定晶圓，每一個來自該晶圓之晶粒係典型地實行相同的電氣功能。半導體元件係以兩個被稱為前段以及後段製造的步驟而被形成，其涉及晶粒的形成以及對於一終端使用者之封裝。
前段製造一般係指在該晶圓上形成半導體元件。在形 成該元件期間，數層諸如二氧化矽的介電材料係被沉積於晶圓上。該介電係便利電晶體以及記憶電路的形成。金屬層係沉積於晶圓之上，並且被圖案化以互連各種半導體元件。該完成的晶圓係具有一作用側，其包括該電晶體以及其它主動和被動構件。在該元件被形成後，該元件係於初步測試步驟中被測試以驗證該元件為可操作的。假如足夠的高數量元件被發現含有缺陷，則該元件或甚至整個晶圓係可被報廢。
後段製造係指切割或單粒化完成之晶圓以形成單獨晶粒，並且隨後封裝該晶粒以用於結構支撐與環境隔離。為單粒化該晶粒，該晶圓係沿著其之被稱為切割道(saw street)或劃割的無功能區域被刻劃以及切斷。於某些情況中，該晶圓係使用雷射裁剪元件而被單粒化。在單粒化之後，該單獨晶粒係被黏著於封裝基板上，其包括用於與其它系統構件互連之插針或構件接觸銲墊。形成於該半導體晶粒上之接觸銲墊係隨後被連接於在封裝內的接觸銲墊。經常，銲線接合係被用來製作連接，然而其它諸如錫鉛凸塊或銲線凸塊接合(stud bumping)的連接技術係可被使用。在銲線接合之後，囊封材料或其它造膜材料係被沉積於該封裝上以提供實體支撐及電氣絕緣。該完成的封裝係隨後被插入於一電氣系統中，以及半導體元件的功能係被製作以可取用於其它系統構件。
半導體製造的一個目標係製造合適用於較快速、可靠、較小以及在低成本下之高密度積體電路的封裝。覆晶 封裝或晶圓級封裝係理想上適合於需要高速、高密度以及更多插針計數的積體電路。覆晶型封裝係涉及將該晶粒的作用側面向下朝著晶片載體基板或印刷電路板(PCB)黏著。在晶粒上的電路單元及在載體基板上的導電跡線之間的電氣及機械互連係透過包括許多導電性錫鉛凸塊或球的錫鉛凸塊結構以達成。該等錫鉛凸塊係藉由一被施加於錫鉛材料之一回流製程而被形成，其中該銲接材料係被沉積於該半導體基板上所佈置的接觸銲墊上。該等錫鉛凸塊係隨後銲接於該載體基板。該覆晶半導體封裝提供一自該晶粒上的主動電路單元至該載體基板之短電氣導電路徑，以為減少訊號傳播距離、降低電容，及達到總體較佳之電路性能。
通常該半導體封裝係包括多個具有共同電壓匯流排的晶粒。該等匯流排係包括諸如被形成於相對大面積上之銅的導電材料。雖然該等匯流排容許數個具有共用電壓的晶粒互連，但是大面積的厚導電性材料係產生高程度的殘餘應力。該應力係能對IC主動電路造成損害以及造成一般封裝可靠度的問題。
於傳統封裝中，接觸銲墊係形成於封裝上以用於電氣互連。該互連經常係使用被連接至該封裝上形成之接觸銲墊的銲線接合而被形成。形成傳統銲線接合互連結構係需要高成本的前段晶圓製程，其係包括化學機械研磨(CMP)、化學氣相沉積(CVD)、以及反應性離子蝕刻(RIE)，以形成用於銲線接合的經重新繞線周邊輸入/輸出 銲墊。該等周邊輸入/輸出銲墊係昂貴的，並且係導致一具有相對大佔位空間(footprint)之封裝。
在一個實施例中，本發明係一種製作半導體元件的方法，其係包括提供一具有複數個半導體晶粒的晶圓。該晶圓係具有被形成於該晶圓之一表面上的接觸銲墊。該方法係包括形成一鈍化層於該晶圓上，以及形成一應力緩衝層於該鈍化層上。該應力緩衝層係被圖案化以曝光該等接觸銲墊。該方法係包括沉積一金屬層於該應力緩衝層上。該金屬層係提供一用於該半導體元件的共用電壓匯流排，以及係在與該等接觸銲墊進行電氣通訊。該方法係包括形成一互連結構於該金屬層上。
於另一個實施例中，本發明係一種製作半導體元件的方法，其係包括提供一具有複數個半導體晶粒的晶圓。該晶圓係具有被形成於該晶圓之一表面上的接觸銲墊。該方法係包括形成一鈍化層於該晶圓上。該鈍化層係被圖案化以曝光該等接觸銲墊。該方法係包括形成一黏著層於該晶圓上，以及形成一種晶層於該黏著層上。該種晶層係與該等接觸銲墊進行電氣通訊。該方法係包括沉積一光阻材料於該晶圓上，以及鍍層一金屬層於該晶圓上。該金屬層係依據該光阻材料而被圖案化。該方法係包括移除該光阻材料、蝕刻該種晶層之一部分以及該黏著層以曝光該鈍化層的一部份、沉積一銲線可接合層於該金屬層上、以及連接 銲線接合至該銲線可接合層。
在另一個實施例中，本發明係一種製作半導體元件的方法，其係包括提供一半導體晶粒，以及形成一種晶層於該半導體晶粒上。該種晶層係與該半導體晶粒之接觸銲墊進行電氣通訊。該方法係包括鍍層一金屬層於該半導體晶粒上。該金屬層係提供一共用電壓匯流排予該半導體元件。該方法係包括連接銲線接合至該金屬層。
在另一個實施例中，本發明係一半導體元件，其包括一半導體晶粒，以及一形成於該半導體晶粒上的種晶層。該種晶層係與該半導體晶粒之一接觸銲墊進行電氣通訊。該半導體元件係包括被鍍層於該半導體晶粒上的金屬層。該金屬層係提供一共同電壓匯流排予該半導體元件。該半導體元件係包括被連接至該金屬層的銲線接合。
本發明係描述一或多個於下列參考圖式之描述的實施例，其中相似的數字係表示相同或類似的單元。儘管本發明以用於達成本發明之目標的最佳模式所描述，但可被熟悉本項技術人士所了解的是：其意圖以涵蓋如被包括在如由所附加申請專利範圍所定義之發明的精神與範疇以及其由下文揭示內容及圖式所支持的對等物內的替代例、修改例以及對等例。
半導體元件的製造係涉及形成具有複數個晶粒的晶圓。各晶粒係含有數以百計或數以千計的電晶體以及其它 實行一個或更多電氣功能的主動和被動電路單元。對於一給定晶圓，來自該晶圓的各晶粒典型地實行相同的電氣功能。前段製造一般係指在晶圓上形成半導體元件。完成的晶圓係具有含有電晶體及其它主動和被動構件之作用側。後段製造係指將晶圓切割或單粒化成單獨晶粒，以及係隨後封裝該晶粒以用於結構支撐及/或環境隔離。
一半導體晶圓一般係包括一作用表面，其係具有被佈置於其上的半導體元件；以及一背側表面，其係以例如矽之表體半導體材料所形成。作用側表面係包括複數個半導體晶粒。該作用表面係藉由各種半導體製程所形成，其係包括疊層(layering)、圖案化、掺雜以及熱處理。在該疊層製程中，半導體材料係藉由涉及熱氧化、氮化、化學氣相沉積、蒸鍍及濺鍍之技術而被成長或沉積於該基板上。光蝕刻微影(photolithography)係包括表面區域的遮罩以及將不想要之材料蝕刻除掉以形成特定結構。掺雜製程係藉由熱擴散或離子植入以注入掺雜材料的濃度。
圖1係說明電子元件10，其係具有一晶片載體基板或是印刷電路板(PCB)12，其係具有複數個被黏著於其表面上的半導體封裝或半導體晶粒。取決於應用，電子元件10可具有一種型式之半導體封裝、或多種型式之半導體封裝。不同型式之半導體封裝係顯示於圖1以用於說明之目的。
電子元件10係可為一獨立系統，其係使用半導體封裝以實行一電氣功能。另或者，電子元件10係可為一較大系 統之一次構件。例如，電子元件10係可為一繪圖卡、網路介面卡，或其它訊號處理卡，其係能被插入於一電腦之中。該半導體封裝係能包括微處理器、記憶體、特定用途積體電路(ASIC)、邏輯電路、類比電路、射頻(RF)電路、離散(discrete)電路單元，或是其它半導體晶粒或電氣構件。
於圖1中，印刷電路板12係提供用於結構支撐之一般基板，以及該等半導體封裝與被黏著於該印刷電路板上之其它電子構件的電氣互連。導電訊號跡線14係使用蒸鍍、電解電鍍、無電極電鍍、網板印刷(screen printing)或其它合適的金屬沉積製程，而被形成於該印刷電路板12之一表面上或疊層內。單一跡線14係提供在各半導體封裝、經黏著構件、以及任何經連接外部系統構件之間的電氣通訊。跡線14係亦提供電源及接地連接至各半導體封裝。
為說明之目的，包括一種雙直列封裝(DIP)、經銲線接合晶粒18、凸塊晶片載體(BCC)20、以及覆晶封裝22之數個型式的半導體封裝係被顯示黏著於印刷電路板12上。取決於系統需要，任何半導體封裝或其它電子構件之結合係能被連接至印刷電路板12上。在某些實施例中，當其它的實施例需要多重經互連封裝時，電子元件10係包括一單一經貼附半導體封裝。藉由結合一個或更多半導體封裝於一單一基板上，製造商係能將一預製構件併入電子元件及系統中。因為該等半導體封裝包括複雜的功能並且代表已知合格單元(KGU)，所以電子元件係能使用較便宜 構件而被製造以及係縮短該製造製程。所生成元件係較不可能失敗，並且對於製造上係較不昂貴而導致對於消費者的較低成本。
圖2a係說明黏著於印刷電路板12上之雙直列封裝16的進一步細節。雙直列封裝16係包括具有接觸銲墊26的半導體晶粒24。半導體晶粒24係包括一主動區域，其係含被形成於半導體晶粒24內及根據該晶粒之電子設計的電氣互連而被實施作為主動元件、被動元件、導電層以及介電層的類比或數位電路。舉例來說，該電路係可包括一個或更多電晶體、二極體、電感器、電容器、電阻器、以及其它電路單元，其形成於該晶粒24之作用區域內。接觸銲墊26係以導電材料而製作，該導電材料係諸如鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)或是銀(Ag)，並且係電氣連接至被形成於該晶粒24內的電路單元。接觸銲墊26係藉一物理氣相沉積(PVD)、化學氣相沉積(CVD)、電解電鍍、或是無電極電鍍製程所形成。在雙直列封裝16之組裝期間，該半導體晶粒24係使用一金－矽共晶層或是諸如熱環氧樹脂之黏著材料而被黏著於封裝本體的較低部份28之一晶粒貼附區域。該封裝本體係包括一諸如塑膠或陶瓷的絕緣封裝材料。導體引線30係被連接至本體的較低部份28上，並且接合銲線32係被形成於鉛30以及晶粒24的接觸銲墊26之間。囊封材料34係被沉積於該封裝上，以用於避免水氣和微粒進入封裝以及汙染晶粒24、接觸銲墊26、或是接合銲線32的環境保護。雙直列封 裝16係藉由將鉛30插入所形成穿過印刷電路板12的孔洞而被連接至印刷電路板12。銲接材料36係於鉛30附近流動並且係流入該孔洞，以實質上和電氣上地將雙直列封裝16連接至印刷電路板12。銲接材料36係可為任何一具有選擇性助熔材料之金屬或電氣導電材料，例如：錫、鉛(Pb)、金、銀、銅、鋅(Zn)、鉍(Bi)以及前者之合金。例如，該銲接材料係能為共晶錫/鉛、高鉛或無鉛。
參考圖2b，一具有接觸銲墊之經銲線接合晶粒18係使用黏著材料40而被黏著於印刷電路板12上。接觸銲墊42係被形成於印刷電路板12的表面上，以及係電氣連接至一個或更多被形成在印刷電路板12的疊層上或內的跡線14。接合銲線44係被形成在晶粒18的接觸銲墊38以及印刷電路板12的接觸銲墊42之間。
圖2c係說明具有一經合併半導體晶粒、積體電路(IC)或兩者組合之凸塊晶片載體20的進一步細節。具有接觸銲墊48的半導體晶粒46係使用一未充滿或環氧樹脂黏著材料50而被黏著於一載體上。半導體晶粒46係包括一作用區域，其係含有被形成於半導體晶粒46內並且根據該晶粒之電子設計的電氣互連而被實施作為主動元件、被動元件、導電層以及介電層的類比或是數位電路。例如，該電路係可包括一個或更多電晶體、二極體、電感器、電容器、電阻器、以及其它被形成於該晶粒46之作用區域內的電路單元。接觸銲墊48係被連接至所形成於該晶粒46的作用區域內的電氣元件以及電路系統。接合銲線54以及接合銲 墊56與58係將該晶粒46之接觸銲墊48電氣連接至凸塊晶片載體20的接觸銲墊52。造膜化合物或是囊封材料60係被沉積於晶粒46、接合銲線54、以及接觸銲墊52上，以提供實質支撐與電氣絕緣予該元件。接觸銲墊64係被形成於印刷電路板12上，並且係電氣連接至一個或更多導電訊號跡線14。銲接材料係被沉積在凸塊晶片載體20的接觸銲墊52以及印刷電路板12的接觸銲墊64之間。該銲接材料係被回流以形成凸塊66，其係形成一在凸塊晶片載體20及印刷電路板12之間的機械以及電氣連接。
於圖2d中，覆晶型半導體元件22係具有一半導體晶粒72，並且其係含有面向下朝著印刷電路板12所黏著的作用區域70。含有被實施作為於該半導體晶粒72內所形成之主動元件、被動元件、導電層、以及介電層的類比或數位電路之作用區域70係根據該晶粒的電氣設計而被電氣互連。例如，該電路係可包括一個或更多電晶體、二極體、電感器、電容器、電阻器、以及其它被形成於該晶粒72之作用區域70內的電路單元。該電氣以及機械互連係透過包括許多獨立導電錫鉛凸塊或球型78之錫鉛凸塊結構76所達成。該等錫鉛凸塊係被形成於凸塊銲墊或互連位置80上，其係被佈置於作用區域70上。該等凸塊銲墊80係藉於該作用區域70中的導電跡線而連接至該等主動電路。該等錫鉛凸塊78係藉由一銲接回流製程而電氣及機械地被連接至印刷電路板12上的接觸銲墊或互連位置。該等互連位置82係被電氣連接至一個或更多於印刷電路板12上的導 電訊號跡線14。該覆晶半導體元件係提供一自晶粒72上之主動元件至印刷電路板12上之傳導跡線的短電氣傳導路線，以為減少訊號傳播距離、較低的電容，以及達到總體較佳電路性能。
圖3a－3d係說明一種形成半導體元件99之方法，該半導體元件99係具有一被形成於一應力緩衝層上之共同電壓匯流排。晶圓100係包括矽(Si)、砷化鎵(GaAs)或其它基板材料。電路單元係被形成於該晶圓100上。該等電路單元係可為主動或是被動，並且係包括電阻器、電容器、電晶體，以及電感器。該等電路單元係由經圖案化導電性、電阻性、以及介電層所組成，並且係使用如上文所述晶圓級製造製程所形成。在一個實施例中，晶圓100係包括一積體電路功率元件晶圓，並且係包括一個或更多被形成於該晶圓100上的功率電路單元。接觸銲墊或是最終金屬銲墊102係使用一物理氣相沉積(PVD)、化學氣相沉積(CVD)、電解電鍍、或是無電極電鍍製程而被形成於該晶圓100上。接觸銲墊102係以諸如鋁、銅、錫(Sn)、鎳、金或是銀的導電性材料所製成，並且係電氣連接至倍形成於該晶圓100上的電路單元。鈍化層104係被形成於該晶圓100以及接觸銲墊102上。鈍化層104係被圖案化或是被蝕刻以曝光接觸銲墊102，並且係包括一諸如聚醯亞胺、苯環丁烯(BCB)、聚苯並噁唑(PBO)、環氧基絕緣聚合物、或是其他絕緣聚合物材料的絕緣材料。鈍化層104係提供實體支撐以及電氣絕緣。應力緩衝層106係被形成 於鈍化層104及晶圓100上。在一個實施例中，應力緩衝層106係被塗佈以及被圖案化於晶圓100的一表面上。應力緩衝層106係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其他絕緣緩衝材料。應力緩衝層106係被圖案化以曝光接觸銲墊102。
轉至圖3b，共同電壓匯流排114係被黏著於應力緩衝層106上。為黏著共同電壓匯流排114，黏著層108係以一共性覆膜(conformal coating)方式被沉積於在應力緩衝層106上，並且係包括鈦(Ti)、鈦鎢(TiW)、鉭(Ta)、氮化鉭(TaN)、鉻(Cr)、鋁、或是另外的電氣導電黏著材料。黏著層108係透過該應力緩衝層106的經蝕刻部份而被電氣連接至接觸銲墊102。阻隔層110係被圖案化並且係以一共性覆膜方式而被沉積在黏著層108上。阻隔層110係包括鎳釩(NiV)、鉻銅(CrCu)、氮化鉭、氮化鈦(TiN)、鎳、或是其它導電緩衝材料。種晶層112係被圖案化並且係以一共性覆膜方式而被沉積在阻隔層110上。種晶層112係包括鋁、鋁合金、銅、金、或是另外的導電性材料。
共同電壓匯流排114係被沉積以及被圖案化於種晶層112上。共同電壓匯流排114係可以選擇性鍍層或是回蝕製程而被沉積予圖案化，並且係包括鋁、鋁合金、銅、金、或其它導電性材料。共同電壓匯流排114係包括一單一導電單元，以及係被黏著為與接觸銲墊102以及於被連接至接觸銲墊102的晶圓100上所形成之電路單元進行電氣通訊。外部電壓源係可被連接至共同電壓匯流排114，以供應 電源或是接地(例如：＋5伏特或是0伏特)至接觸銲墊102以及電路單元。類似地，訊號源係可被連接至共同電壓匯流排114，以供應訊號至晶圓100之複數個電路單元。因此，共同電壓匯流排114係提供一相對大面積的導電結構，其係容許一個或更多被連接至該半導體元件99並且被放置為與該晶圓100上所形成之複數個接觸銲墊進行電氣通訊的外部能量供應。另或者，例如在一邏輯電路中，共同電壓匯流排114係能被用來結合複數個接觸銲墊之輸出。再者，因為共同電壓匯流排114、黏著層108、阻隔層110、以及種晶層112被黏著於應力緩衝層106上，所以半導體元件99係被保護以避免於元件99內所產生的殘餘應力。
當半導體元件99操作時，具有元件99的電路單元係產生熱並且改變形狀。由不同材料所製作之電路單元以及其它構件係以不同速率膨脹及收縮，而造成在元件99內的實體應力。在傳統半導體元件中，該些應力係能導致該構件失敗。然而在本發明實施例中，應力緩衝層106係提供一相對彈性的中間結構以吸收與抑制應力，該應力係當半導體元件99操作以及產生熱時所產生而造成晶圓100及共同電壓匯流排114膨脹及/或收縮。
在替代性實施例中，不同的導電層結合係被沉積於共同電壓匯流排114以及接觸銲墊102之間。例如，阻隔層110係選擇性，並且係可被包括於該元件99中。在一進一步實施例中，種晶層112以及共同電壓匯流排114係包括諸如銅或鋁之相同的電氣導電性材料。
轉至圖3c，鈍化層116係被塗佈以及被圖案化於共同電壓匯流排114與晶圓100上。鈍化層116係提供實體支撐以及電氣絕緣至該半導體元件99，並且係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它電氣絕緣材料。鈍化層116係被圖案化以曝光部份的共同電壓匯流排114。
轉至圖3d，凸塊118係被連接至鈍化層116之開口上的共同電壓匯流排114。凸塊118係藉由一被施加至沉積於共同電壓匯流排114上的導電錫鉛材料之回流製程而形成。凸塊118係包括金、或銅結構或另外諸如錫/鉛(Sn/Pb)、銅/鋅(Cu/Zn)、或銅/銀(Cu/Ag)銲料的其它導電性材料，各者係含有一選擇性助熔材料。該銲接材料係使用球形滴降(ball drop)、模板印刷(stencil printing)、及/或鍍層製程而被沉積。在替代性實施例中，凸塊118係可以銲線接合或是其它用於連接外部構件至共同電壓匯流排114之互連結構來取代。在替代性實施例中，銲線接合係直接被連接至共同電壓匯流排114的一表面。共同電壓匯流排114係可包括一被形成於共同電壓匯流排114之表面上的銲線可接合層，以促進銲線接合互連的形成。
圖4係說明沿著圖3c的平面4所取得之半導體元件99的一橫截面圖。鈍化層116係被沉積於晶圓100上。鈍化層116係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其他電氣絕緣材料，並且係被蝕刻以形成 曝光部份的共同電壓匯流排114之窗口120。共同電壓匯流排114係鋪佈於鈍化層116下方的一地方中，以及係以虛線而被顯示於圖4中。凸塊或其它互連元件係可被黏著於窗口120上，以及係被電氣連接至共同電壓匯流排114。共同電壓匯流排114係取決於應用或是電路設計之考量來採用任何適當的形狀。例如，共同電壓匯流排114係可為螺旋狀、U形、N形，或是鋸齒狀。
使用該些方法，一種半導體元件係被製造為具有改善的產率以及可靠度。該元件係包括一被形成在大面積共同電壓匯流排以及於半導體晶圓上所形成的主動電路之間的應力緩衝層。該共同電壓匯流排係提供一單一導電結構，其係被連接至一半導體元件的複數個接觸銲墊。例如：一單一外部能量供應係可被連接至該共同電壓匯流排，以施加一電壓至複數個接觸銲墊。該應力緩衝層係最小化在該半導體元件進行操作以及該半導體元件之各種電路單元或是其它構件膨脹與收縮時所產生的應力。例如，由該大面積共同電壓匯流排以及該晶圓所產生的應力係藉由應力緩衝層而被最小化。因此，該應力緩衝層係改善最終產品之元件產率以及可靠度。
圖5a－5b係說明具有一共同電壓匯流排以及下部凸塊金屬(UBM)的半導體元件199。晶圓200係包括矽、砷化鎵或其他的基板材料。在一個實施例中，晶圓200係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓200上的電路單元。接觸銲墊或是最終金屬銲墊202 係使用一物理氣相沉積、化學氣相沉積、電解電鍍，或是無電極電鍍製程而被形成於晶圓200上。接觸銲墊202係以諸如鋁、銅、錫、鎳、金或銀的導電性材料所形成，以及係被電氣連接至在晶圓200上所形成之電路單元。鈍化層204係被形成於晶圓200以及接觸銲墊202上。鈍化層204係被圖案化或是被蝕刻以曝光接觸銲墊202，以及係包括一諸如聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物或是其它絕緣聚合物材料的絕緣材料。應力緩衝層206係被形成於鈍化層204以及晶圓200上。在一個實施例中，應力緩衝層206係被塗佈以及被圖案化於晶圓200之一表面上。應力緩衝層206係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它絕緣緩衝材料。應力緩衝層206係被圖案化以曝光接觸銲墊202。
黏著層208係以一共性覆膜方式而被沉積在晶圓200上，以及係包括鈦、鈦鎢、鉭、氮化鉭、鉻、鋁、或是另外的電氣導電黏著材料。黏著層208係被電氣連接至接觸銲墊202。阻隔層210係被圖案化以及係一共性覆膜方式而被沉積在黏著層208上。阻隔層210係包括鎳釩、鉻銅、氮化鉭、氮化鈦、鎳、或是其它導電阻隔材料。種晶層212係被圖案化以及係一共性覆膜方式而被沉積在阻隔層210上。種晶層212係包括鋁、鋁合金、銅、金、或其它導電性材料。共同電壓匯流排214係被形成於種晶層212上。共同電壓匯流排214係可以選擇性鍍層或是回蝕製程而被沉積以及被圖案化。在替代性實施例中，不同的導電層組 合係可被沉積於共同電壓匯流排214以及接觸銲墊202之間。例如，阻隔層210係選擇性的並且係可不包括於半導體元件199中。在一進一步實施例中，種晶層212以及共同電壓匯流排214係包括相同的電氣導電性材料。鈍化層216係被塗佈以及被圖案化於共同電壓匯流排214與晶圓200上。鈍化層216係提供實體支撐以及電氣隔離至半導體元件199，並且係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它電氣絕緣材料。鈍化層216係被圖案化或是被蝕刻以曝光部份的共同電壓匯流排214。
阻隔層218係使用一物理氣相沉積、化學氣相沉積、電解電鍍、無電極電鍍、或是其它沉積製程而被形成於共同電壓匯流排214之經曝光部份上。阻隔層218係包括鎳、鈀(Pd)、鉑(Pt)、或是其它導電性材料。潤濕層220係被沉積於阻隔層218上，以及係包括金、銀、銅或是其它導電性材料。如圖5a中所示，阻隔層218以及潤濕層220兩者係被沉積於在鈍化層216中形成之開口內。然而，在一如圖5b中所示之替代性實施例中，阻隔層218以及潤濕層220係被沉積以重疊在鈍化層216中所形成的開口。
凸塊222係被沉積於潤濕層220上，以及係被電氣連接至潤濕層220。凸塊222係被形成於鈍化層216的開口，上及係包括一導電性材料。凸塊222係藉由一被施加至在共同電壓匯流排214上所沉積之銲接材料的回流製程而被形成。凸塊222係包括金、或銅結構或是另外諸如各者含有一選擇性助熔材料之錫/鉛、銅化鋅、或是銅化銀的導電 性材料。該銲接材料係使用一球型滴降、模板印刷、及/或鍍層製程而被沉積。阻隔層218以及潤濕層220一起係形成一下部凸塊金屬結構，以促進凸塊222的沉積並且以提高在凸塊222與共同電壓匯流排214之間的實質以及電氣連接。
圖6係說明半導體元件229，其係具有一被形成於一應力緩衝層上的共同電壓匯流排、被形成於半導體元件229之阻隔層以及種晶層上的互連凸塊。晶圓230係包括矽、砷化鎵或是其它基板材料。在一個實施例中，晶圓230係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓230上的功率電路單元。接觸銲墊或是最終金屬銲墊232係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被形成於晶圓230上。接觸銲墊232係以諸如鋁、銅、錫、鎳、金、或是銀的導電性材料所製成，以及係被電氣連接至於晶圓230上所形成的電路單元。鈍化層234係被形成於晶圓230以及接觸銲墊232上。鈍化層234係被圖案化或是被蝕刻以曝光接觸銲墊232，以及係包括一諸如聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、或是其它絕緣聚合物材料的絕緣材料。應力緩衝層236係被形成於鈍化層234及晶圓230上。在一個實施例中，應力緩衝層236係被塗佈以及被圖案化於晶圓230的一表面上。應力緩衝層236係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它絕緣緩衝材料。應力緩衝層236係被圖案化以曝光接觸銲墊232。
黏著層238係以一共性覆膜方式而被沉積於晶圓230中，以及係包括鈦、鈦鎢、鉭、氮化鉭、鉻、鋁、或是另外的電氣導電黏著材料。黏著層238係被電氣連接至接觸銲墊232。阻隔層240係被圖案化並且係以一共性覆膜方式而被沉積於黏著層238上。阻隔層240係包括鎳釩、鉻銅、氮化鉭、氮化鈦、鎳、或是其它導電阻隔材料。種晶層242係被圖案化並且係以一共性覆膜方式而被沉積於阻隔層240上。種晶層242係包括鋁、鋁合金、銅、金、或是其它導電性材料。共同電壓匯流排244係被形成於種晶層242上。共同電壓匯流排244係可以選擇性鍍層或是回蝕製程而被沉積以及圖案化。在替代性實施例中，不同的導電層結合係可被沉積於共同電壓匯流排244以及接觸銲墊232之間。例如，阻隔層240係為選擇性的以及係可不被包括於半導體元件229中。在一進一步實施例中，種晶層242以及共同電壓匯流排244係包括相同的電氣導電性材料。鈍化層246係被塗佈以及被圖案化於共同電壓匯流排244及晶圓230上。鈍化層246係提供實體支撐以及電氣隔離至半導體元件229，並且係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它電氣絕緣材料。鈍化層246係被圖案化或是被蝕刻以曝光部份的共同電壓匯流排244。
種晶層248係使用一物理氣相沉積、化學氣相沉積、電解電鍍、無電極電鍍、或是其它沉積製程而被形成於共同電壓匯流排244之經曝光部份上。種晶層248係包括鋁、 鋁合金、銅、金、或是其它導電性材料。阻隔層250係被沉積於種晶層248上，以及係包括鎳、鈀、鉑、或是其它導電性材料。如圖6中所顯示，種晶層248以及阻隔層250兩者係被沉積於在鈍化層246中所形成的開口內。然而在一替代性實施例中，種晶層248以及阻隔層250係被沉積以重疊在鈍化層246中所形成的開口。
凸塊252係被沉積於阻隔層250以及種晶層248上，並且係被電氣連接至阻隔層250及種晶層248。凸塊252係被沉積於鈍化層246的開口上，以及係包括一導電性材料。凸塊252係藉由一被施用鍍層製程於在種晶層248上所沉積的導電性材料而被形成。
圖7係說明半導體元件259，其係具有被形成於一應力緩衝層上的一共同電壓匯流排、被形成於該共同電壓匯流排上的互連支柱。晶圓260係包括矽、砷化鎵或其它基板材料。在一個實施例中，晶圓260係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓260上的電路單元。接觸銲墊或是最終金屬銲墊262係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被形成於晶圓260上。接觸銲墊262係以諸如鋁、銅、錫、鎳、金、或是銀之導電性材料所製成，並且係被電氣連接至形成在晶圓260上所形成的電路單元。鈍化層264係被形成於晶圓260以及接觸銲墊262上。鈍化層264係被圖案化或是被蝕刻以曝光接觸銲墊262，並且係包括一諸如聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、 或是其它絕緣聚合物材料的絕緣材料。應力緩衝層266係被形成於鈍化層264以及晶圓260之上。在一個實施例中，應力緩衝層266係被塗佈以及被圖案化於晶圓260的一表面上。應力緩衝層266係包括聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它絕緣緩衝材料。應力緩衝層266係被圖案化以曝光接觸銲墊262。
黏著層268係以一共性覆膜方式而被沉積在晶圓260上，以及係包括鈦、鈦鎢、鉭、氮化鉭、鉻、鋁、或是另外的電氣導電黏著材料。黏著層268係被電氣連接至接觸銲墊262。阻隔層270係被圖案化，以及係以一共性覆膜方式而被沉積在黏著層268上。阻隔層270係包括鎳釩、鉻銅、氮化鉭、氮化鈦、鎳、或是其它導電阻隔材料。種晶層272係被圖案化並且係以一共性覆膜方式而被沉積在阻隔層270上。種晶層272係包括鋁、鋁合金、銅、金、或是其它導電性材料。共同電壓匯流排274係被形成於種晶層272上。共同電壓匯流排274係可以選擇性鍍層或是回蝕製程而被沉積以及被圖案化。在替代性實施例中，不同的導電層組合係可被沉積於共同電壓匯流排274以及接觸銲墊262之間。例如，阻隔層270係選擇性的，以及係可不被包括在半導體元件259中。在一進一步實施例中，種晶層272以及共同電壓匯流排274係包括相同的電氣導電性材料。鈍化層276係被塗佈以及被圖案化於共同電壓匯流排274與晶圓260上。鈍化層276係提供實體支撐以及電氣隔離至半導體元件259上，並且係包括聚醯亞胺、苯 環丁烯、聚苯並噁唑、環氧基聚合物材料或是其它電氣絕緣材料。鈍化層276係被圖案化或是被蝕刻以曝光部份的共同電壓匯流排274。
黏著層278係被沉積於在鈍化層276中的開口之上的共同電壓匯流排274上，並且係包括鈦、鈦鎢、鉭、氮化鉭、鉻、鋁、或是另外的電氣導電黏著材料。黏著層278係被電氣連接至共同電壓匯流排274。阻隔層280係被圖案化，並且係以一共性覆膜方式而被沉積在黏著層278上。阻隔層280係包括鎳釩、鉻銅、氮化鉭、氮化鈦、鎳、或是其它導電阻隔材料。種晶層282係被圖案化，並且係以一共性覆膜方式而被沉積在阻隔層280上。種晶層282係包括鋁、鋁合金、銅、金、或是其它導電性材料。
互連支柱284係被沉積於種晶層282上，並且係被電氣連接至種晶層282。支柱284係包括諸如銅或是銲料的導電性材料，以及係使用一鍍層製程而被形成於鈍化層276的開口上。在一個實施例中，其中支柱284係包括銅質材料，銲料的一附加層係被沉積於支柱284上以進一步提升與外部系統構件的電氣連接。因為支柱284包括相對厚的導電結構，所以支柱284係促使來自共同電壓匯流排274之熱能的移除更容易，以進一步最小化在半導體元件259內的殘餘應力。
圖8a－8f係說明一種製造半導體元件299之方法，該半導體元件299係具有一用於電氣互連的銲線可接合金屬化。晶圓300係包括矽、砷化鎵或是其它基板材料。電路 單元係被形成於晶圓300上。該等電路單元係可為主動或是被動，並且係包括電阻器、電容器、電晶體、以及電感器。該等電路單元係由圖案化的導電性、電阻性以及介電層所組成，並且係使用如上文所述之晶圓級製程所形成。在一個實施例中，晶圓300係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓300上的功率電路單元。接觸銲墊302係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被形成於晶圓300上。接觸銲墊302係以諸如鋁、銅、錫、鎳、金、或是銀之導電性材料所製成，並且係被電氣連接至晶圓300上所形成的電路單元。鈍化層304係被形成於晶圓300以及接觸銲墊302上。鈍化層304係被圖案化或是被蝕刻以曝光接觸銲墊302，並且係包括一諸如氮化矽(SiN)、聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、或是其它絕緣聚合物材料的絕緣材料。鈍化層304係提供實體支撐以及電氣絕緣。黏著層306係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於鈍化層304上。黏著層306係包括鈦鎢、鈦、鉻、鉭、氮化鉭、或是其它導電黏著層材料，並且係被形成為與接觸銲墊s302進行電氣接觸。種晶層308係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於黏著層306上。種晶層308係包括銅、鋁、金、或是其它導電性材料。
轉至圖8b，一層光阻310係被沉積以及被圖案化於種 晶層308與晶圓300上。如圖8c中所顯示，金屬層312係選擇性地被鍍層於種晶層308上之光阻310周圍。在一個實施例中，金屬層312係在較低成本晶圓凸塊製程時間被沉積。金屬層312係包括一諸如銅、或是金的導電性材料，以及係具有一大於3微米(μm)而在8微米與20微米之間的一典型厚度。在一個實施例中，金屬層312的厚度係近似15微米。在另一個實施例中，金屬層312係包括一被形成於晶圓300之一表面上的大面積共同電壓匯流排。在一些實施例中，金屬層312的厚度係近似100微米。
轉至圖8d，光阻310係被剝除以及被移除。在光阻310被移除之後，金屬層312係被使用作為一遮罩以移除部份的種晶層308與黏著層306來形成通道314。在部份的種晶層308以及黏著層306被移除之後，通道314係如圖9所顯示曝光部份的鈍化層304。
轉至圖8e，銲線接合層316係被圖案化，並且係以一近似共性層而被沉積在晶圓300上。銲線可接合層316係包括一層或更多用於貼附銲線接合的導電性材料。在一個實施例中，銲線可接合層316係包括多層的導電性材料，其係諸如鎳質與金質材料的一組合。另或者，銲線可接合層316係包括一單層的導電性材料，諸如一單層的銀或是金。在一個實施例中，銲線可接合層316係在移除光阻310之前被沉積，以改善表面修飾(surface finishing)並且以避免鍍層化學使鈍化層304之表面故障。
轉至圖8f，銲線接合318係被形成以及被連接至銲線 可接合層316。銲線接合318係包括一諸如銅、鋁、金、或是銀的導電性材料，並且係形成一銲線可接合層316與其它系統構件之間的實體以及電氣連接。藉由將銲線接合318連接至銲線可接合層316而不是特定銲線接合銲墊，對於銲線接合318定位的容忍度係被提高。
圖9係說明半導體元件299的一俯視圖。半導體元件299係包括被形成於晶圓300上的鈍化層304。鈍化層304係包括一諸如氮化矽、聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、或是其它絕緣聚合物材料的絕緣材料。鈍化層304係提供實體支撐以及電氣絕緣。銲線可接合層316係被形成於晶圓300上，而與被形成於晶圓300之表面上的接觸銲墊302進行電氣接觸。通道314係被形成在銲線可接合層316中以電氣隔離銲線可接合層316的不同區域。接觸銲墊302係以圖9上的虛線所顯示，雖然接觸銲墊302係被形成於銲線可接合層316下方。銲線接合318係被形成於外部系統構件以及銲線可接合層316之間。
使用本發明之方法，一種半導體元件係被製造為具有改善的性能以及一較便宜的製程。該元件係不包括傳統周邊接觸銲墊，其係需要昂貴以及耗時的製程並且係導致一不必要的大型封裝與晶粒佔位空間。相反的，該元件係包括一重新分配的厚金屬化層，其係具有一銲線可接合表面。無最終鈍化層或是重新繞線的周邊輸入/輸出銲墊係被形成。藉由將銲線接合直接地連接至該厚金屬化層，一具 有較大互連撓曲性、較低RC延遲以及一較不昂貴製程之小型封裝佔位空間係被創造。在一個實施例中，該金屬化表面之幾合係被組態以用於特定功率元件應用，並且係可自3微米之一典型厚度最高變動至近似100微米。
圖10係說明半導體元件399，其係具有一被形成於一主要金屬化層的一上表面上之銲線可接合層。晶圓400係包括矽、砷化鎵或是其它基板材料。在一個實施例中，晶圓400係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓400上之功率電路單元。接觸銲墊402係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被形成於晶圓400上。接觸銲墊402係以諸如鋁、銅、錫、鎳、金、或是銀的導電性材料而被製成，並且係被電氣連接至於晶圓400上所形成的電路單元。鈍化層404係被形成於晶圓400以及接觸銲墊402上。鈍化層404係被圖案化或是被蝕刻以曝光接觸銲墊402，並且係包括一諸如氮化矽、聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、或是其它絕緣聚合物材料的絕緣材料。黏著層406係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於鈍化層404上。黏著層406係包括鈦鎢、鈦、鉻、鉭、氮化鉭、或是其它導電黏著層材料，並且係被形成而與接觸銲墊402電氣接觸。種晶層408係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於黏著層406上。種晶層408係包括銅、鋁、金、或是其它導電性材料。金 屬層410係被選擇性地鍍層於種晶層408上。金屬層410係包括諸如銅、或是金的導電性材料，以及具有大於3微米的一典型厚度。在一個實施例中，金屬層410的厚度係近似15微米。
銲線可接合層412係使用一物理氣相沉積、蒸鍍或是無電極/電解電鍍製程而被圖案化以及被沉積於晶圓400上。在一個實施例中，光阻係先被施加以控制銲線可接合層412之沉積以及圖案化。銲線可接合層412係包括一層或更多用於貼附銲線接合的導電性材料，諸如鎳—磷(P)/鈀/金、鎳—磷/金、鈦/氮化鈦/鋁、鋁/銅、或是金以。在一個實施例中，銲線可接合層412係包括多層的導電性材料，諸如鎳質以及金質材料之一組合。另或者，銲線可接合層412係包括一諸如銀或是金之單層的導電性材料。銲線接合414係被形成以及被連接至銲線可接合層412。銲線接合414係包括一諸如銅、鋁、金、或是銀的導電性材料，並且係形成一在銲線可接合層412與其它系統構件之間的實體與電氣連接。
圖11係說明半導體元件499，其係具有一被使用作為用於銲線接合之一可接合表面的主要金屬化層。晶圓500係包括矽、砷化鎵或是其他基板材料。在一個實施例中，晶圓500係包括一積體電路功率元件晶圓，以及係包括一個或更多被形成於晶圓500上的電路單元。接觸銲墊502係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被形成於晶圓500上。接觸銲墊502係 以諸如鋁、銅、錫、鎳、金、或是銀的導電性材料所製成，並且係被電氣連接至於晶圓500上所形成的電路單元。鈍化層504係被形成於晶圓500以及接觸銲墊502上。鈍化層504係被圖案化或是被蝕刻以曝光接觸銲墊502，並且係包括一諸如氮化矽、聚醯亞胺、苯環丁烯、聚苯並噁唑、環氧基絕緣聚合物、或是其它絕緣聚合物材料的絕緣材料。一選擇性的黏著層506以及種晶層508係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於鈍化層504上。黏著層506係包括鈦鎢、鈦、鉻、鉭、氮化鉭、或是其它導電黏著層材料，並且係被形成為與接觸銲墊502電氣接觸。種晶層508係使用一物理氣相沉積、化學氣相沉積、電解電鍍、或是無電極電鍍製程而被沉積於黏著層506上。種晶層508係包括銅、鋁、金、或是其它導電性材料。金屬層510係被選擇性地鍍層於種晶層508上。金屬層510係包括諸如銅或是金之一導電性材料，以及係具有大於3微米的一典型厚度。在一個實施例中，金屬層510的厚度係近似15微米。銲線接合512係被形成以及係被連接至金屬層510。銲線接合512係包括諸如銅、鋁、金、或是銀之一導電性材料，以及係形成一在金屬層510與其它系統構件之間的實體與電氣連接。
雖然本發明一個或更多實施例已經被詳細地說明，然而熟悉本項技術人士將了解的是：對於該些實施例之修改或適性係可被進行而不悖離本發明如後述專利申請範圍所提及之範疇。
10‧‧‧電子元件
12‧‧‧印刷電路板
14‧‧‧跡線
16‧‧‧雙直列封裝
18‧‧‧銲線接合的晶粒
20‧‧‧凸塊晶片載體
22‧‧‧覆晶封裝
24‧‧‧半導體晶粒
26‧‧‧接觸銲墊
28‧‧‧封裝本體的較低部份
30‧‧‧導體鉛
32‧‧‧接合銲線
36‧‧‧銲接材料
38‧‧‧接觸銲墊
40‧‧‧黏著材料
42‧‧‧接觸銲墊
44‧‧‧接合銲線
46‧‧‧半導體晶粒
48‧‧‧接觸銲墊
50‧‧‧黏著材料
52‧‧‧接觸銲墊
54‧‧‧接合銲線
56,58‧‧‧接合銲墊
60‧‧‧囊封材料
64‧‧‧接觸銲墊
70‧‧‧作用區域
72‧‧‧半導體晶粒
76‧‧‧錫鉛凸塊結構
78‧‧‧錫鉛凸塊
80,82‧‧‧互連
99‧‧‧半導體元件
100‧‧‧晶圓
102‧‧‧接觸銲墊
104‧‧‧鈍化層
106‧‧‧應力緩衝層
108‧‧‧黏著層
110‧‧‧阻隔層
112‧‧‧種晶層
114‧‧‧共同電壓匯流排
116‧‧‧鈍化層
118‧‧‧凸塊
120‧‧‧窗口
199‧‧‧半導體元件
200‧‧‧晶圓
202‧‧‧金屬銲墊/接觸銲墊
204‧‧‧鈍化層
206‧‧‧應力緩衝層
208‧‧‧黏著層
210‧‧‧阻隔層
212‧‧‧種晶層
214‧‧‧共同電壓匯流排
216‧‧‧鈍化層
218‧‧‧阻隔層
220‧‧‧潤濕層
222‧‧‧凸塊
229‧‧‧半導體元件
230‧‧‧晶圓
232‧‧‧金屬銲墊/接觸銲墊
234‧‧‧鈍化層
236‧‧‧應力緩衝層
238‧‧‧黏著層
240‧‧‧阻隔層
242‧‧‧種晶層
244‧‧‧共同電壓匯流排
246‧‧‧鈍化層
248‧‧‧種晶層
250‧‧‧阻隔層
252‧‧‧凸塊
259‧‧‧半導體元件
260‧‧‧晶圓
262‧‧‧金屬銲墊/接觸銲墊
264‧‧‧鈍化層
266‧‧‧應力緩衝層
268‧‧‧黏著層
270‧‧‧阻隔層
272‧‧‧種晶層
274‧‧‧共同電壓匯流排
276‧‧‧鈍化層
278‧‧‧黏著層
280‧‧‧阻隔層
282‧‧‧種晶層
284‧‧‧互連支柱
299‧‧‧半導體元件
300‧‧‧晶圓
302‧‧‧接觸銲墊
304‧‧‧鈍化層
306‧‧‧黏著層
308‧‧‧種晶層
310‧‧‧光阻層
312‧‧‧金屬層
314‧‧‧通道
316‧‧‧銲線可接合層
318‧‧‧銲線接合
399‧‧‧半導體元件
400‧‧‧晶圓
402‧‧‧接觸銲墊
404‧‧‧鈍化層
406‧‧‧黏著層
408‧‧‧種晶層
410‧‧‧金屬層
412‧‧‧銲線可接合層
414‧‧‧銲線接合
499‧‧‧半導體元件
500‧‧‧晶圓
502‧‧‧接觸銲墊
504‧‧‧鈍化層
506‧‧‧黏著層
508‧‧‧種晶層
510‧‧‧金屬層
512‧‧‧銲線接合
圖1係說明一具有被黏著至表面之不同型式封裝的印刷電路板(PCB)；圖2a－2d係說明被黏著於該印刷電路板之半導體封裝的進一步細節；圖3a－3d係說明一種形成具有被形成於一應力緩衝層上之一共同電壓匯流排的一半導體元件之方法；圖4係說明沿著圖3c平面4所取得之元件的一橫截面圖，其係顯示被形成於一共同電壓匯流排上之鈍化層；圖5a－5b係說明一種具有被形成於一應力緩衝層上之一共同電壓匯流排的半導體元件，多個互連凸塊以及下部凸塊金屬(UBM)係被形成於該元件上；圖6係說明一種具有被形成於一應力緩衝層上之一共同電壓匯流排的半導體元件，多個互連凸塊係被形成於該半導體元件的一阻隔層及一種晶層上；圖7係說明一種具有被形成於一應力緩衝層上之一共同電壓匯流排的半導體元件，互連支柱係诶形成於該共用電壓匯流排上；圖8a－8f係說明一種製造具有一銲線可接合金屬化以用於形成電氣互連之一半導體元件的方法；圖9係說明圖8f之半導體元件的一俯視圖；圖10係說明一種具有被形成於一主金屬化層之一上表面的一銲線可接合層之半導體元件；以及 圖11係說明一種具有一被使用作為用於銲線接合的一可接合表面之一主金屬化層的半導體元件。
99‧‧‧半導體元件
100‧‧‧晶圓
102‧‧‧接觸銲墊
104‧‧‧鈍化層
106‧‧‧應力緩衝層
108‧‧‧黏著層
110‧‧‧阻隔層
112‧‧‧種晶層
114‧‧‧共同電壓匯流排
116‧‧‧鈍化層
118‧‧‧凸塊

Claims (19)

  1. 一種製作一半導體元件的方法，該方法係包括：提供一具有複數個半導體晶粒之晶圓，該晶圓係具有於該晶圓之一表面上所形成的接觸銲墊；形成一第一鈍化層於該晶圓上；形成一應力緩衝層於該第一鈍化層上，該應力緩衝層係被圖案化以曝光該等接觸銲墊；沉積一金屬層於該應力緩衝層上，該金屬層係提供一共同電壓匯流排予該半導體元件，並且係與該等接觸銲墊進行電氣通訊；形成一互連結構於該金屬層上；以及形成一第二鈍化層於該金屬層上。
  2. 如申請專利範圍第1項之方法，其係包含：沉積一黏著層於該晶圓上以與該等接觸銲墊進行電氣接觸；沉積一阻隔層於該黏著層上；以及沉積一種晶層於該阻隔層上，其中該金屬層係被黏著至該種晶層。
  3. 如申請專利範圍第1項之方法，其中形成該互連結構於該金屬層上係包含：形成互連支柱於該金屬層上，該等互連支柱係包含一銅質或是銲接材料；以及沉積一銲接材料於該等互連支柱之一表面上。
  4. 如申請專利範圍第1項之方法，其中沉積該金屬層於 該應力緩衝層上係包含使用選擇性鍍層或是一回蝕製程來圖案化該金屬層。
  5. 如申請專利範圍第1項之方法，其中該應力緩衝層係包含聚醯亞胺、苯環丁烯、聚苯並噁唑、或是環氧基聚合物材料。
  6. 如申請專利範圍第1項之方法，其中形成一互連結構於該金屬層上係包含：沉積一下部凸塊金屬(UBM)於該金屬層上，該下部凸塊金屬係包含一阻隔層以及一潤濕層；以及沉積錫鉛凸塊於該下部凸塊金屬上。
  7. 一種製作一半導體元件的方法，該方法係包括：提供一具有複數個半導體晶粒之晶圓，該晶圓係具有於該晶圓之一表面上所形成的接觸銲墊；形成一鈍化層於該晶圓上，該鈍化層係被圖案化以曝光該等接觸銲墊；形成一黏著層於該晶圓上；形成一種晶層於該黏著層上，該種晶層係與該等接觸銲墊進行電氣通訊；沉積一光阻材料於該晶圓上；鍍層一金屬層於該種晶層上，該金屬層係依據該光阻材料而被圖案化；沉積一銲線可接合層於該金屬層上；在沉積該銲線可接合層之後移除該光阻材料；蝕刻一部份的種晶層與黏著層以曝光一部份的鈍化 層；以及連接一銲線接合至該銲線可接合層。
  8. 如申請專利範圍第7項之方法，其中該銲線可接合層係包含多層的導電性材料。
  9. 如申請專利範圍第7項之方法，其中該銲線可接合層係被沉積作為一共性覆膜(conformal coating)。
  10. 如申請專利範圍第7項之方法，其係包含形成一應力緩衝層於該鈍化層上，該應力緩衝層係被圖案化以曝光該等接觸銲墊。
  11. 如申請專利範圍第7項之方法，其中該金屬層之一厚度係大於3微米。
  12. 一種半導體元件，其係包括：一半導體晶粒，其包括於該半導體晶粒之一表面上所形成的複數個接觸銲墊；一第一導電層，其係被形成於該半導體晶粒之該表面上以及被電性連接至該半導體晶粒之該等接觸銲墊；一第二導體層，其係被形成於該第一導體層上以作為複數個電性隔離區域，該複數個電性隔離區域係被配置在該半導體晶粒之該等接觸銲墊之各別群組上方以及作為複數個共同電壓匯流排而電性連接至該半導體晶粒之該等接觸銲墊之各別群組；一通道，其係形成在該第二導體層的該等電性隔離區域之間；一銲線可接合層，其係被沉積於該第二導體層之上並 且延伸進入該通道；以及複數個銲線接合，其係被電性連接至該銲線可接合層。
  13. 如申請專利範圍第12項之半導體元件，其係包含：一鈍化層，其係被形成於該半導體晶粒上，該鈍化層係被圖案化以曝光該接觸銲墊；以及一黏著層，其係被形成於該鈍化層上。
  14. 如申請專利範圍12之半導體元件，其係包含一光阻材料，該光阻材料係被沉積於該半導體晶粒上以圖案化該第二導電層。
  15. 一種半導體元件，其包括：一半導體晶粒，其係包括於該半導體晶粒之一表面上所形成的複數個接觸銲墊；一第一鈍化層，其係形成於該半導體晶粒之上；一應力緩衝層，其係形成於該第一鈍化層之上，該應力緩衝層係被圖案化以曝光該等接觸銲墊；一導電層，其係被形成於該應力緩衝層上以作為一共同電壓匯流排以用於該半導體元件以及與該等接觸銲墊進行電氣通訊；以及一互連支柱，其係形成於該導體層上。
  16. 如申請專利範圍第15項之半導體元件，其進一步包括沉積於該互連支柱上的一銲接材料。
  17. 如申請專利範圍第15項之半導體元件，其進一步包括：一黏合層，其係被形成於與該等接觸銲墊電氣接觸之 該半導體晶粒之上；一阻隔層，其係形成於該黏合層上；以及一種晶層，其係形成於該阻隔層上，其中該導電層係被形成於該種晶層之上。
  18. 如申請專利範圍第15項之半導體元件，其進一步包括於該導電層之上所形成之一第二鈍化層。
  19. 如申請專利範圍第15項之半導體元件，其進一步包括於該導電層之上所形成之一下部凸塊金屬(UBM)。
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Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7960845B2 (en) 2008-01-03 2011-06-14 Linear Technology Corporation Flexible contactless wire bonding structure and methodology for semiconductor device
US7902665B2 (en) * 2008-09-02 2011-03-08 Linear Technology Corporation Semiconductor device having a suspended isolating interconnect
EP2256802A1 (en) 2009-05-26 2010-12-01 Nxp B.V. Semiconductor chip and method of manufacturing a semiconductor chip
US8841766B2 (en) * 2009-07-30 2014-09-23 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall protection structure
US8759209B2 (en) * 2010-03-25 2014-06-24 Stats Chippac, Ltd. Semiconductor device and method of forming a dual UBM structure for lead free bump connections
KR101655465B1 (ko) * 2010-04-22 2016-09-07 현대자동차주식회사 컨포멀 코팅층을 갖는 반도체 장치 및 그 제조 방법
KR101184375B1 (ko) * 2010-05-10 2012-09-20 매그나칩 반도체 유한회사 패드 영역의 크랙 발생을 방지하는 반도체 장치 및 그 제조 방법
US9425146B2 (en) * 2010-09-28 2016-08-23 Infineon Technologies Ag Semiconductor structure and method for making same
US9484259B2 (en) 2011-09-21 2016-11-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming protection and support structure for conductive interconnect structure
US9082832B2 (en) 2011-09-21 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming protection and support structure for conductive interconnect structure
FR2980313B1 (fr) * 2011-09-21 2015-03-06 Airbus Operations Sas Dispositif de support de chemin de cables pour aeronef, notamment aeronef a structure au moins partiellement realisee dans un materiau composite
US9263839B2 (en) 2012-12-28 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an improved fine pitch joint
US9401308B2 (en) 2013-03-12 2016-07-26 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging devices, methods of manufacture thereof, and packaging methods
US10015888B2 (en) 2013-02-15 2018-07-03 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect joint protective layer apparatus and method
US9589862B2 (en) 2013-03-11 2017-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming same
US9368398B2 (en) 2012-01-12 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of fabricating same
US9607921B2 (en) 2012-01-12 2017-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package interconnect structure
US9257333B2 (en) 2013-03-11 2016-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming same
US9437564B2 (en) 2013-07-09 2016-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure and method of fabricating same
TWI449144B (zh) * 2012-02-16 2014-08-11 矽品精密工業股份有限公司 半導體封裝件及其基板
US9082776B2 (en) * 2012-08-24 2015-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package having protective layer with curved surface and method of manufacturing same
CN104051383B (zh) * 2013-03-15 2018-02-27 台湾积体电路制造股份有限公司 封装的半导体器件、封装半导体器件的方法以及PoP器件
US8877554B2 (en) 2013-03-15 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices
US9640729B2 (en) * 2013-07-03 2017-05-02 Koninklijke Philips N.V. LED with stress-buffer layer under metallization layer
KR20160066972A (ko) * 2014-12-03 2016-06-13 삼성전자주식회사 반도체 발광 소자 및 이를 구비한 반도체 발광 장치
US9892962B2 (en) 2015-11-30 2018-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer level chip scale package interconnects and methods of manufacture thereof
KR102528067B1 (ko) * 2016-06-09 2023-05-03 주식회사 디비하이텍 전력용 반도체 소자 및 이의 제조 방법
US9837341B1 (en) * 2016-09-15 2017-12-05 Intel Corporation Tin-zinc microbump structures
US10297563B2 (en) * 2016-09-15 2019-05-21 Intel Corporation Copper seed layer and nickel-tin microbump structures
US10896887B2 (en) 2018-05-10 2021-01-19 Infineon Technologies Ag Stress relieving structure for semiconductor device
US10879224B2 (en) * 2018-10-30 2020-12-29 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure, die and method of manufacturing the same
US11538769B2 (en) 2018-12-14 2022-12-27 General Electric Company High voltage semiconductor devices having improved electric field suppression
US10892237B2 (en) * 2018-12-14 2021-01-12 General Electric Company Methods of fabricating high voltage semiconductor devices having improved electric field suppression
US20220223560A1 (en) * 2021-01-14 2022-07-14 Changxin Memory Technologies, Inc. Chip structure, packaging structure and manufacturing method of chip structure
CN112864121A (zh) * 2021-01-14 2021-05-28 长鑫存储技术有限公司 芯片结构、封装结构及其制作方法
CN115084048A (zh) * 2022-08-22 2022-09-20 成都复锦功率半导体技术发展有限公司 一种低应力Low-K半导体器件封装结构及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050017358A1 (en) * 2002-06-25 2005-01-27 Farnworth Warren M. Semiconductor component having conductors with wire bondable metalization layers
US6888246B2 (en) * 2001-11-30 2005-05-03 Freescale Semiconductor, Inc. Semiconductor power device with shear stress compensation
TWI273665B (en) * 2004-11-16 2007-02-11 Taiwan Semiconductor Mfg Method for forming solder bumps of increased height

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5665996A (en) * 1994-12-30 1997-09-09 Siliconix Incorporated Vertical power mosfet having thick metal layer to reduce distributed resistance
US5792594A (en) * 1996-04-01 1998-08-11 Motorola, Inc. Metallization and termination process for an integrated circuit chip
US7405149B1 (en) * 1998-12-21 2008-07-29 Megica Corporation Post passivation method for semiconductor chip or wafer
US8021976B2 (en) * 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
JP2001144204A (ja) * 1999-11-16 2001-05-25 Nec Corp 半導体装置及びその製造方法
US6420262B1 (en) * 2000-01-18 2002-07-16 Micron Technology, Inc. Structures and methods to enhance copper metallization
US7057273B2 (en) * 2001-05-15 2006-06-06 Gem Services, Inc. Surface mount package
US6596619B1 (en) * 2002-05-17 2003-07-22 Taiwan Semiconductor Manufacturing Company Method for fabricating an under bump metallization structure
US20030218246A1 (en) * 2002-05-22 2003-11-27 Hirofumi Abe Semiconductor device passing large electric current
US6878633B2 (en) * 2002-12-23 2005-04-12 Freescale Semiconductor, Inc. Flip-chip structure and method for high quality inductors and transformers
US7115997B2 (en) * 2003-11-19 2006-10-03 International Business Machines Corporation Seedless wirebond pad plating
TW200941544A (en) * 2005-05-25 2009-10-01 Megica Corp Chip structure and process for forming the same
JP4755486B2 (ja) * 2005-11-17 2011-08-24 Ｏｋｉセミコンダクタ株式会社 半導体装置およびその製造方法
US8836146B2 (en) * 2006-03-02 2014-09-16 Qualcomm Incorporated Chip package and method for fabricating the same
US8022552B2 (en) * 2006-06-27 2011-09-20 Megica Corporation Integrated circuit and method for fabricating the same
US8421227B2 (en) * 2006-06-28 2013-04-16 Megica Corporation Semiconductor chip structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6888246B2 (en) * 2001-11-30 2005-05-03 Freescale Semiconductor, Inc. Semiconductor power device with shear stress compensation
US20050017358A1 (en) * 2002-06-25 2005-01-27 Farnworth Warren M. Semiconductor component having conductors with wire bondable metalization layers
TWI273665B (en) * 2004-11-16 2007-02-11 Taiwan Semiconductor Mfg Method for forming solder bumps of increased height

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