SG124265A1 - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same

Info

Publication number
SG124265A1
SG124265A1 SG200307002A SG200307002A SG124265A1 SG 124265 A1 SG124265 A1 SG 124265A1 SG 200307002 A SG200307002 A SG 200307002A SG 200307002 A SG200307002 A SG 200307002A SG 124265 A1 SG124265 A1 SG 124265A1
Authority
SG
Singapore
Prior art keywords
silicon surface
self
oxide film
semiconductor device
sacrifice oxide
Prior art date
Application number
SG200307002A
Other languages
English (en)
Inventor
Tadahiro Ohmi
Shigetoshi Sugawa
Akinobu Teramoto
Hiroshi Akahori
Keiichi Nii
Original Assignee
Tadahiro Ohmi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2003283560A external-priority patent/JP4351497B2/ja
Priority claimed from JP2003322170A external-priority patent/JP4954437B2/ja
Application filed by Tadahiro Ohmi filed Critical Tadahiro Ohmi
Publication of SG124265A1 publication Critical patent/SG124265A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02301—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
SG200307002A 2002-12-02 2003-12-02 Semiconductor device and method of manufacturing the same SG124265A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002350177 2002-12-02
JP2003283560A JP4351497B2 (ja) 2003-07-31 2003-07-31 半導体装置の製造方法、及び半導体製造装置
JP2003322170A JP4954437B2 (ja) 2003-09-12 2003-09-12 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
SG124265A1 true SG124265A1 (en) 2006-08-30

Family

ID=32314792

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200307002A SG124265A1 (en) 2002-12-02 2003-12-02 Semiconductor device and method of manufacturing the same

Country Status (8)

Country Link
US (3) US7179746B2 (fr)
EP (1) EP1427003A3 (fr)
KR (2) KR101163429B1 (fr)
CN (1) CN1510755B (fr)
AU (1) AU2003264642B2 (fr)
CA (1) CA2451887A1 (fr)
SG (1) SG124265A1 (fr)
TW (1) TWI333236B (fr)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4993810B2 (ja) * 2001-02-16 2012-08-08 株式会社半導体エネルギー研究所 半導体装置の作製方法
TWI333236B (en) * 2002-12-02 2010-11-11 Tadahiro Ohmi Semiconductor device and method of manufacturing the same
US7192891B2 (en) * 2003-08-01 2007-03-20 Samsung Electronics, Co., Ltd. Method for forming a silicon oxide layer using spin-on glass
US7161169B2 (en) * 2004-01-07 2007-01-09 International Business Machines Corporation Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain
DE102004015307A1 (de) * 2004-03-29 2005-10-20 Infineon Technologies Ag Verfahren zur Präparation der Oberfläche eines Halbleiterkörpers
KR100583609B1 (ko) * 2004-07-05 2006-05-26 삼성전자주식회사 반도체 장치의 게이트 구조물 제조방법 및 이를 이용한불휘발성 메모리 장치의 셀 게이트 구조물 제조방법
US7132372B2 (en) * 2004-07-29 2006-11-07 Freescale Semiconductor, Inc. Method for preparing a semiconductor substrate surface for semiconductor device fabrication
US7129184B2 (en) * 2004-12-01 2006-10-31 Taiwan Semiconductor Manufacturing Company, Ltd. Method of depositing an epitaxial layer of SiGe subsequent to a plasma etch
US7446380B2 (en) * 2005-04-29 2008-11-04 International Business Machines Corporation Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS
US7479460B2 (en) * 2005-08-23 2009-01-20 Asm America, Inc. Silicon surface preparation
KR101113628B1 (ko) * 2005-09-20 2012-02-17 고에키자이단호진 고쿠사이카가쿠 신고우자이단 반도체 장치의 제조 방법 및 반도체 제조 장치
US8198195B2 (en) * 2005-09-26 2012-06-12 Tadahiro Ohmi Plasma processing method and plasma processing apparatus
US8268735B2 (en) * 2006-02-01 2012-09-18 Tohoku University Semiconductor device manufacturing method and method for reducing microroughness of semiconductor surface
JP2007329239A (ja) * 2006-06-07 2007-12-20 Sharp Corp パワーｉｃデバイス及びその製造方法
US7939396B2 (en) * 2006-06-09 2011-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Base oxide engineering for high-K gate stacks
JP5433927B2 (ja) * 2007-03-14 2014-03-05 株式会社Ｓｕｍｃｏ 貼り合わせウェーハの製造方法
JP2009032808A (ja) * 2007-07-25 2009-02-12 Toshiba Corp 半導体装置
US8420460B2 (en) * 2008-03-26 2013-04-16 International Business Machines Corporation Method, structure and design structure for customizing history effects of SOI circuits
JP5152851B2 (ja) * 2008-04-17 2013-02-27 国立大学法人東北大学 半導体装置の製造方法
JP5272496B2 (ja) * 2008-04-25 2013-08-28 信越半導体株式会社 シリコンウェーハの酸化膜形成方法
JP4647682B2 (ja) * 2008-11-12 2011-03-09 パナソニック株式会社 半導体装置及びその製造方法
US9040393B2 (en) * 2010-01-14 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor structure
CN101826451A (zh) * 2010-03-15 2010-09-08 无锡中微晶园电子有限公司 一种超薄氧化层生长前清洗工艺
CN102939654B (zh) * 2010-06-15 2016-01-20 加州理工学院 使用多层通过量子排斥进行的表面钝化
JP5540919B2 (ja) * 2010-06-16 2014-07-02 住友電気工業株式会社 炭化珪素半導体の洗浄方法
US20130052774A1 (en) * 2010-06-29 2013-02-28 Kyocera Corporation Method for surface-treating semiconductor substrate, semiconductor substrate, and method for producing solar battery
JP5835790B2 (ja) * 2011-01-26 2015-12-24 国立大学法人東北大学 半導体装置
US8597995B2 (en) * 2011-09-24 2013-12-03 Taiwan Semiconductor Manufacturing Company, Ltd. Metal gate device with low temperature oxygen scavenging
US9153658B2 (en) * 2011-11-17 2015-10-06 Tohoku University Semiconductor device and method of manufacturing the same
WO2013086217A1 (fr) 2011-12-06 2013-06-13 Masco Corporation Of Indiana Distribution d'ozone dans un robinet
US9269626B2 (en) 2014-02-06 2016-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit structure and method for manufacturing thereof
US9209304B2 (en) * 2014-02-13 2015-12-08 Taiwan Semiconductor Manufacturing Co., Ltd. N/P MOS FinFET performance enhancement by specific orientation surface
CN115093008B (zh) 2015-12-21 2024-05-14 德尔塔阀门公司 包括消毒装置的流体输送系统
US9679967B1 (en) * 2016-09-30 2017-06-13 International Business Machines Corporation Contact resistance reduction by III-V Ga deficient surface
CN108257855B (zh) * 2016-12-28 2021-09-10 全球能源互联网研究院 高k栅介质层的制备方法及碳化硅MOS功率器件
KR102553773B1 (ko) * 2019-01-09 2023-07-11 어플라이드 머티어리얼스, 인코포레이티드 반도체 디바이스에 구조를 형성하는 방법

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4768076A (en) * 1984-09-14 1988-08-30 Hitachi, Ltd. Recrystallized CMOS with different crystal planes
JP3187109B2 (ja) 1992-01-31 2001-07-11 キヤノン株式会社 半導体部材およびその製造方法
US5439569A (en) * 1993-02-12 1995-08-08 Sematech, Inc. Concentration measurement and control of hydrogen peroxide and acid/base component in a semiconductor bath
US5459083A (en) * 1993-03-01 1995-10-17 Motorola, Inc. Method for making BIMOS device having a bipolar transistor and a MOS triggering transistor
JPH06244174A (ja) 1993-08-04 1994-09-02 Tadahiro Omi 絶縁酸化膜の形成方法
JPH07142438A (ja) 1993-11-22 1995-06-02 Tadahiro Omi 洗浄装置、半導体製造装置及び半導体製造ライン
US5804034A (en) * 1994-03-21 1998-09-08 Texas Instruments Incorporated Method for manufacturing semiconductor device
JP2743823B2 (ja) 1994-03-25 1998-04-22 日本電気株式会社 半導体基板のウエット処理方法
JP3350215B2 (ja) 1994-05-10 2002-11-25 株式会社東芝 半導体装置の製造方法
US5571373A (en) * 1994-05-18 1996-11-05 Memc Electronic Materials, Inc. Method of rough polishing semiconductor wafers to reduce surface roughness
JP2659088B2 (ja) * 1995-03-15 1997-09-30 工業技術院長 シリコン表面の処理方法
US5886389A (en) 1995-05-31 1999-03-23 Matsushita Electric Industrial Co., Ltd. Field-effect transistor and method for producing the same
JP2749030B2 (ja) 1995-05-31 1998-05-13 松下電器産業株式会社 電界効果トランジスタおよびその製造方法
JP3850054B2 (ja) * 1995-07-19 2006-11-29 三菱電機株式会社 半導体装置
WO1998001896A1 (fr) 1996-07-03 1998-01-15 Ultraclean Technology Research Institute Appareil de lavage et procede de lavage
US6020247A (en) 1996-08-05 2000-02-01 Texas Instruments Incorporated Method for thin film deposition on single-crystal semiconductor substrates
US6066571A (en) * 1997-01-10 2000-05-23 Kabushiki Kaisha Toshiba Method of preparing semiconductor surface
JP3296229B2 (ja) 1997-01-21 2002-06-24 株式会社デンソー 半導体装置の製造方法
US6357385B1 (en) 1997-01-29 2002-03-19 Tadahiro Ohmi Plasma device
JPH10229064A (ja) 1997-02-14 1998-08-25 Fujitsu Ltd 半導体基板の洗浄方法
US6350322B1 (en) * 1997-03-21 2002-02-26 Micron Technology, Inc. Method of reducing water spotting and oxide growth on a semiconductor structure
JPH10335289A (ja) 1997-06-05 1998-12-18 Sony Corp シリコン半導体基板の処理方法
JP4208056B2 (ja) 1997-06-13 2009-01-14 忠弘 大見 洗浄方法
US6348157B1 (en) * 1997-06-13 2002-02-19 Tadahiro Ohmi Cleaning method
JP4001662B2 (ja) * 1997-06-27 2007-10-31 株式会社半導体エネルギー研究所 シリコンの洗浄方法および多結晶シリコンの作製方法
JPH1160377A (ja) 1997-08-12 1999-03-02 Fujitsu Ltd シリコンの表面処理方法と半導体装置の製造方法
JPH11102906A (ja) 1997-09-29 1999-04-13 Sony Corp シリコン酸化膜の成膜方法及び酸化膜成膜装置
JPH11162876A (ja) * 1997-11-28 1999-06-18 Nec Corp 半導体装置の製造装置及び製造方法
JPH11204492A (ja) 1998-01-08 1999-07-30 Sony Corp 半導体装置の製造方法
JPH11251599A (ja) 1998-03-06 1999-09-17 Toshiba Corp 薄膜半導体装置の製造方法
JP3228230B2 (ja) * 1998-07-21 2001-11-12 日本電気株式会社 半導体装置の製造方法
US6277674B1 (en) * 1998-10-02 2001-08-21 Micron Technology, Inc. Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same
JP4367587B2 (ja) * 1998-12-01 2009-11-18 財団法人国際科学振興財団 洗浄方法
US6436801B1 (en) * 1999-02-26 2002-08-20 Texas Instruments Incorporated Hafnium nitride gate dielectric
JP4119029B2 (ja) 1999-03-10 2008-07-16 東京エレクトロン株式会社 半導体装置の製造方法
US6483171B1 (en) * 1999-08-13 2002-11-19 Micron Technology, Inc. Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same
DE19938340C1 (de) 1999-08-13 2001-02-15 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer epitaxierten Halbleiterscheibe
JP4397491B2 (ja) * 1999-11-30 2010-01-13 財団法人国際科学振興財団 １１１面方位を表面に有するシリコンを用いた半導体装置およびその形成方法
JP2001185485A (ja) 1999-12-24 2001-07-06 Sharp Corp 半導体装置およびその製造方法
US6189546B1 (en) * 1999-12-29 2001-02-20 Memc Electronic Materials, Inc. Polishing process for manufacturing dopant-striation-free polished silicon wafers
JP2001308341A (ja) 2000-02-18 2001-11-02 Matsushita Electric Ind Co Ltd 多結晶薄膜およびそれを用いた半導体素子
KR100760078B1 (ko) * 2000-03-13 2007-09-18 다다히로 오미 산화막의 형성 방법, 질화막의 형성 방법, 산질화막의 형성 방법, 산화막의 스퍼터링 방법, 질화막의 스퍼터링 방법, 산질화막의 스퍼터링 방법, 게이트 절연막의 형성 방법
JP2002043435A (ja) * 2000-07-27 2002-02-08 Nec Corp システムオンチップの製造方法、半導体装置の製造方法
JP2002050605A (ja) 2000-07-31 2002-02-15 Fujitsu Ltd シリコン表面の安定化方法，および半導体装置の製造方法
JP3437540B2 (ja) 2000-09-19 2003-08-18 キヤノン株式会社 半導体部材及び半導体装置の製造方法
US6300203B1 (en) * 2000-10-05 2001-10-09 Advanced Micro Devices, Inc. Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors
JP2002184973A (ja) 2000-12-11 2002-06-28 Hitachi Ltd 半導体装置及びその製造方法
JP4330815B2 (ja) 2001-03-26 2009-09-16 株式会社東芝 半導体装置の製造方法及び製造装置
JP2002359293A (ja) * 2001-05-31 2002-12-13 Toshiba Corp 半導体装置
JP2003115587A (ja) * 2001-10-03 2003-04-18 Tadahiro Omi ＜１１０＞方位のシリコン表面上に形成された半導体装置およびその製造方法
US20030082923A1 (en) 2001-10-30 2003-05-01 Yoshi Ono Method and apparatus for radical oxidation of silicon
US6953730B2 (en) * 2001-12-20 2005-10-11 Micron Technology, Inc. Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics
JP4162211B2 (ja) * 2002-09-05 2008-10-08 コバレントマテリアル株式会社 シリコンウエハの洗浄方法および洗浄されたシリコンウエハ
JP2004146583A (ja) 2002-10-24 2004-05-20 Nec Corp 半導体装置の製造方法
TWI333236B (en) * 2002-12-02 2010-11-11 Tadahiro Ohmi Semiconductor device and method of manufacturing the same
JP4694782B2 (ja) 2002-12-02 2011-06-08 財団法人国際科学振興財団 半導体装置、その製造方法、及び、半導体表面の処理方法
JP2004356114A (ja) * 2003-05-26 2004-12-16 Tadahiro Omi Ｐチャネルパワーｍｉｓ電界効果トランジスタおよびスイッチング回路
JP4066916B2 (ja) * 2003-09-08 2008-03-26 株式会社村田製作所 力学量センサ
US8268735B2 (en) * 2006-02-01 2012-09-18 Tohoku University Semiconductor device manufacturing method and method for reducing microroughness of semiconductor surface

Also Published As

Publication number Publication date
KR20040048361A (ko) 2004-06-09
EP1427003A2 (fr) 2004-06-09
KR101163429B1 (ko) 2012-07-13
US8183670B2 (en) 2012-05-22
AU2003264642B2 (en) 2009-08-06
CN1510755A (zh) 2004-07-07
KR101232470B1 (ko) 2013-02-12
US20040108575A1 (en) 2004-06-10
CN1510755B (zh) 2010-08-25
US7179746B2 (en) 2007-02-20
US20120208375A1 (en) 2012-08-16
KR20120024923A (ko) 2012-03-14
AU2003264642A1 (en) 2004-06-17
TWI333236B (en) 2010-11-11
CA2451887A1 (fr) 2004-06-02
US20070145535A1 (en) 2007-06-28
TW200416862A (en) 2004-09-01
EP1427003A3 (fr) 2005-03-02

Similar Documents

Publication Publication Date Title
SG124265A1 (en) Semiconductor device and method of manufacturing the same
JP4617306B2 (ja) 窒化シリコン酸化物ゲート誘電体を製造する方法
TW533489B (en) Semiconductor device and production method thereof
US6787440B2 (en) Method for making a semiconductor device having an ultra-thin high-k gate dielectric
US9006056B2 (en) Method for reducing interfacial layer thickness for high-k and metal gate stack
US7314790B2 (en) Enhancement of electron and hole mobilities in &lt;110&gt; Si under biaxial compressive strain
JP2007504652A5 (fr)
TW200509251A (en) Semiconductor device and method for manufacturing the same
EP1362670A3 (fr) Procédé et dispositif de polissage mécano-chimique
JP2009283906A5 (fr)
EP1396877A3 (fr) Substrat pour dispositifs électroniques, son procédé de fabrication, et disposif électronique
WO2006002410A2 (fr) Croissance de sige &lt;110&gt; par compression et structure de dispositif de transistor a effet de champ a porte isolee
WO2009017622A1 (fr) Transistor en couches minces semi-conducteur monocristallin ultramince et son procédé de fabrication
TW520540B (en) Method of producing anneal wafer and anneal wafer
JP2010045204A (ja) 半導体基板、半導体装置およびその製造方法
JP2007043121A5 (fr)
US20120329230A1 (en) Fabrication of silicon oxide and oxynitride having sub-nanometer thickness
JP2000091577A (ja) ゲ―ト酸化物を形成する方法
JP2010103296A (ja) 酸化ゲルマニウムの製造方法およびそれを用いた半導体デバイスの製造方法
US20060016786A1 (en) Method and apparatus for removing SiC or low k material film
JP2004031394A5 (fr)
CN104392919A (zh) Nmos器件的硅衬底表面的处理方法及nmos器件的制作方法
JPH04290430A (ja) シリコン層のエッチング方法
JP2006114802A (ja) Ｉｉｉ−ｖ族半導体層に上部層が積層されている構造体とその製造方法
JPH10308373A (ja) シリコンウエ−ハおよびその洗浄方法