SG11201403616WA - Method for manufacturing bonded soi wafer - Google Patents

Method for manufacturing bonded soi wafer

Info

Publication number
SG11201403616WA
SG11201403616WA SG11201403616WA SG11201403616WA SG11201403616WA SG 11201403616W A SG11201403616W A SG 11201403616WA SG 11201403616W A SG11201403616W A SG 11201403616WA SG 11201403616W A SG11201403616W A SG 11201403616WA SG 11201403616W A SG11201403616W A SG 11201403616WA
Authority
SG
Singapore
Prior art keywords
soi
layer surface
soi layer
treatment
rto
Prior art date
Application number
SG11201403616WA
Other languages
English (en)
Inventor
Norihiro Kobayashi
Toru Ishizuka
Hiroji Aga
Original Assignee
Shinetsu Handotai Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Handotai Kk filed Critical Shinetsu Handotai Kk
Publication of SG11201403616WA publication Critical patent/SG11201403616WA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Element Separation (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
SG11201403616WA 2012-01-24 2012-12-26 Method for manufacturing bonded soi wafer SG11201403616WA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012012256A JP5673572B2 (ja) 2012-01-24 2012-01-24 貼り合わせｓｏｉウェーハの製造方法
PCT/JP2012/008300 WO2013111242A1 (ja) 2012-01-24 2012-12-26 貼り合わせｓｏｉウェーハの製造方法

Publications (1)

Publication Number Publication Date
SG11201403616WA true SG11201403616WA (en) 2014-12-30

Family

ID=48873020

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201403616WA SG11201403616WA (en) 2012-01-24 2012-12-26 Method for manufacturing bonded soi wafer

Country Status (7)

Country Link
US (1) US9093497B2 (ja)
EP (1) EP2808889B1 (ja)
JP (1) JP5673572B2 (ja)
KR (1) KR101846931B1 (ja)
CN (1) CN104115255B (ja)
SG (1) SG11201403616WA (ja)
WO (1) WO2013111242A1 (ja)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016201454A (ja) * 2015-04-09 2016-12-01 信越半導体株式会社 Ｓｏｉウェーハの製造方法
CN104891430B (zh) * 2015-04-17 2016-09-28 上海华虹宏力半导体制造有限公司 硅片键合方法
JP6380245B2 (ja) * 2015-06-15 2018-08-29 信越半導体株式会社 Ｓｏｉウェーハの製造方法
CN106653677A (zh) * 2016-09-22 2017-05-10 东莞市联洲知识产权运营管理有限公司 一种soi片的制备方法
JP6531743B2 (ja) * 2016-09-27 2019-06-19 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法
US11715639B2 (en) * 2016-11-29 2023-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and fabrication method therefor
CN106601615B (zh) * 2016-12-27 2020-05-15 上海新傲科技股份有限公司 提高键合强度的退火方法
JP6834932B2 (ja) * 2017-12-19 2021-02-24 株式会社Sumco 貼り合わせウェーハ用の支持基板の製造方法および貼り合わせウェーハの製造方法
CN110400773B (zh) * 2018-04-24 2022-06-07 沈阳硅基科技有限公司 一种采用快速热处理工艺制备soi硅片的方法
FR3132380A1 (fr) * 2022-01-31 2023-08-04 Soitec Procédé de fabrication d’une structure de type double semi-conducteur sur isolant

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JPH11307472A (ja) 1998-04-23 1999-11-05 Shin Etsu Handotai Co Ltd 水素イオン剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
JP2000124092A (ja) * 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
WO2003009386A1 (fr) * 2001-07-17 2003-01-30 Shin-Etsu Handotai Co.,Ltd. Procede de production de plaquettes de liaison
JP2004281805A (ja) * 2003-03-17 2004-10-07 Sumitomo Mitsubishi Silicon Corp 半導体ウェーハの平坦化処理方法
JP2008526010A (ja) * 2004-12-28 2008-07-17 エス． オー． アイ． テック シリコン オン インシュレーター テクノロジーズ 低いホール密度を有する薄層を得るための方法
JP4715470B2 (ja) * 2005-11-28 2011-07-06 株式会社Ｓｕｍｃｏ 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
JP5125194B2 (ja) * 2007-04-10 2013-01-23 信越半導体株式会社 貼り合わせウエーハの製造方法
JP5135935B2 (ja) * 2007-07-27 2013-02-06 信越半導体株式会社 貼り合わせウエーハの製造方法
JP2009289948A (ja) * 2008-05-29 2009-12-10 Sumco Corp 貼り合わせウェーハの製造方法

Also Published As

Publication number Publication date
US20150017783A1 (en) 2015-01-15
KR20140123505A (ko) 2014-10-22
JP2013153016A (ja) 2013-08-08
US9093497B2 (en) 2015-07-28
EP2808889B1 (en) 2016-10-26
CN104115255B (zh) 2016-08-24
EP2808889A4 (en) 2015-09-30
WO2013111242A1 (ja) 2013-08-01
CN104115255A (zh) 2014-10-22
EP2808889A1 (en) 2014-12-03
JP5673572B2 (ja) 2015-02-18
KR101846931B1 (ko) 2018-04-10

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