KR940006268A - 반도체 기억장치 - Google Patents
반도체 기억장치 Download PDFInfo
- Publication number
- KR940006268A KR940006268A KR1019930013407A KR930013407A KR940006268A KR 940006268 A KR940006268 A KR 940006268A KR 1019930013407 A KR1019930013407 A KR 1019930013407A KR 930013407 A KR930013407 A KR 930013407A KR 940006268 A KR940006268 A KR 940006268A
- Authority
- KR
- South Korea
- Prior art keywords
- peripheral circuit
- semiconductor memory
- circuit portion
- memory device
- storage capacitor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/50—Peripheral circuit region structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
본 발명은 충분한 축적용량을 확보하면서 주변회로부의 접촉구멍에서의 기판과의 접속을 용이하게 이룰수 있는 반도체 기억장치를 제공하고자 하는 것이다.
이를 위해 본 발명은, 다이나믹형 RAM의 축적용량부가 워드선이 형성된 후에 형성된 적층형 반도체 기억 장치에 있어서, 축적용량부의 상부전극(18)이 TiN막(18a)과 W막(18b)의 2층 구조로 되어 있고, 주변회로부에서는 이 2층이 배선으로 되어 하층배선 또는 기판(10)에 접속되어 있으며, 또 TiN막(18a)은 주변회로부의 평탄부에만 형성되고, W자(18b)은 주변회로부의 평탄부 및 접촉구멍내에 형성되어 있는 것을 특징으로 한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제l도는 본 발명의 제1실시예에 따른 DRAM의 소자구조를 나타낸 평면도.
제2도는 본 발명의 제1실시예에 따른 DRAM의 제조공정의 전반부를 나타낸 단면도,
제3도는 본 발명의 제1실시예에 따른 DRAM의 제조공정의 중반부를 나타낸 단면도.
Claims (3)
- 적층형 반도체기억장치에 있어서, 축적용랑부의 상부전극이 주변회로부에서는 배선층으로서 사용되고 있는 것을 특징으로 하는 반도체 기억장치.
- 다이나믹형 RAM의 축적용량부가 워드선이 형성된 후에 형성된 적층형 반도체 기억장치에 있어서, 상기 축적용량부의 상부전극이 2층이상의 적층구조로 되어 있고, 주변회로부에서는 그 층이 배선으로 되어 하층배선 또는 기판에 접속되어 있으며, 또 그 층의 1층째는 주변회로부의 평탄부에만 형성되고, 그층의 2층째 이후는 주변회로부의 평탄부 및 접촉구멍내에 형성되어 있는 것을 특징으로 하는 반도체 기억 장치.
- 다이나믹형 RAM의 축적용량부가 워드선이 형성된 후에 형성된 적층형 반도체 기억장치에 있어서, 상기 축적용량부의 상부전극이 2층이상의 적층구조로 되어있고, 주변회로부에서는 그층의 2층째 이후가 배선으로 되어 하층배선 또는 기판에 접속되어 있는 것을 특징으로 하는 반도체 기억장치※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19112092A JP3197064B2 (ja) | 1992-07-17 | 1992-07-17 | 半導体記憶装置 |
JP92-191120 | 1992-07-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940006268A true KR940006268A (ko) | 1994-03-23 |
KR970005694B1 KR970005694B1 (en) | 1997-04-18 |
Family
ID=16269203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR93013407A KR970005694B1 (en) | 1992-07-17 | 1993-07-16 | Semiconductor memory device |
Country Status (4)
Country | Link |
---|---|
US (1) | US5414655A (ko) |
JP (1) | JP3197064B2 (ko) |
KR (1) | KR970005694B1 (ko) |
DE (1) | DE4323961A1 (ko) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4221432C2 (de) * | 1992-06-30 | 1994-06-09 | Siemens Ag | Globales Planarisierungsverfahren für integrierte Halbleiterschaltungen oder mikromechanische Bauteile |
US5714779A (en) * | 1992-06-30 | 1998-02-03 | Siemens Aktiengesellschaft | Semiconductor memory device having a transistor, a bit line, a word line and a stacked capacitor |
EP0606758B1 (en) * | 1992-12-30 | 2000-09-06 | Samsung Electronics Co., Ltd. | Method of producing an SOI transistor DRAM |
JP4190760B2 (ja) * | 1995-01-31 | 2008-12-03 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
US6744091B1 (en) * | 1995-01-31 | 2004-06-01 | Fujitsu Limited | Semiconductor storage device with self-aligned opening and method for fabricating the same |
JP2008263211A (ja) * | 1995-01-31 | 2008-10-30 | Fujitsu Ltd | 半導体装置 |
JP3127348B2 (ja) * | 1995-02-27 | 2001-01-22 | エルジイ・セミコン・カンパニイ・リミテッド | 凹凸の表面形状を有するタングステン膜を用いた半導体装置の製造方法 |
US5539230A (en) * | 1995-03-16 | 1996-07-23 | International Business Machines Corporation | Chimney capacitor |
US5914504A (en) * | 1995-06-16 | 1999-06-22 | Imec Vzw | DRAM applications using vertical MISFET devices |
US5920088A (en) | 1995-06-16 | 1999-07-06 | Interuniversitair Micro-Electronica Centrum (Imec Vzw) | Vertical MISFET devices |
US5963800A (en) * | 1995-06-16 | 1999-10-05 | Interuniversitair Micro-Elektronica Centrum (Imec Vzw) | CMOS integration process having vertical channel |
US6004839A (en) * | 1996-01-17 | 1999-12-21 | Nec Corporation | Semiconductor device with conductive plugs |
DE19618530A1 (de) * | 1996-05-08 | 1997-11-13 | Siemens Ag | Kondensator mit einer Carbid- oder Boridbarriereschicht |
US5866946A (en) * | 1996-05-23 | 1999-02-02 | Kabushiki Kaisha Toshiba | Semiconductor device having a plug for diffusing hydrogen into a semiconductor substrate |
JP2005244251A (ja) * | 1996-07-10 | 2005-09-08 | Fujitsu Ltd | 半導体装置とその製造方法 |
JP3941133B2 (ja) * | 1996-07-18 | 2007-07-04 | 富士通株式会社 | 半導体装置およびその製造方法 |
JP3516558B2 (ja) * | 1996-08-26 | 2004-04-05 | シャープ株式会社 | 半導体装置の製造方法 |
JPH1070252A (ja) * | 1996-08-27 | 1998-03-10 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
TW377495B (en) | 1996-10-04 | 1999-12-21 | Hitachi Ltd | Method of manufacturing semiconductor memory cells and the same apparatus |
KR100238218B1 (ko) * | 1996-11-29 | 2000-02-01 | 윤종용 | 반도체장치의 커패시터 제조방법 |
JP2923912B2 (ja) * | 1996-12-25 | 1999-07-26 | 日本電気株式会社 | 半導体装置 |
JPH10242419A (ja) | 1997-02-27 | 1998-09-11 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
TW399319B (en) * | 1997-03-19 | 2000-07-21 | Hitachi Ltd | Semiconductor device |
JPH11186524A (ja) | 1997-12-24 | 1999-07-09 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6384446B2 (en) * | 1998-02-17 | 2002-05-07 | Agere Systems Guardian Corp. | Grooved capacitor structure for integrated circuits |
TW410424B (en) * | 1998-09-30 | 2000-11-01 | Taiwan Semiconductor Mfg | Method for reducing the aspect ratio of the DRAM periphery contact |
US6072210A (en) | 1998-12-24 | 2000-06-06 | Lucent Technologies Inc. | Integrate DRAM cell having a DRAM capacitor and a transistor |
TW454330B (en) * | 1999-05-26 | 2001-09-11 | Matsushita Electronics Corp | Semiconductor apparatus and its manufacturing method |
US6333225B1 (en) | 1999-08-20 | 2001-12-25 | Micron Technology, Inc. | Integrated circuitry and methods of forming circuitry |
JP4829678B2 (ja) * | 2000-10-17 | 2011-12-07 | パナソニック株式会社 | 強誘電体メモリ及びその製造方法 |
US6958508B2 (en) * | 2000-10-17 | 2005-10-25 | Matsushita Electric Industrial Co., Ltd. | Ferroelectric memory having ferroelectric capacitor insulative film |
KR20020052455A (ko) * | 2000-12-26 | 2002-07-04 | 박종섭 | 반도체 소자의 제조방법 |
JP2003289134A (ja) * | 2002-03-28 | 2003-10-10 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
KR100469151B1 (ko) * | 2002-05-24 | 2005-02-02 | 주식회사 하이닉스반도체 | 반도체소자의 형성 방법 |
DE10228571A1 (de) * | 2002-06-26 | 2004-01-22 | Infineon Technologies Ag | Herstellungsverfahren für eine Halbleiterstruktur mit einer Mehrzahl von Gatestapeln auf einem Halbleitersubstrat und entsprechende Halbleiterstruktur |
KR100448719B1 (ko) * | 2002-10-18 | 2004-09-13 | 삼성전자주식회사 | 다마신공정을 이용한 반도체 장치 및 그의 제조방법 |
JP2006108152A (ja) * | 2004-09-30 | 2006-04-20 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
JP4557903B2 (ja) * | 2006-02-10 | 2010-10-06 | パナソニック株式会社 | 半導体装置及びその製造方法 |
DE102006016530A1 (de) * | 2006-04-07 | 2007-10-11 | Infineon Technologies Ag | Speicherkondensator und Verfahren zum Herstellen eines solchen Speicherkondensators |
US20100223433A1 (en) * | 2009-02-27 | 2010-09-02 | Tatu Ylonen Oy Ltd | Configurable object graph traversal with redirection for garbage collection |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0789569B2 (ja) * | 1986-03-26 | 1995-09-27 | 株式会社日立製作所 | 半導体集積回路装置及びその製造方法 |
JPH01154551A (ja) * | 1987-12-11 | 1989-06-16 | Oki Electric Ind Co Ltd | 半導体メモリ集積回路装置及びその製造方法 |
JP2590171B2 (ja) * | 1988-01-08 | 1997-03-12 | 株式会社日立製作所 | 半導体記憶装置 |
JPH0828473B2 (ja) * | 1988-09-29 | 1996-03-21 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
EP0370407A1 (en) * | 1988-11-18 | 1990-05-30 | Nec Corporation | Semiconductor memory device of one transistor - one capacitor memory cell type |
FR2658951B1 (fr) * | 1990-02-23 | 1992-05-07 | Bonis Maurice | Procede de fabrication d'un circuit integre pour filiere analogique rapide utilisant des lignes d'interconnexions locales en siliciure. |
JPH0834304B2 (ja) * | 1990-09-20 | 1996-03-29 | 富士通株式会社 | 半導体装置およびその製造方法 |
-
1992
- 1992-07-17 JP JP19112092A patent/JP3197064B2/ja not_active Expired - Fee Related
-
1993
- 1993-07-16 KR KR93013407A patent/KR970005694B1/ko not_active IP Right Cessation
- 1993-07-16 DE DE4323961A patent/DE4323961A1/de not_active Ceased
- 1993-07-16 US US08/094,421 patent/US5414655A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0637280A (ja) | 1994-02-10 |
KR970005694B1 (en) | 1997-04-18 |
DE4323961A1 (de) | 1994-01-20 |
US5414655A (en) | 1995-05-09 |
JP3197064B2 (ja) | 2001-08-13 |
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