KR920010900A - 반도체지연회로 - Google Patents

반도체지연회로 Download PDF

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Publication number
KR920010900A
KR920010900A KR1019910017674A KR910017674A KR920010900A KR 920010900 A KR920010900 A KR 920010900A KR 1019910017674 A KR1019910017674 A KR 1019910017674A KR 910017674 A KR910017674 A KR 910017674A KR 920010900 A KR920010900 A KR 920010900A
Authority
KR
South Korea
Prior art keywords
terminal
switching means
power supply
supply voltage
delay circuit
Prior art date
Application number
KR1019910017674A
Other languages
English (en)
Other versions
KR960001294B1 (ko
Inventor
다다루유끼 미야모토
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR920010900A publication Critical patent/KR920010900A/ko
Application granted granted Critical
Publication of KR960001294B1 publication Critical patent/KR960001294B1/ko

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015Layout of the delay element
    • H03K2005/00195Layout of the delay element using FET's

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Pulse Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

내용 없음

Description

반도체지연회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예를 표시하는 회로도, 제2도는 제어전압을 변화하게했을때의 지연시간과 전원전압의 관계를 표시하는 그래프, 제3도는 제1의 지연회로의 상세를 표시하는 회로도.

Claims (1)

  1. 반도체기판에 형성되는 반도체지연회로이고, 전원전압단자와, 접지단자와, 제1 및 제2의 도통단자 및 제어 단자를 포함하고, 상기 제1의 도통단자가 전원전압에 접속되어, 상기 제어단자에 입력되는 신호에 응답하고 스위칭하는 제1의 스위칭수단과, 상기 제1의 스위칭수단의 출력과 접지단자와의 사이에 접속되는 용량과, 상기 제1의 스위칭수단의 출력에 접속되어 스위칭수단의 출력이 일정레벨을 넘으면, 스위칭하는 제2의 스위칭수단과, 전원 전압의 변화에 응답하고, 전원전압의 약 2분의 1승에 비례하는 전압신호를 발생하는 제어전압발생수단과, 상기 제1의 스위칭수단의 제2의 도통단자에 드레인이 접속되어 상기 접지단자에 소스가 접속되어, 상기 제어전압발생 수단에 게이트가 접속되어, 상기 전압신호에 응답하여 구동능력이 변화하는 절연형 전계트랜지스터를 포함하는 반도체지연회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910017674A 1990-11-06 1991-10-09 반도체지연회로 KR960001294B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2301466A JPH04172711A (ja) 1990-11-06 1990-11-06 半導体遅延回路
JP90-301466 1990-11-06

Publications (2)

Publication Number Publication Date
KR920010900A true KR920010900A (ko) 1992-06-27
KR960001294B1 KR960001294B1 (ko) 1996-01-25

Family

ID=17897240

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910017674A KR960001294B1 (ko) 1990-11-06 1991-10-09 반도체지연회로

Country Status (4)

Country Link
US (1) US5164621A (ko)
JP (1) JPH04172711A (ko)
KR (1) KR960001294B1 (ko)
DE (1) DE4135030C2 (ko)

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Also Published As

Publication number Publication date
DE4135030C2 (de) 1994-09-08
JPH04172711A (ja) 1992-06-19
DE4135030A1 (de) 1992-05-07
KR960001294B1 (ko) 1996-01-25
US5164621A (en) 1992-11-17

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