KR900017136A - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR900017136A KR900017136A KR1019900005982A KR900005982A KR900017136A KR 900017136 A KR900017136 A KR 900017136A KR 1019900005982 A KR1019900005982 A KR 1019900005982A KR 900005982 A KR900005982 A KR 900005982A KR 900017136 A KR900017136 A KR 900017136A
- Authority
- KR
- South Korea
- Prior art keywords
- film
- semiconductor device
- electrode layers
- metal electrode
- insulating film
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims 7
- 239000010410 layer Substances 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 229920005591 polysilicon Polymers 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 3
- 239000011229 interlayer Substances 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims 2
- 150000004767 nitrides Chemical class 0.000 claims 2
- 230000008018 melting Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 229910021332 silicide Inorganic materials 0.000 claims 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 1
- 239000006104 solid solution Substances 0.000 claims 1
- 239000000463 material Substances 0.000 description 3
- 229910016006 MoSi Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a도는 본 발명의 제1실시예에 따른 본딩패드부의 구조를 나타낸 단면도.
제2b도는 본 발명의 제2실시예에 따른 본딩패드부의 구조를 나타낸 단면도.
* 도면의 주요부분에 대한 부호의 설명
101, 201 : 실리콘기판 102,202 : 필드 산화막
103 : 폴리실리콘막(제1층의 게이트재료) 104 : ONO 절연막
1051: 폴리실리콘막
1052: MoSi막(제2층의 게이트재료)
106, 203 : 장벽금속층 107, 204 : 금속전극층
108 : 층간절연막 109, 205 : 패시베이션막
110 : 폴리실리콘막(제3층의 재료) 120, 206 : 본딩와이어
Claims (3)
- 반도체기판(101)과, 이 반도체기판(101)상에 형성된 절연막(102), 이 절연막(102)상에 형성되어 본딩패드로서 이용되는 금속전극층(106,107) 및, 이 금속전극층(106,107)에 접속된 본딩와이어(120)를 갖춘 반도체장치에 있어서, 상기 절연막(102)과 상기 금속전극층(106,107)간에 제1폴리실리콘막(103)과, 제1산화막과 이 제1산화막상에 형성된 질화막 및 이 질화막상에 형성된 제2산화막을 구비한 복합막(104) 및, 이 복합막(104)상에 형성된 제2폴리실리콘막(1051)을 더 갖춘 것을 특징으로 하는 반도체장치.
- 제1항에 있어서, 상기 금속전극층(106,107)과 상기 제2폴리실리콘막(1051)간에 고용된 금속막 또는 고융점 금속실리사이드로 이루어지는 막(1052)을 더 갖춘 것을 특징으로 한느 반도체장치.
- 제2항에 있어서, 상기 막(1052)과 상기 금속전극층(106,107)간에 층간절연막(108)을 더 갖춘 것을 특징으로 하는 반도체장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01-105912 | 1989-04-27 | ||
JP1105912A JPH02285638A (ja) | 1989-04-27 | 1989-04-27 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
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KR900017136A true KR900017136A (ko) | 1990-11-15 |
KR930010981B1 KR930010981B1 (ko) | 1993-11-18 |
Family
ID=14420077
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900005982A KR930010981B1 (ko) | 1989-04-27 | 1990-04-27 | 반도체장치 |
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Country | Link |
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US (1) | US5036383A (ko) |
EP (1) | EP0395072B1 (ko) |
JP (1) | JPH02285638A (ko) |
KR (1) | KR930010981B1 (ko) |
DE (1) | DE69033229T2 (ko) |
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US5249728A (en) * | 1993-03-10 | 1993-10-05 | Atmel Corporation | Bumpless bonding process having multilayer metallization |
JP2944840B2 (ja) * | 1993-03-12 | 1999-09-06 | 株式会社日立製作所 | 電力用半導体装置 |
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US5633196A (en) * | 1994-05-31 | 1997-05-27 | Sgs-Thomson Microelectronics, Inc. | Method of forming a barrier and landing pad structure in an integrated circuit |
US5956615A (en) * | 1994-05-31 | 1999-09-21 | Stmicroelectronics, Inc. | Method of forming a metal contact to landing pad structure in an integrated circuit |
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US5661081A (en) * | 1994-09-30 | 1997-08-26 | United Microelectronics Corporation | Method of bonding an aluminum wire to an intergrated circuit bond pad |
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JP4156044B2 (ja) * | 1994-12-22 | 2008-09-24 | エスティーマイクロエレクトロニクス,インコーポレイテッド | 集積回路におけるランディングパッド構成体の製造方法 |
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KR100475734B1 (ko) * | 1997-10-14 | 2005-06-23 | 삼성전자주식회사 | 와이어본딩충격에대한완충특성을갖는반도체장치의패드및그제조방법 |
US6274292B1 (en) * | 1998-02-25 | 2001-08-14 | Micron Technology, Inc. | Semiconductor processing methods |
US7804115B2 (en) | 1998-02-25 | 2010-09-28 | Micron Technology, Inc. | Semiconductor constructions having antireflective portions |
EP1061570B1 (en) * | 1998-02-25 | 2007-01-24 | Citizen Watch Co. Ltd. | Semiconductor device with bumped contacts and manufacturing method thereof |
JP3121311B2 (ja) * | 1998-05-26 | 2000-12-25 | 日本電気株式会社 | 多層配線構造及びそれを有する半導体装置並びにそれらの製造方法 |
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US6281100B1 (en) | 1998-09-03 | 2001-08-28 | Micron Technology, Inc. | Semiconductor processing methods |
US6037668A (en) * | 1998-11-13 | 2000-03-14 | Motorola, Inc. | Integrated circuit having a support structure |
US6020647A (en) * | 1998-12-18 | 2000-02-01 | Vlsi Technology, Inc. | Composite metallization structures for improved post bonding reliability |
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US8021976B2 (en) | 2002-10-15 | 2011-09-20 | Megica Corporation | Method of wire bonding over active area of a semiconductor circuit |
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JP3327244B2 (ja) * | 1999-03-12 | 2002-09-24 | 日本電気株式会社 | 半導体装置 |
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JP2002076051A (ja) * | 2000-09-01 | 2002-03-15 | Nec Corp | 半導体装置のボンディングパッド構造及びボンディング方法 |
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KR100403619B1 (ko) * | 2001-02-21 | 2003-10-30 | 삼성전자주식회사 | 열적/기계적 스트레스에 저항성이 강한 반도체 소자의 본드패드 및 그 형성방법 |
US6465895B1 (en) | 2001-04-05 | 2002-10-15 | Samsung Electronics Co., Ltd. | Bonding pad structures for semiconductor devices and fabrication methods thereof |
JP3943416B2 (ja) * | 2002-03-07 | 2007-07-11 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JP3967199B2 (ja) * | 2002-06-04 | 2007-08-29 | シャープ株式会社 | 半導体装置及びその製造方法 |
JP3724464B2 (ja) * | 2002-08-19 | 2005-12-07 | 株式会社デンソー | 半導体圧力センサ |
US6686665B1 (en) * | 2002-09-04 | 2004-02-03 | Zeevo, Inc. | Solder pad structure for low temperature co-fired ceramic package and method for making the same |
US20120299187A1 (en) * | 2011-05-27 | 2012-11-29 | Broadcom Corporation | Aluminum Bond Pad With Trench Thinning for Fine Pitch Ultra-Thick Aluminum Products |
JP2016028417A (ja) | 2014-07-11 | 2016-02-25 | ローム株式会社 | 電子装置 |
DE102018105462A1 (de) * | 2018-03-09 | 2019-09-12 | Infineon Technologies Ag | Halbleitervorrichtung, die ein bondpad und einen bonddraht oder -clip enthält |
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JPS53124084A (en) * | 1977-04-06 | 1978-10-30 | Hitachi Ltd | Semiconductor memory device containing floating type poly silicon layer and its manufacture |
US4136434A (en) * | 1977-06-10 | 1979-01-30 | Bell Telephone Laboratories, Incorporated | Fabrication of small contact openings in large-scale-integrated devices |
US4276557A (en) * | 1978-12-29 | 1981-06-30 | Bell Telephone Laboratories, Incorporated | Integrated semiconductor circuit structure and method for making it |
US4329706A (en) * | 1979-03-01 | 1982-05-11 | International Business Machines Corporation | Doped polysilicon silicide semiconductor integrated circuit interconnections |
US4398335A (en) * | 1980-12-09 | 1983-08-16 | Fairchild Camera & Instrument Corporation | Multilayer metal silicide interconnections for integrated circuits |
JPS5921034A (ja) * | 1982-07-27 | 1984-02-02 | Toshiba Corp | 半導体装置 |
US4613956A (en) * | 1983-02-23 | 1986-09-23 | Texas Instruments Incorporated | Floating gate memory with improved dielectric |
JPS59204276A (ja) * | 1983-05-06 | 1984-11-19 | Nec Corp | 絶縁ゲ−ト電界効果半導体装置 |
US4823181A (en) * | 1986-05-09 | 1989-04-18 | Actel Corporation | Programmable low impedance anti-fuse element |
US4824803A (en) * | 1987-06-22 | 1989-04-25 | Standard Microsystems Corporation | Multilayer metallization method for integrated circuits |
JP2503022B2 (ja) * | 1987-07-23 | 1996-06-05 | 三井東圧化学株式会社 | 4▲’▼−ヒドロキシビフェニル−3−カルボン酸の製造方法 |
JP2735193B2 (ja) * | 1987-08-25 | 1998-04-02 | 株式会社東芝 | 不揮発性半導体装置及びその製造方法 |
US4872050A (en) * | 1988-03-15 | 1989-10-03 | Mitsubishi Denki Kabushiki Kaisha | Interconnection structure in semiconductor device and manufacturing method of the same |
-
1989
- 1989-04-27 JP JP1105912A patent/JPH02285638A/ja active Pending
-
1990
- 1990-04-24 US US07/513,973 patent/US5036383A/en not_active Expired - Lifetime
- 1990-04-26 DE DE69033229T patent/DE69033229T2/de not_active Expired - Fee Related
- 1990-04-26 EP EP90107998A patent/EP0395072B1/en not_active Expired - Lifetime
- 1990-04-27 KR KR1019900005982A patent/KR930010981B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH02285638A (ja) | 1990-11-22 |
US5036383A (en) | 1991-07-30 |
DE69033229T2 (de) | 1999-12-16 |
EP0395072B1 (en) | 1999-08-04 |
KR930010981B1 (ko) | 1993-11-18 |
DE69033229D1 (de) | 1999-09-09 |
EP0395072A2 (en) | 1990-10-31 |
EP0395072A3 (en) | 1991-07-17 |
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