KR900015142A - 반도체 집적회로장치 - Google Patents

반도체 집적회로장치 Download PDF

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Publication number
KR900015142A
KR900015142A KR1019900000094A KR900000094A KR900015142A KR 900015142 A KR900015142 A KR 900015142A KR 1019900000094 A KR1019900000094 A KR 1019900000094A KR 900000094 A KR900000094 A KR 900000094A KR 900015142 A KR900015142 A KR 900015142A
Authority
KR
South Korea
Prior art keywords
integrated circuit
circuit device
semiconductor integrated
semiconductor substrate
test mode
Prior art date
Application number
KR1019900000094A
Other languages
English (en)
Other versions
KR930009025B1 (ko
Inventor
요우이찌 도비다
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR900015142A publication Critical patent/KR900015142A/ko
Application granted granted Critical
Publication of KR930009025B1 publication Critical patent/KR930009025B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

내용 없음.

Description

반도체 집적회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한 실시예에 의한 반도체 기억장치에 포함되는 기판전압 전환회로의 구성을 표시하는블럭도.
제2도는 이 발명의 다른 실시예에 의한 반도체 기억장치에 포함되는 기판 전압전환회로의 구성을 표시하는 블럭도.
제6도는 제1도 및 제2도에 표시되는 VBB발생회로(10a)의 구성의 한 예를 표시 하는 회로도.
제12도는 제2도에 표시되는 전환신호 발생회로(20a)의 구성을 한예를 표시하는 회로도.

Claims (1)

  1. 통상의 동작 모드와 테스트 모드와를 가지고, 반도체 기판상에 형성된 집적회로장치이며, 상기 테스트 모드에 있어서, 상기 반도체 기판의 전압을 전환하기 위한 기판 전압 전환수단을 구비하는, 반도체 집적회로 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900000094A 1989-03-08 1990-01-05 반도체집적회로 장치 KR930009025B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1056609A JP2688976B2 (ja) 1989-03-08 1989-03-08 半導体集積回路装置
JP1-56609 1989-03-08
JP56609 1989-03-08

Publications (2)

Publication Number Publication Date
KR900015142A true KR900015142A (ko) 1990-10-26
KR930009025B1 KR930009025B1 (ko) 1993-09-18

Family

ID=13031987

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900000094A KR930009025B1 (ko) 1989-03-08 1990-01-05 반도체집적회로 장치

Country Status (4)

Country Link
US (1) US5065091A (ko)
JP (1) JP2688976B2 (ko)
KR (1) KR930009025B1 (ko)
DE (1) DE4007187C2 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100453885B1 (ko) * 1997-08-06 2005-01-17 삼성전자주식회사 칩 테스트를 위한 전압강하회로
US9543951B2 (en) 2015-04-14 2017-01-10 SK Hynix Inc. Semiconductor apparatus

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US5283762A (en) * 1990-05-09 1994-02-01 Mitsubishi Denki Kabushiki Kaisha Semiconductor device containing voltage converting circuit and operating method thereof
JP2837252B2 (ja) * 1990-09-10 1998-12-14 シャープ株式会社 集積回路装置
US5315549A (en) * 1991-06-11 1994-05-24 Dallas Semiconductor Corporation Memory controller for nonvolatile RAM operation, systems and methods
US5212442A (en) * 1992-03-20 1993-05-18 Micron Technology, Inc. Forced substrate test mode for packaged integrated circuits
JP3253389B2 (ja) * 1992-03-31 2002-02-04 株式会社東芝 半導体集積回路装置
DE69319273T2 (de) * 1992-04-27 1998-11-05 Fujitsu Ltd Testverfahren für integrierte Halbleiter-Schaltung
JPH05314769A (ja) * 1992-05-13 1993-11-26 Mitsubishi Electric Corp 半導体集積回路装置
JPH0628853A (ja) * 1992-07-08 1994-02-04 Mitsubishi Electric Corp 半導体記憶装置の基板電圧発生回路
DE69330529T2 (de) * 1993-05-28 2002-05-29 Macronix Int Co Ltd Generator für negative Spannungen für Flash-EPROMS
US6031411A (en) * 1993-06-28 2000-02-29 Texas Instruments Incorporated Low power substrate bias circuit
US6587978B1 (en) * 1994-02-14 2003-07-01 Micron Technology, Inc. Circuit and method for varying a pulse width of an internal control signal during a test mode
US5831918A (en) * 1994-02-14 1998-11-03 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode
US5982188A (en) * 1994-07-29 1999-11-09 Stmicroelectronics, Inc. Test mode control circuit of an integrated circuit device
US6005407A (en) * 1995-10-23 1999-12-21 Opmax Inc. Oscillation-based test method for testing an at least partially analog circuit
JPH09213073A (ja) * 1996-02-06 1997-08-15 Mitsubishi Electric Corp 半導体集積回路
US5991214A (en) * 1996-06-14 1999-11-23 Micron Technology, Inc. Circuit and method for varying a period of an internal control signal during a test mode
JPH10125742A (ja) * 1996-10-22 1998-05-15 Mitsubishi Electric Corp 半導体集積回路の良否判定方法及び半導体集積回路
DE19713570C2 (de) * 1997-04-02 1999-08-26 Temic Semiconductor Gmbh Verfahren zum Testen einer Schaltungsanordnung
US6115295A (en) * 1997-07-31 2000-09-05 Texas Instruments Incorporated Efficient back bias (VBB) detection and control scheme for low voltage DRAMS
US6496027B1 (en) * 1997-08-21 2002-12-17 Micron Technology, Inc. System for testing integrated circuit devices
KR100268451B1 (ko) * 1997-12-31 2000-10-16 윤종용 반도체 테스트시스템
US6628564B1 (en) 1998-06-29 2003-09-30 Fujitsu Limited Semiconductor memory device capable of driving non-selected word lines to first and second potentials
JP3430050B2 (ja) 1998-12-28 2003-07-28 日本電気株式会社 半導体記憶装置およびその駆動方法
DE10115614C2 (de) * 2001-03-29 2003-12-18 Infineon Technologies Ag Verfahren zur Stromversorgung eines Halbleiter-Speicherbausteins und Halbleiterbauelement
JP4084117B2 (ja) * 2002-07-26 2008-04-30 株式会社ルネサステクノロジ モータの駆動装置
KR100590204B1 (ko) * 2003-11-04 2006-06-15 삼성전자주식회사 온-칩 셋업/홀드 측정 회로를 포함한 집적 회로 장치
JP4440658B2 (ja) * 2004-01-20 2010-03-24 富士通マイクロエレクトロニクス株式会社 半導体集積回路装置
US7023233B1 (en) * 2004-10-12 2006-04-04 Advantest Corporation Test apparatus and test method
JP5135608B2 (ja) * 2007-12-27 2013-02-06 ルネサスエレクトロニクス株式会社 半導体記憶装置

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US3969706A (en) * 1974-10-08 1976-07-13 Mostek Corporation Dynamic random access memory misfet integrated circuit
JPS62205Y2 (ko) * 1979-12-27 1987-01-07
JPS57186351A (en) * 1981-05-12 1982-11-16 Fujitsu Ltd Semiconductor device
JPS58105563A (ja) * 1981-12-17 1983-06-23 Mitsubishi Electric Corp 基板バイアス発生回路
JPS58153294A (ja) * 1982-03-04 1983-09-12 Mitsubishi Electric Corp 半導体記憶装置
DE3337906A1 (de) * 1983-10-19 1985-05-09 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum pruefen von elektronischen digitalschaltungen
JPS60103587A (ja) * 1983-11-09 1985-06-07 Toshiba Corp 半導体記憶装置のメモリセルキヤパシタ電圧印加回路
US4654849B1 (en) * 1984-08-31 1999-06-22 Texas Instruments Inc High speed concurrent testing of dynamic read/write memory array
JPS61292755A (ja) * 1985-06-20 1986-12-23 Fujitsu Ltd 半導体集積回路
JPS62121374A (ja) * 1985-11-20 1987-06-02 Ricoh Co Ltd テストモ−ド起動回路
JP2721151B2 (ja) * 1986-04-01 1998-03-04 株式会社東芝 半導体集積回路装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100453885B1 (ko) * 1997-08-06 2005-01-17 삼성전자주식회사 칩 테스트를 위한 전압강하회로
US9543951B2 (en) 2015-04-14 2017-01-10 SK Hynix Inc. Semiconductor apparatus

Also Published As

Publication number Publication date
JPH02235368A (ja) 1990-09-18
US5065091A (en) 1991-11-12
JP2688976B2 (ja) 1997-12-10
KR930009025B1 (ko) 1993-09-18
DE4007187A1 (de) 1990-09-20
DE4007187C2 (de) 1997-07-10

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