KR20010039537A - 반도체패키지 및 그 제조방법 - Google Patents
반도체패키지 및 그 제조방법 Download PDFInfo
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- KR20010039537A KR20010039537A KR1020000009150A KR20000009150A KR20010039537A KR 20010039537 A KR20010039537 A KR 20010039537A KR 1020000009150 A KR1020000009150 A KR 1020000009150A KR 20000009150 A KR20000009150 A KR 20000009150A KR 20010039537 A KR20010039537 A KR 20010039537A
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- South Korea
- Prior art keywords
- semiconductor chip
- inner lead
- semiconductor
- package
- lead
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 141
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 239000002390 adhesive tape Substances 0.000 claims description 22
- 239000008393 encapsulating agent Substances 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 15
- 238000005538 encapsulation Methods 0.000 claims description 5
- 238000010408 sweeping Methods 0.000 abstract description 5
- 239000000463 material Substances 0.000 abstract description 2
- 230000017525 heat dissipation Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 229920006336 epoxy molding compound Polymers 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- BSIDXUHWUKTRQL-UHFFFAOYSA-N nickel palladium Chemical compound [Ni].[Pd] BSIDXUHWUKTRQL-UHFFFAOYSA-N 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 230000001413 cellular effect Effects 0.000 description 1
- 239000011093 chipboard Substances 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Abstract
Description
Claims (8)
- 상면에 다수의 입출력패드가 형성된 반도체칩과;상기 반도체칩의 외주연에 일정 거리 이격되어 방사상으로 위치된 다수의 내부리드와;상기 반도체칩의 입출력패드와 상기 내부리드를 전기적으로 접속시키는 다수의 도전성와이어와;상기 반도체칩, 내부리드 및 도전성와이어를 봉지재로 봉지하되, 상기 반도체칩과 내부리드의 저면이 공기중으로 노출되도록 형성된 패키지몸체를 포함하여 이루어진 반도체패키지.
- 제1항에 있어서, 상기 반도체칩을 향하는 내부리드의 단부 하측에는 패키지몸체와 인터락킹되도록 계단형의 할프에칭부가 형성된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 내부리드는 반도체칩으로부터 멀어지는 방향의 단부 측면이 패키지몸체 외측으로 노출된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 내부리드는 패키지몸체 외측으로 상면의 일정 영역이 노출된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 반도체칩과 내부리드 사이에는 그라운드/파워링이 더 형성되어 있으며, 상기 그라운드/파워링의 저면은 패키지몸체 외측으로 노출된 것을 특징으로 하는 반도체패키지.
- 일정영역의 공간부를 중심으로 그 외주연에 방사상 형성된 다수의 내부리드를 포함하는 리드프레임을 제공하는 단계와;상기 내부리드 및 공간부를 포함하는 저면 전체에 접착테이프를 접착하는 단계와;상기 접착테이프의 상면인 공간부에 다수의 입출력패드가 상면에 형성된 반도체칩을 접착하는 단계와;상기 반도체칩의 입출력패드와 내부리드를 도전성와이어로 본딩하는 단계와;상기 반도체칩, 도전성와이어 및 내부리드의 일정 영역을 봉지재로 봉지하여 패키지몸체를 형성하는 단계와;상기 리드프레임에서 낱개의 반도체패키지로 싱귤레이션하는 단계를 포함하여 이루어진 반도체패키지의 제조 방법.
- 제6항에 있어서, 상기 리드프레임 제공 단계는 공간부에 칩탑재판이 더 형성되어 접착테이프가 상기 칩탑재판 저면을 포함하여 접착되고, 반도체칩은 상기 칩탑재판의 상면에 접착됨을 특징으로 하는 반도체패키지의 제조 방법.
- 제6항에 있어서, 상기 봉지 단계후에 반도체칩, 패키지몸체 및 내부리드 저면에 접착된 접착테이프를 제거하여 반도체칩 및 내부리드의 저면이 외부로 노출되도록 하는 반도체패키지의 제조 방법.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101250529B1 (ko) * | 2011-06-08 | 2013-04-03 | 에스티에스반도체통신 주식회사 | Qfn 패키지 및 그 제조 방법 |
WO2013065895A1 (ko) * | 2011-11-03 | 2013-05-10 | 주식회사 네패스 | 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지 |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6143981A (en) | 1998-06-24 | 2000-11-07 | Amkor Technology, Inc. | Plastic integrated circuit package and method and leadframe for making the package |
KR100403142B1 (ko) * | 1999-10-15 | 2003-10-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체패키지 |
US6700185B1 (en) | 1999-11-10 | 2004-03-02 | Hitachi Chemical Co., Ltd. | Adhesive film for semiconductor, lead frame and semiconductor device using the same, and method for manufacturing semiconductor device |
JP3895570B2 (ja) * | 2000-12-28 | 2007-03-22 | 株式会社ルネサステクノロジ | 半導体装置 |
US6734536B2 (en) * | 2001-01-12 | 2004-05-11 | Rohm Co., Ltd. | Surface-mounting semiconductor device and method of making the same |
KR100369393B1 (ko) | 2001-03-27 | 2003-02-05 | 앰코 테크놀로지 코리아 주식회사 | 리드프레임 및 이를 이용한 반도체패키지와 그 제조 방법 |
JP2004071670A (ja) * | 2002-08-02 | 2004-03-04 | Fuji Photo Film Co Ltd | Icパッケージ、接続構造、および電子機器 |
US6903448B1 (en) * | 2002-11-12 | 2005-06-07 | Marvell International Ltd. | High performance leadframe in electronic package |
US20040124508A1 (en) * | 2002-11-27 | 2004-07-01 | United Test And Assembly Test Center Ltd. | High performance chip scale leadframe package and method of manufacturing the package |
US20040130007A1 (en) * | 2003-01-06 | 2004-07-08 | Cheng-Ho Hsu | Flat lead package for a semiconductor device |
JP3938067B2 (ja) * | 2003-02-18 | 2007-06-27 | 株式会社日立製作所 | 電子回路装置 |
US7153724B1 (en) * | 2003-08-08 | 2006-12-26 | Ns Electronics Bangkok (1993) Ltd. | Method of fabricating no-lead package for semiconductor die with half-etched leadframe |
US7709935B2 (en) * | 2003-08-26 | 2010-05-04 | Unisem (Mauritius) Holdings Limited | Reversible leadless package and methods of making and using same |
US6977431B1 (en) * | 2003-11-05 | 2005-12-20 | Amkor Technology, Inc. | Stackable semiconductor package and manufacturing method thereof |
CN1331221C (zh) * | 2003-12-19 | 2007-08-08 | 威宇科技测试封装有限公司 | 芯片球栅阵列封装结构 |
US7554179B2 (en) * | 2005-02-08 | 2009-06-30 | Stats Chippac Ltd. | Multi-leadframe semiconductor package and method of manufacture |
JP2008532277A (ja) * | 2005-02-23 | 2008-08-14 | エヌエックスピー ビー ヴィ | 改良したボンディングパッド接続部を備える集積回路パッケージ装置、リードフレームおよび電子装置 |
TWM279015U (en) * | 2005-04-26 | 2005-10-21 | Lingsen Precision Ind Ltd | Metal leadframes for integrated circuits with different thickness of pins |
SG132533A1 (en) | 2005-11-21 | 2007-06-28 | St Microelectronics Asia | Ultra-thin quad flat no-lead (qfn) package and method of fabricating the same |
US7507603B1 (en) | 2005-12-02 | 2009-03-24 | Amkor Technology, Inc. | Etch singulated semiconductor package |
US7468548B2 (en) * | 2005-12-09 | 2008-12-23 | Fairchild Semiconductor Corporation | Thermal enhanced upper and dual heat sink exposed molded leadless package |
DE102005062344B4 (de) * | 2005-12-23 | 2010-08-19 | Infineon Technologies Ag | Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils |
US7968998B1 (en) | 2006-06-21 | 2011-06-28 | Amkor Technology, Inc. | Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package |
US8422243B2 (en) * | 2006-12-13 | 2013-04-16 | Stats Chippac Ltd. | Integrated circuit package system employing a support structure with a recess |
US7977774B2 (en) | 2007-07-10 | 2011-07-12 | Amkor Technology, Inc. | Fusion quad flat semiconductor package |
US7687899B1 (en) | 2007-08-07 | 2010-03-30 | Amkor Technology, Inc. | Dual laminate package structure with embedded elements |
US7777351B1 (en) | 2007-10-01 | 2010-08-17 | Amkor Technology, Inc. | Thin stacked interposer package |
US8089159B1 (en) | 2007-10-03 | 2012-01-03 | Amkor Technology, Inc. | Semiconductor package with increased I/O density and method of making the same |
US7847386B1 (en) | 2007-11-05 | 2010-12-07 | Amkor Technology, Inc. | Reduced size stacked semiconductor package and method of making the same |
US7956453B1 (en) | 2008-01-16 | 2011-06-07 | Amkor Technology, Inc. | Semiconductor package with patterning layer and method of making same |
US7723852B1 (en) | 2008-01-21 | 2010-05-25 | Amkor Technology, Inc. | Stacked semiconductor package and method of making same |
US7812430B2 (en) * | 2008-03-04 | 2010-10-12 | Powertech Technology Inc. | Leadframe and semiconductor package having downset baffle paddles |
US8067821B1 (en) | 2008-04-10 | 2011-11-29 | Amkor Technology, Inc. | Flat semiconductor package with half package molding |
US7768135B1 (en) | 2008-04-17 | 2010-08-03 | Amkor Technology, Inc. | Semiconductor package with fast power-up cycle and method of making same |
US7808084B1 (en) | 2008-05-06 | 2010-10-05 | Amkor Technology, Inc. | Semiconductor package with half-etched locking features |
US8125064B1 (en) | 2008-07-28 | 2012-02-28 | Amkor Technology, Inc. | Increased I/O semiconductor package and method of making same |
US8184453B1 (en) | 2008-07-31 | 2012-05-22 | Amkor Technology, Inc. | Increased capacity semiconductor package |
JP5493323B2 (ja) * | 2008-09-30 | 2014-05-14 | 凸版印刷株式会社 | リードフレーム型基板の製造方法 |
US7847392B1 (en) | 2008-09-30 | 2010-12-07 | Amkor Technology, Inc. | Semiconductor device including leadframe with increased I/O |
US7989933B1 (en) | 2008-10-06 | 2011-08-02 | Amkor Technology, Inc. | Increased I/O leadframe and semiconductor device including same |
US8008758B1 (en) | 2008-10-27 | 2011-08-30 | Amkor Technology, Inc. | Semiconductor device with increased I/O leadframe |
US8089145B1 (en) | 2008-11-17 | 2012-01-03 | Amkor Technology, Inc. | Semiconductor device including increased capacity leadframe |
US8072050B1 (en) | 2008-11-18 | 2011-12-06 | Amkor Technology, Inc. | Semiconductor device with increased I/O leadframe including passive device |
US7875963B1 (en) | 2008-11-21 | 2011-01-25 | Amkor Technology, Inc. | Semiconductor device including leadframe having power bars and increased I/O |
US7982298B1 (en) | 2008-12-03 | 2011-07-19 | Amkor Technology, Inc. | Package in package semiconductor device |
US8487420B1 (en) | 2008-12-08 | 2013-07-16 | Amkor Technology, Inc. | Package in package semiconductor device with film over wire |
US20170117214A1 (en) | 2009-01-05 | 2017-04-27 | Amkor Technology, Inc. | Semiconductor device with through-mold via |
US8680656B1 (en) | 2009-01-05 | 2014-03-25 | Amkor Technology, Inc. | Leadframe structure for concentrated photovoltaic receiver package |
US8058715B1 (en) | 2009-01-09 | 2011-11-15 | Amkor Technology, Inc. | Package in package device for RF transceiver module |
US8026589B1 (en) | 2009-02-23 | 2011-09-27 | Amkor Technology, Inc. | Reduced profile stackable semiconductor package |
US7960818B1 (en) | 2009-03-04 | 2011-06-14 | Amkor Technology, Inc. | Conformal shield on punch QFN semiconductor package |
US8575742B1 (en) | 2009-04-06 | 2013-11-05 | Amkor Technology, Inc. | Semiconductor device with increased I/O leadframe including power bars |
KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
US8674485B1 (en) | 2010-12-08 | 2014-03-18 | Amkor Technology, Inc. | Semiconductor device including leadframe with downsets |
TWI557183B (zh) | 2015-12-16 | 2016-11-11 | 財團法人工業技術研究院 | 矽氧烷組成物、以及包含其之光電裝置 |
US8648450B1 (en) | 2011-01-27 | 2014-02-11 | Amkor Technology, Inc. | Semiconductor device including leadframe with a combination of leads and lands |
JP5953703B2 (ja) * | 2011-10-31 | 2016-07-20 | ソニー株式会社 | リードフレームおよび半導体装置 |
US9704725B1 (en) | 2012-03-06 | 2017-07-11 | Amkor Technology, Inc. | Semiconductor device with leadframe configured to facilitate reduced burr formation |
KR101486790B1 (ko) | 2013-05-02 | 2015-01-28 | 앰코 테크놀로지 코리아 주식회사 | 강성보강부를 갖는 마이크로 리드프레임 |
KR101563911B1 (ko) | 2013-10-24 | 2015-10-28 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 |
US9673122B2 (en) | 2014-05-02 | 2017-06-06 | Amkor Technology, Inc. | Micro lead frame structure having reinforcing portions and method |
US9082760B2 (en) * | 2014-06-16 | 2015-07-14 | Chang Wah Technology Co., Ltd. | Dual layered lead frame |
US9263299B2 (en) | 2014-07-02 | 2016-02-16 | Nxp B.V. | Exposed die clip bond power package |
CN105405823A (zh) * | 2014-08-20 | 2016-03-16 | 飞思卡尔半导体公司 | 具有可检查的焊接点的半导体装置 |
CN108417498A (zh) * | 2018-03-14 | 2018-08-17 | 中国电子科技集团公司第五十八研究所 | 一种芯片的封装方法及封装芯片 |
Family Cites Families (129)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2596993A (en) * | 1949-01-13 | 1952-05-20 | United Shoe Machinery Corp | Method and mold for covering of eyelets by plastic injection |
US3435815A (en) * | 1966-07-15 | 1969-04-01 | Micro Tech Mfg Inc | Wafer dicer |
US3734660A (en) * | 1970-01-09 | 1973-05-22 | Tuthill Pump Co | Apparatus for fabricating a bearing device |
US4189342A (en) * | 1971-10-07 | 1980-02-19 | U.S. Philips Corporation | Semiconductor device comprising projecting contact layers |
US3838984A (en) * | 1973-04-16 | 1974-10-01 | Sperry Rand Corp | Flexible carrier and interconnect for uncased ic chips |
US4054238A (en) * | 1976-03-23 | 1977-10-18 | Western Electric Company, Inc. | Method, apparatus and lead frame for assembling leads with terminals on a substrate |
JPS5479563A (en) * | 1977-12-07 | 1979-06-25 | Kyushu Nippon Electric | Lead frame for semiconductor |
US4332537A (en) * | 1978-07-17 | 1982-06-01 | Dusan Slepcevic | Encapsulation mold with removable cavity plates |
JPS5521128A (en) * | 1978-08-02 | 1980-02-15 | Hitachi Ltd | Lead frame used for semiconductor device and its assembling |
JPS5588356A (en) * | 1978-12-27 | 1980-07-04 | Hitachi Ltd | Semiconductor device |
US4289922A (en) * | 1979-09-04 | 1981-09-15 | Plessey Incorporated | Integrated circuit package and lead frame |
JPS5745959A (en) | 1980-09-02 | 1982-03-16 | Nec Corp | Resin-sealed semiconductor device |
US4417266A (en) * | 1981-08-14 | 1983-11-22 | Amp Incorporated | Power and ground plane structure for chip carrier |
JPS58101317A (ja) | 1981-12-14 | 1983-06-16 | Koike Sanso Kogyo Co Ltd | ポジシヨナ−の回転位置決め装置 |
JPS58160095A (ja) | 1982-03-12 | 1983-09-22 | 明産株式会社 | スリツタナイフの自動位置定めの行なえるスリツタ装置 |
US4451224A (en) * | 1982-03-25 | 1984-05-29 | General Electric Company | Mold device for making plastic articles from resin |
FR2524707B1 (fr) | 1982-04-01 | 1985-05-31 | Cit Alcatel | Procede d'encapsulation de composants semi-conducteurs, et composants encapsules obtenus |
US4646710A (en) * | 1982-09-22 | 1987-03-03 | Crystal Systems, Inc. | Multi-wafer slicing with a fixed abrasive |
US4737839A (en) * | 1984-03-19 | 1988-04-12 | Trilogy Computer Development Partners, Ltd. | Semiconductor chip mounting system |
JPH0612796B2 (ja) * | 1984-06-04 | 1994-02-16 | 株式会社日立製作所 | 半導体装置 |
JPS6139555A (ja) | 1984-07-31 | 1986-02-25 | Toshiba Corp | 放熱板付樹脂封止形半導体装置 |
US4862246A (en) * | 1984-09-26 | 1989-08-29 | Hitachi, Ltd. | Semiconductor device lead frame with etched through holes |
US4862245A (en) * | 1985-04-18 | 1989-08-29 | International Business Machines Corporation | Package semiconductor chip |
JPS629639A (ja) | 1985-07-05 | 1987-01-17 | Nec Yamagata Ltd | 半導体装置の製造方法 |
US4727633A (en) * | 1985-08-08 | 1988-03-01 | Tektronix, Inc. | Method of securing metallic members together |
US4756080A (en) * | 1986-01-27 | 1988-07-12 | American Microsystems, Inc. | Metal foil semiconductor interconnection method |
US4812896A (en) * | 1986-11-13 | 1989-03-14 | Olin Corporation | Metal electronic package sealed with thermoplastic having a grafted metal deactivator and antioxidant |
US5087961A (en) * | 1987-01-28 | 1992-02-11 | Lsi Logic Corporation | Semiconductor device package |
JPS63205935A (ja) | 1987-02-23 | 1988-08-25 | Toshiba Corp | 放熱板付樹脂封止型半導体装置 |
KR960006710B1 (ko) * | 1987-02-25 | 1996-05-22 | 가부시기가이샤 히다찌세이사꾸쇼 | 면실장형 반도체집적회로장치 및 그 제조방법과 그 실장방법 |
JP2509607B2 (ja) | 1987-03-23 | 1996-06-26 | 株式会社東芝 | 樹脂封止型半導体装置 |
US5059379A (en) * | 1987-07-20 | 1991-10-22 | Mitsubishi Denki Kabushiki Kaisha | Method of resin sealing semiconductor devices |
US4942454A (en) * | 1987-08-05 | 1990-07-17 | Mitsubishi Denki Kabushiki Kaisha | Resin sealed semiconductor device |
JPS6454749A (en) | 1987-08-26 | 1989-03-02 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
US4987475A (en) * | 1988-02-29 | 1991-01-22 | Digital Equipment Corporation | Alignment of leads for ceramic integrated circuit packages |
US4907067A (en) * | 1988-05-11 | 1990-03-06 | Texas Instruments Incorporated | Thermally efficient power device package |
US5096852A (en) * | 1988-06-02 | 1992-03-17 | Burr-Brown Corporation | Method of making plastic encapsulated multichip hybrid integrated circuits |
EP0424530B1 (en) * | 1988-07-08 | 1996-10-02 | Oki Electric Industry Company, Limited | Resin-sealed semiconductor device |
US4935803A (en) * | 1988-09-09 | 1990-06-19 | Motorola, Inc. | Self-centering electrode for power devices |
US5277972B1 (en) * | 1988-09-29 | 1996-11-05 | Tomoegawa Paper Co Ltd | Adhesive tapes |
US5057900A (en) * | 1988-10-17 | 1991-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device and a manufacturing method for the same |
US5018003A (en) * | 1988-10-20 | 1991-05-21 | Mitsubishi Denki Kabushiki Kaisha | Lead frame and semiconductor device |
US5266834A (en) * | 1989-03-13 | 1993-11-30 | Hitachi Ltd. | Semiconductor device and an electronic device with the semiconductor devices mounted thereon |
US5070039A (en) * | 1989-04-13 | 1991-12-03 | Texas Instruments Incorporated | Method of making an integrated circuit using a pre-served dam bar to reduce mold flash and to facilitate flash removal |
JPH02306639A (ja) * | 1989-05-22 | 1990-12-20 | Toshiba Corp | 半導体装置の樹脂封入方法 |
EP0405755B1 (en) * | 1989-05-31 | 1995-11-29 | Fujitsu Limited | Pin grid array packaging structure |
WO1993017457A1 (en) * | 1989-07-01 | 1993-09-02 | Ryo Enomoto | Substrate for mounting semiconductor and method of producing the same |
JPH0671062B2 (ja) * | 1989-08-30 | 1994-09-07 | 株式会社東芝 | 樹脂封止型半導体装置 |
US5200362A (en) * | 1989-09-06 | 1993-04-06 | Motorola, Inc. | Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film |
US5041902A (en) | 1989-12-14 | 1991-08-20 | Motorola, Inc. | Molded electronic package with compression structures |
US5151039A (en) * | 1990-04-06 | 1992-09-29 | Advanced Interconnections Corporation | Integrated circuit adapter having gullwing-shaped leads |
US5118298A (en) * | 1991-04-04 | 1992-06-02 | Advanced Interconnections Corporation | Through hole mounting of integrated circuit adapter leads |
DE69131784T2 (de) * | 1990-07-21 | 2000-05-18 | Mitsui Chemicals Inc | Halbleiteranordnung mit einer Packung |
WO1992003035A1 (en) * | 1990-08-01 | 1992-02-20 | Staktek Corporation | Ultra high density integrated circuit packages, method and apparatus |
US5029386A (en) * | 1990-09-17 | 1991-07-09 | Hewlett-Packard Company | Hierarchical tape automated bonding method |
US5335771A (en) * | 1990-09-25 | 1994-08-09 | R. H. Murphy Company, Inc. | Spacer trays for stacking storage trays with integrated circuits |
US5391439A (en) * | 1990-09-27 | 1995-02-21 | Dai Nippon Printing Co., Ltd. | Leadframe adapted to support semiconductor elements |
US5298685A (en) * | 1990-10-30 | 1994-03-29 | International Business Machines Corporation | Interconnection method and structure for organic circuit boards |
US5174960A (en) | 1990-11-19 | 1992-12-29 | Eastman Kodak Company | Apparatus for shuttling a test element from a discharge path to a wash station |
US5216278A (en) * | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
US5157480A (en) | 1991-02-06 | 1992-10-20 | Motorola, Inc. | Semiconductor device having dual electrical contact sites |
US5172214A (en) | 1991-02-06 | 1992-12-15 | Motorola, Inc. | Leadless semiconductor device and method for making the same |
US5168368A (en) * | 1991-05-09 | 1992-12-01 | International Business Machines Corporation | Lead frame-chip package with improved configuration |
US5172213A (en) | 1991-05-23 | 1992-12-15 | At&T Bell Laboratories | Molded circuit package having heat dissipating post |
US5221642A (en) * | 1991-08-15 | 1993-06-22 | Staktek Corporation | Lead-on-chip integrated circuit fabrication method |
JP2658661B2 (ja) * | 1991-09-18 | 1997-09-30 | 日本電気株式会社 | 多層印刷配線板の製造方法 |
JP2518569B2 (ja) * | 1991-09-19 | 1996-07-24 | 三菱電機株式会社 | 半導体装置 |
US5200809A (en) * | 1991-09-27 | 1993-04-06 | Vlsi Technology, Inc. | Exposed die-attach heatsink package |
US5332864A (en) * | 1991-12-27 | 1994-07-26 | Vlsi Technology, Inc. | Integrated circuit package having an interposer |
JPH06120374A (ja) * | 1992-03-31 | 1994-04-28 | Amkor Electron Inc | 半導体パッケージ構造、半導体パッケージ方法及び半導体パッケージ用放熱板 |
US5250841A (en) * | 1992-04-06 | 1993-10-05 | Motorola, Inc. | Semiconductor device with test-only leads |
US5539251A (en) * | 1992-05-11 | 1996-07-23 | Micron Technology, Inc. | Tie bar over chip lead frame design |
US5214845A (en) * | 1992-05-11 | 1993-06-01 | Micron Technology, Inc. | Method for producing high speed integrated circuits |
US5278446A (en) | 1992-07-06 | 1994-01-11 | Motorola, Inc. | Reduced stress plastic package |
JPH0637202A (ja) * | 1992-07-20 | 1994-02-10 | Mitsubishi Electric Corp | マイクロ波ic用パッケージ |
JPH0653394A (ja) * | 1992-07-28 | 1994-02-25 | Shinko Electric Ind Co Ltd | 多層リードフレーム用プレーン支持体 |
KR0128251Y1 (ko) | 1992-08-21 | 1998-10-15 | 문정환 | 리드 노출형 반도체 조립장치 |
JP2670408B2 (ja) * | 1992-10-27 | 1997-10-29 | 株式会社東芝 | 樹脂封止型半導体装置及びその製造方法 |
US5409362A (en) * | 1992-11-24 | 1995-04-25 | Neu Dynamics Corp. | Encapsulation molding equipment |
US5406124A (en) * | 1992-12-04 | 1995-04-11 | Mitsui Toatsu Chemicals, Inc. | Insulating adhesive tape, and lead frame and semiconductor device employing the tape |
US5340771A (en) * | 1993-03-18 | 1994-08-23 | Lsi Logic Corporation | Techniques for providing high I/O count connections to semiconductor dies |
US5327008A (en) * | 1993-03-22 | 1994-07-05 | Motorola Inc. | Semiconductor device having universal low-stress die support and method for making the same |
US5358905A (en) * | 1993-04-02 | 1994-10-25 | Texas Instruments Incorporated | Semiconductor device having die pad locking to substantially reduce package cracking |
US5474958A (en) * | 1993-05-04 | 1995-12-12 | Motorola, Inc. | Method for making semiconductor device having no die supporting surface |
KR0152901B1 (ko) * | 1993-06-23 | 1998-10-01 | 문정환 | 플라스틱 반도체 패키지 및 그 제조방법 |
JP2875139B2 (ja) * | 1993-07-15 | 1999-03-24 | 株式会社東芝 | 半導体装置の製造方法 |
US5336931A (en) * | 1993-09-03 | 1994-08-09 | Motorola, Inc. | Anchoring method for flow formed integrated circuit covers |
US5414299A (en) * | 1993-09-24 | 1995-05-09 | Vlsi Technology, Inc. | Semi-conductor device interconnect package assembly for improved package performance |
US5517056A (en) * | 1993-09-30 | 1996-05-14 | Motorola, Inc. | Molded carrier ring leadframe having a particular resin injecting area design for gate removal and semiconductor device employing the same |
US5452511A (en) * | 1993-11-04 | 1995-09-26 | Chang; Alexander H. C. | Composite lead frame manufacturing method |
US5521429A (en) | 1993-11-25 | 1996-05-28 | Sanyo Electric Co., Ltd. | Surface-mount flat package semiconductor device |
KR970010676B1 (ko) | 1994-03-29 | 1997-06-30 | 엘지반도체 주식회사 | 반도체 패키지 및 이에 사용되는 리드 프레임 |
US5701034A (en) | 1994-05-03 | 1997-12-23 | Amkor Electronics, Inc. | Packaged semiconductor die including heat sink with locking feature |
JP3243116B2 (ja) | 1994-05-17 | 2002-01-07 | 株式会社日立製作所 | 半導体装置 |
US5544412A (en) * | 1994-05-24 | 1996-08-13 | Motorola, Inc. | Method for coupling a power lead to a bond pad in an electronic module |
JPH0837252A (ja) * | 1994-07-22 | 1996-02-06 | Nec Corp | 半導体装置 |
KR960009774A (ko) | 1994-08-06 | 1996-03-22 | 김광호 | 전전자 교환기의 클럭 폴트 검출회로 |
US5454905A (en) * | 1994-08-09 | 1995-10-03 | National Semiconductor Corporation | Method for manufacturing fine pitch lead frame |
US5508556A (en) * | 1994-09-02 | 1996-04-16 | Motorola, Inc. | Leaded semiconductor device having accessible power supply pad terminals |
US5543657A (en) * | 1994-10-07 | 1996-08-06 | International Business Machines Corporation | Single layer leadframe design with groundplane capability |
JP3475306B2 (ja) | 1994-10-26 | 2003-12-08 | 大日本印刷株式会社 | 樹脂封止型半導体装置の製造方法 |
US5528076A (en) * | 1995-02-01 | 1996-06-18 | Motorola, Inc. | Leadframe having metal impregnated silicon carbide mounting area |
JPH08306853A (ja) | 1995-05-09 | 1996-11-22 | Fujitsu Ltd | 半導体装置及びその製造方法及びリードフレームの製造方法 |
JPH098205A (ja) | 1995-06-14 | 1997-01-10 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置 |
JPH098206A (ja) | 1995-06-19 | 1997-01-10 | Dainippon Printing Co Ltd | リードフレームおよびbgaタイプの樹脂封止型半導体装置 |
JPH098207A (ja) | 1995-06-21 | 1997-01-10 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置 |
JP3163961B2 (ja) | 1995-09-22 | 2001-05-08 | 日立電線株式会社 | 半導体装置 |
KR970024065A (ko) * | 1995-10-30 | 1997-05-30 | 김광호 | 반도체 칩이 타이바에 의해 고정되어 있는 반도체 칩 패키지 |
KR0167276B1 (ko) * | 1995-12-08 | 1998-12-15 | 문정환 | 비엘피 패키지 및 그 제조방법 |
US5866939A (en) | 1996-01-21 | 1999-02-02 | Anam Semiconductor Inc. | Lead end grid array semiconductor package |
US5977613A (en) | 1996-03-07 | 1999-11-02 | Matsushita Electronics Corporation | Electronic component, method for making the same, and lead frame and mold assembly for use therein |
JPH09260568A (ja) | 1996-03-27 | 1997-10-03 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US6001671A (en) * | 1996-04-18 | 1999-12-14 | Tessera, Inc. | Methods for manufacturing a semiconductor package having a sacrificial layer |
KR970072341A (ko) * | 1996-04-25 | 1997-11-07 | 김광호 | 본딩패드의 범프와 내장된 리드 프레임이 접착된 패키지 및 그의 제조방법 |
JP2811170B2 (ja) * | 1996-06-28 | 1998-10-15 | 株式会社後藤製作所 | 樹脂封止型半導体装置及びその製造方法 |
KR100216991B1 (ko) * | 1996-09-11 | 1999-09-01 | 윤종용 | 접착층이 형성된 리드 프레임 |
US5986334A (en) * | 1996-10-04 | 1999-11-16 | Anam Industrial Co., Ltd. | Semiconductor package having light, thin, simple and compact structure |
KR100202676B1 (ko) * | 1996-10-08 | 1999-06-15 | 구본준 | 열방출용 버텀 리드 패키지 |
US5894108A (en) * | 1997-02-11 | 1999-04-13 | National Semiconductor Corporation | Plastic package with exposed die |
US5977630A (en) | 1997-08-15 | 1999-11-02 | International Rectifier Corp. | Plural semiconductor die housed in common package with split heat sink |
JP3285815B2 (ja) * | 1998-03-12 | 2002-05-27 | 松下電器産業株式会社 | リードフレーム,樹脂封止型半導体装置及びその製造方法 |
US6130473A (en) * | 1998-04-02 | 2000-10-10 | National Semiconductor Corporation | Lead frame chip scale package |
JP3420057B2 (ja) * | 1998-04-28 | 2003-06-23 | 株式会社東芝 | 樹脂封止型半導体装置 |
US6229200B1 (en) | 1998-06-10 | 2001-05-08 | Asat Limited | Saw-singulated leadless plastic chip carrier |
US6294100B1 (en) | 1998-06-10 | 2001-09-25 | Asat Ltd | Exposed die leadless plastic chip carrier |
US6143981A (en) | 1998-06-24 | 2000-11-07 | Amkor Technology, Inc. | Plastic integrated circuit package and method and leadframe for making the package |
US6211462B1 (en) * | 1998-11-05 | 2001-04-03 | Texas Instruments Incorporated | Low inductance power package for integrated circuits |
US6573123B2 (en) * | 1999-09-07 | 2003-06-03 | Sai Man Li | Semiconductor chip package and manufacturing method thereof |
US6355502B1 (en) | 2000-04-25 | 2002-03-12 | National Science Council | Semiconductor package and method for making the same |
-
2000
- 2000-02-24 KR KR10-2000-0009150A patent/KR100526844B1/ko active IP Right Grant
- 2000-10-13 US US09/687,787 patent/US6646339B1/en not_active Expired - Lifetime
- 2000-10-16 SG SG200005926A patent/SG92748A1/en unknown
-
2003
- 2003-09-19 US US10/665,651 patent/US20040061217A1/en not_active Abandoned
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR101250529B1 (ko) * | 2011-06-08 | 2013-04-03 | 에스티에스반도체통신 주식회사 | Qfn 패키지 및 그 제조 방법 |
WO2013065895A1 (ko) * | 2011-11-03 | 2013-05-10 | 주식회사 네패스 | 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지 |
KR101297015B1 (ko) * | 2011-11-03 | 2013-08-14 | 주식회사 네패스 | 리드프레임을 이용한 팬-아웃 반도체 패키지 제조방법, 이에 의한 반도체 패키지 및 패키지 온 패키지 |
Also Published As
Publication number | Publication date |
---|---|
KR100526844B1 (ko) | 2005-11-08 |
SG92748A1 (en) | 2002-11-19 |
US20040061217A1 (en) | 2004-04-01 |
US6646339B1 (en) | 2003-11-11 |
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