JPS6139555A - 放熱板付樹脂封止形半導体装置 - Google Patents

放熱板付樹脂封止形半導体装置

Info

Publication number
JPS6139555A
JPS6139555A JP15886084A JP15886084A JPS6139555A JP S6139555 A JPS6139555 A JP S6139555A JP 15886084 A JP15886084 A JP 15886084A JP 15886084 A JP15886084 A JP 15886084A JP S6139555 A JPS6139555 A JP S6139555A
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor
heat sink
resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15886084A
Other languages
English (en)
Inventor
Toshihiro Kato
加藤　俊博
Shinjiro Kojima
小島　伸次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP15886084A priority Critical patent/JPS6139555A/ja
Publication of JPS6139555A publication Critical patent/JPS6139555A/ja
Pending legal-status Critical Current

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/4805—Shape
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    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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    • H01L2924/181—Encapsulation

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ［発明の技術分野］ 本発明は、電力用半導体素子などを搭載しこれと絶縁さ
れた放熱板を有する放熱板付樹脂封止形半導体装置に関
するもので、例えば電動機速度制御用パワートランジス
タアレイなどに適用される。
［発明の技術分野］ 半導体素子と放熱板とが絶縁されている形式の放熱板付
樹脂封止形半導体装置の最近の従来例（特願昭５９−２
５１９８号）について以下図面にもとずき説明する。　
第４図は上記半導体装置の外観平面図（本発明に係るも
のも外観は同じである）であり、１は封止樹脂、２は締
付部だけが外観に現れている放熱板、３はリード部だ【
プが外観に現れているリードフレームである。　第５図
は放熱板２の平面図である。　放熱板２はアルミニウム
系金属条から打法加工して得られたものである。
放熱板２と樹脂との密着を向上させるために樹脂に埋め
込まれる辺（第４図参照）には板厚が薄くなるように潰
し２５及び２６が、また樹脂との界面にあたる上面に溝
２７が形成されている。　放熱板がアルミニウムである
とアルミニウムの熱膨張係数（２３，６ｘ　１０（／　
’Ｃ）は樹脂のそれ（２４×１０−’／’Ｃ）に近いの
で封止後の放熱板のそりはほとんど問題にならないので
上記の漬し２５及び２６並びに満２７を設けな（でもよ
いが、銅系金属の場合には樹脂との熱ｕＩＩＩ２係数差
が大きいのでこの潰し及び溝等の工夫が大切である。　
第６図はリードフレーム３の平面図でありリードフレー
ム３は複数の半導体素子ペレットを搭載するベッド部３
１とリード部３２とフレーム３３とからなっている。　
リードフレーム３は銅系金属条を抜打加工して（ｑられ
肉厚は均一である。
第７図はこの従来例の放熱板付樹脂封止形半導体装置に
ついて、第４図ＩＶ　−ＩＶ線に沿う拡大断面図を示し
たものである。　同図にＪ３いて６は、半導体素子ペレ
ット５（以下ペレット５と略称する）とリードフレーム
ベッド部３１とを固着する固着層、７はペレット５とリ
ードフレームリード部３２とを接続する金属細線、そし
て封止樹脂１は放熱板２の一面が露出するようにトラン
スファ成形されている。
［背景技術の問題点］ 上記の従来例勇半導体装置では放熱性を悪化させる加工
組立要因をなくすることができて安定な放熱特性が得ら
れるが、熱抵抗の点で十分満足できるものでなくさらに
放熱性の改善が望まれる。
特に過渡熱抵抗を低減し、スイッチング動作時の温度上
昇を抑えることにより長寿命化をはかることが重要な問
題となっている。
［発明の目的］ 本発明の目的は、従来例の半導体装置に比し放熱性を向
上し、特に過渡熱抵抗を低減し、スイッチング動作に適
合した新規な構造の絶縁放熱板付樹脂封止形半導体装置
を提供することにある。
［発明の概要］ 半導体素子ペレットと放熱板が絶縁されている放熱板付
樹脂封止形半導体装置において過渡熱抵抗を低減する有
効な手段の一つは、半導体搭載部（リードフレームのベ
ッド部を含む）の熱容量を増加することである。　それ
放生導体搭載部は大きければ大きいほど過渡熱特性は向
上する。　しかしながら上記半導体装置の形状寸法は、
電気的熱的特性のみならず経済性生産性等を総合して決
定されたものである。　したがってこれらの条件を考慮
した結果、本発明はリードフレームの半導体搭載部の単
位面積当りの熱容量を該リードフレームのその他の部分
の単位面積当りの熱容量より大きくジるという考えにも
こずいておこなわれた。
すなわち本発明は、特許請求の範囲に記載したように、
半導体素子と放熱板が絶縁されている放熱板付樹脂封止
形半導体装置において、半導体搭載部の肉厚をリードフ
レームの平均肉厚より厚くしたことを特徴とする放熱板
付樹脂封止形半導体装置である。
この発明の望ましい実施態様は、リードフレームのベッ
ド部そのものを半導体搭載部とするとともに、ベッド部
の肉厚をリードフレームのその伯の部分の肉厚より厚く
し、ベッド部を含むリードフレームは同一部材よりつく
られる上記半導体装置である。　また伯の望ましい実施
態様は半導体搭載部をリードフレームのベッド部と熱拡
散板との重合層とし、半導体搭載部の肉厚をリードフレ
ームのその他の部分の肉厚よりも厚くした上記半導体装
置である。　以上のように半導体搭載部の肉厚を増加す
ることにより従来に比し半導体搭載部の熱容量を増加す
ることができ過渡熱抵抗を減少することが可能となった
。
なお半導体搭載部の下面は該下面と放熱板上面との間隙
の耐電圧特性により、また半導体搭載部の上面は封止樹
脂の高さおよび半導体素子ペレットとリードフレームと
を接続する金属４１１ＩＦＡがペレットに接触しやすく
なること等によりその位置が決められる。　半導体搭載
部の肉厚は上記の条件により一定値以内に制限される。
［発明の実施例コ 以下本発明の一実施例につき図面にもとずき説明する。
　本発明による放熱板付樹脂封止形半導体装置の外観平
面図および放熱板は、第４図および第５図に示す従来の
半導体装置の外観平面図および放熱板とそれぞれ等しく
、また本発明に使用されるリードフレームは半導体搭載
部（ベッド部３１）を除き第６図に示す従来のリードフ
レームとほぼ同一である。　なお第１図ないし第６図に
おいて同符号で示し・たちのはそれぞれ同一部分をあら
れす。　第１図は、本発明の放熱板付樹脂封止形半導体
装置について第４図のｒＶ−ｒＶ線に沿う拡大断面図で
ある。　この実施例においては半導体搭載部４はリード
フレームのベッド部３１と同一であり肉厚は約（１，０
〜３．０）　ｍｍとなっている。
ベッド部３１及び隣接するベッド部３１にはさまれるイ
ンナーリード部のごく一部とを除くその伯のリード部の
肉厚は約（０，４〜０．８）　ｎｕｎであり、したがっ
て半導体搭載部４の肉厚はリードフレームの平均肉厚よ
り厚くなっている。　リードフレームは銅系金属条を打
法加工してｔｃＪられるが、あらかじめベッド部に該当
する部分の該金属条の肉厚とその他の部分の肉厚とを前
記のとおりとした銅系金属の異形材が使用される。　半
導体素子ペレット５は半田等の接合部材６を介して半導
体搭載部４上に取り付けられている。　また金ＪｉｌＩ
ＩＩｌ線７（アルミニウム線又は金線等）で上記ペレッ
ト５上の電極（図示せず）とリードフレーム３のインナ
ーリード部とが接続されている。　その後ｆＪ５［熱板
２をトランスファモールド金型のキャビティ下部に載置
したのち、上記リードフレーム３をモールド型上に設置
し、トランスファモールド樹脂成形される。　この時、
半導体搭載部４と放熱板２の間にも高熱伝導性エポキシ
封止樹脂１が充填される。
上記のようにこの実施例では半導体搭載部４【まリード
フレームベッド部３１と同じであり、ベッド部３１とそ
の他のリード部は同一部材（銅系金属条）よりつくられ
、肉厚はベッド部３１が厚くなっているので熱拡散板と
しての効果を出すことができ、本発明の望ましい実施態
様（特許請求の範囲第２項記載）である。　第２図は本
発明の他の実施例である。　第１図とは半導体搭載部４
０表裏の使い方が異なっていて、半導体素子ペレット５
と金属細線７の組立工程に得失がある。　しかしながら
放熱効果は第１図の装置と第２図の装置とほぼ同等であ
る。
第３図に望ましい実施態様の他の一つ（特許請求の範囲
第３項記載）を示す。　図示の如く半導体搭載部４はリ
ードフレームのベッド部３１に半田等の接合部材６２を
介して熱拡散板８を固着した手合層である。　半導体素
子ペレット５は半田等の接合部材６１により熱拡散板８
上にマウントされる。　リードフレームのベッド部３１
とベッド部以外のリード部分の肉厚は同一である。　本
実施例では従来のものに比し熱拡散板を附加しただけ熱
容母が増加しており、第１図または第２図に示した装置
と等価な放熱効果を１ｒ７ることかできた。　熱拡散板
８の材質としてはＣｕ　、Ｗ、ＭＯｌＣｕ　−Ｃおよび
それらの合金を用いることができる。　（亀合部材６２
は一般に半田を用いるが溶接、圧接等により接合すれば
接合部材６２を省くことも可能である。　又熱拡散板８
はリードフレームのベッド部下面に接合しても同様な効
果がｊｎられる。
［発明の効果］ 第１図に示す本発明による放熱返付樹脂封止形半導体装
置の過渡熱抵抗を測定したところ従来のものの約１／２
にすることができた。
過渡熱抵抗（Ｒｔｈ　＋Ｌｒａｎｓ）　）は一般に次式
で表される。
一１／τ０ Ｒｔｈ＋ｕｉｎｓ＋　＝　Ｒｔｈ＋　（１−ｅ　　　　
　）［℃／Ｗ］ Ｒｔｈ　＋は定常状態における半導体素子内の発熱部よ
り放熱板２までの内部熱抵抗であり、τ。はその熱時定
数である。　封止樹脂の熱伝導率λ＝（ｉｏｘ　１０−
’　ｃａｌ　／　ｃｍ　−ｓｅｃ　・’Ｃ１半導体搭載
部と放熱板との間の樹脂絶縁層の厚さ−０，（３ｍｍで
あって、ｔ　＝１００ｍｓｅｃ　　（上式参照）の時の
Ｒｔｈ　（ｕａ　ｎｓ）を測定した結果、Ｒｔｈ　ｔ。
。、）す１℃／Ｗ（同一条件で従来品は約２℃／Ｗ）で
あった。
以上のごとく過渡熱抵抗をおさえたことによりスイッヂ
ング特性の寿命を延長することができた。
【図面の簡単な説明】
第１図ないし第３図は本発明による放熱板付樹脂封止形
半導体装置の３つの実施例を示したもので、それぞれ第
４図のＩＶ−■線に沿う拡大断面図、第４図ないし第６
図は本発明の実施例と従来例に関連する放熱板付樹脂封
止形半導体装置の外観平面図、放熱板平面図およびリー
ドフレーム平面図、第７図は従来例の放熱板付樹脂封止
形半導体装置のＩＶ−ＩＶ線（第４図参照）に沿う拡大
断面図である。 １・・・封止樹脂、　２・・・放熱板、　３・・・リー
ドフレーム、　３１・・・リードフレームベッド部、　
４・・・半導体搭載部、　５・・・半導体素子ペレット
、７・・・金属細線、　８・・・熱拡散板。 第１図 と 第２図

Claims (1)

  1. 【特許請求の範囲】 １　単数又は複数の半導体素子ペレットと、該ペレット
    を搭載するための半導体搭載部と、該半導体搭載部を具
    備する銅系金属製リードフレームと、該ペレットと該リ
    ードフレームとを接続するための金属細線と、上面が該
    リードフレームの下面と所定の間隙をへだてて対向する
    ように配置した放熱板と、該間隙を充填しかつ該放熱板
    下面が露出するようにトランスファ樹脂封止する熱伝導
    性樹脂とにより構成される放熱板付樹脂封止形半導体装
    置において、該半導体搭載部の肉厚を該リードフレーム
    の平均肉厚より厚くしたことを特徴とする放熱板付樹脂
    封止形半導体装置。 ２　半導体搭載部がリードフレームのベッド部であって
    、該リードフレームの他の部分と肉厚の異なる同一部材
    を用いたものである特許請求の範囲第１項記載の放熱板
    付樹脂封止形半導体装置。 ３　半導体搭載部がリードフレームのベッド部と熱拡散
    板との重合層よりなる特許請求の範囲第１項記載の放熱
    板付樹脂封止形半導体装置。
JP15886084A 1984-07-31 1984-07-31 放熱板付樹脂封止形半導体装置 Pending JPS6139555A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15886084A JPS6139555A (ja) 1984-07-31 1984-07-31 放熱板付樹脂封止形半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15886084A JPS6139555A (ja) 1984-07-31 1984-07-31 放熱板付樹脂封止形半導体装置

Publications (1)

Publication Number Publication Date
JPS6139555A true JPS6139555A (ja) 1986-02-25

Family

ID=15680980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15886084A Pending JPS6139555A (ja) 1984-07-31 1984-07-31 放熱板付樹脂封止形半導体装置

Country Status (1)

Country Link
JP (1) JPS6139555A (ja)

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JPS62229961A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 樹脂封止型半導体装置
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5489801A (en) * 1993-11-03 1996-02-06 Intel Corporation Quad flat package heat slug composition
US5530295A (en) * 1993-12-29 1996-06-25 Intel Corporation Drop-in heat sink
US5552960A (en) * 1994-04-14 1996-09-03 Intel Corporation Collapsible cooling apparatus for portable computer
US5608267A (en) * 1992-09-17 1997-03-04 Olin Corporation Molded plastic semiconductor package including heat spreader
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US5834842A (en) * 1996-01-17 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor device, semiconductor module, and radiating fin
US5912802A (en) * 1994-06-30 1999-06-15 Intel Corporation Ducted opposing bonded fin heat sink blower multi-microprocessor cooling system
US5939214A (en) * 1989-05-31 1999-08-17 Advanced Technology Interconnect, Incorporated Thermal performance package for integrated circuit chip
JP2000183279A (ja) * 1998-10-05 2000-06-30 Fuji Electric Co Ltd 半導体素子のパッケージおよびその製造方法
US6143981A (en) * 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6281568B1 (en) 1998-10-21 2001-08-28 Amkor Technology, Inc. Plastic integrated circuit device package and leadframe having partially undercut leads and die pad
US6448633B1 (en) 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
US6469369B1 (en) 1999-06-30 2002-10-22 Amkor Technology, Inc. Leadframe having a mold inflow groove and method for making
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US6475827B1 (en) 1999-10-15 2002-11-05 Amkor Technology, Inc. Method for making a semiconductor package having improved defect testing and increased production yield
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US6677663B1 (en) 1999-12-30 2004-01-13 Amkor Technology, Inc. End grid array semiconductor package
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US6696747B1 (en) 1999-10-15 2004-02-24 Amkor Technology, Inc. Semiconductor package having reduced thickness
US6700187B2 (en) 2001-03-27 2004-03-02 Amkor Technology, Inc. Semiconductor package and method for manufacturing the same
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US6730544B1 (en) 1999-12-20 2004-05-04 Amkor Technology, Inc. Stackable semiconductor package and method for manufacturing same
US6753597B1 (en) 1999-12-16 2004-06-22 Amkor Technology, Inc. Encapsulated semiconductor package including chip paddle and leads
US6756658B1 (en) 2001-04-06 2004-06-29 Amkor Technology, Inc. Making two lead surface mounting high power microleadframe semiconductor packages
US6798046B1 (en) 2002-01-22 2004-09-28 Amkor Technology, Inc. Semiconductor package including ring structure connected to leads with vertically downset inner ends
US6803645B2 (en) 2000-12-29 2004-10-12 Amkor Technology, Inc. Semiconductor package including flip chip
US6833609B1 (en) 1999-11-05 2004-12-21 Amkor Technology, Inc. Integrated circuit device packages and substrates for making the packages
US6841414B1 (en) 2002-06-19 2005-01-11 Amkor Technology, Inc. Saw and etch singulation method for a chip package
US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US6847099B1 (en) 2003-02-05 2005-01-25 Amkor Technology Inc. Offset etched corner leads for semiconductor package
US6853059B1 (en) 1999-10-15 2005-02-08 Amkor Technology, Inc. Semiconductor package having improved adhesiveness and ground bonding
US6858919B2 (en) 2000-03-25 2005-02-22 Amkor Technology, Inc. Semiconductor package
US6885086B1 (en) 2002-03-05 2005-04-26 Amkor Technology, Inc. Reduced copper lead frame for saw-singulated chip package
US6927478B2 (en) 2001-01-15 2005-08-09 Amkor Technology, Inc. Reduced size semiconductor package with stacked dies
US7042068B2 (en) 2000-04-27 2006-05-09 Amkor Technology, Inc. Leadframe and semiconductor package made using the leadframe
JP2007081442A (ja) * 1998-10-05 2007-03-29 Fuji Electric Device Technology Co Ltd 半導体素子のパッケージおよびその製造方法
WO2007037190A1 (ja) * 2005-09-27 2007-04-05 Matsushita Electric Industrial Co., Ltd. 放熱配線基板とその製造方法と放熱配線基板を用いた電気機器
US8154111B2 (en) 1999-12-16 2012-04-10 Amkor Technology, Inc. Near chip size semiconductor package
JP2012238676A (ja) * 2010-05-10 2012-12-06 Shin Kobe Electric Mach Co Ltd 樹脂成形品
US8866278B1 (en) 2011-10-10 2014-10-21 Amkor Technology, Inc. Semiconductor device with increased I/O configuration
US9631481B1 (en) 2011-01-27 2017-04-25 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands and method
US9673122B2 (en) 2014-05-02 2017-06-06 Amkor Technology, Inc. Micro lead frame structure having reinforcing portions and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
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Publication number Priority date Publication date Assignee Title
JPS62229961A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 樹脂封止型半導体装置
US5939214A (en) * 1989-05-31 1999-08-17 Advanced Technology Interconnect, Incorporated Thermal performance package for integrated circuit chip
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5455462A (en) * 1992-01-17 1995-10-03 Amkor Electronics, Inc. Plastic molded package with heat sink for integrated circuit devices
US5608267A (en) * 1992-09-17 1997-03-04 Olin Corporation Molded plastic semiconductor package including heat spreader
US5489801A (en) * 1993-11-03 1996-02-06 Intel Corporation Quad flat package heat slug composition
US5530295A (en) * 1993-12-29 1996-06-25 Intel Corporation Drop-in heat sink
US5552960A (en) * 1994-04-14 1996-09-03 Intel Corporation Collapsible cooling apparatus for portable computer
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US5722161A (en) * 1994-05-03 1998-03-03 Amkor Electronics, Inc. Method of making a packaged semiconductor die including heat sink with locking feature
US5912802A (en) * 1994-06-30 1999-06-15 Intel Corporation Ducted opposing bonded fin heat sink blower multi-microprocessor cooling system
US5834842A (en) * 1996-01-17 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor device, semiconductor module, and radiating fin
US6143981A (en) * 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6433277B1 (en) 1998-06-24 2002-08-13 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6630728B2 (en) 1998-06-24 2003-10-07 Amkor Technology, Inc. Plastic integrated circuit package and leadframe for making the package
US6684496B2 (en) 1998-06-24 2004-02-03 Amkor Technology, Inc. Method of making an integrated circuit package
JP2000183279A (ja) * 1998-10-05 2000-06-30 Fuji Electric Co Ltd 半導体素子のパッケージおよびその製造方法
JP2007081442A (ja) * 1998-10-05 2007-03-29 Fuji Electric Device Technology Co Ltd 半導体素子のパッケージおよびその製造方法
US6521987B1 (en) 1998-10-21 2003-02-18 Amkor Technology, Inc. Plastic integrated circuit device package and method for making the package
US6281568B1 (en) 1998-10-21 2001-08-28 Amkor Technology, Inc. Plastic integrated circuit device package and leadframe having partially undercut leads and die pad
US6455356B1 (en) 1998-10-21 2002-09-24 Amkor Technology Methods for moding a leadframe in plastic integrated circuit devices
US6448633B1 (en) 1998-11-20 2002-09-10 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
US6825062B2 (en) 1998-11-20 2004-11-30 Amkor Technology, Inc. Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant
US6469369B1 (en) 1999-06-30 2002-10-22 Amkor Technology, Inc. Leadframe having a mold inflow groove and method for making
US6525406B1 (en) 1999-10-15 2003-02-25 Amkor Technology, Inc. Semiconductor device having increased moisture path and increased solder joint strength
US6555899B1 (en) 1999-10-15 2003-04-29 Amkor Technology, Inc. Semiconductor package leadframe assembly and method of manufacture
US6853059B1 (en) 1999-10-15 2005-02-08 Amkor Technology, Inc. Semiconductor package having improved adhesiveness and ground bonding
US6501161B1 (en) 1999-10-15 2002-12-31 Amkor Technology, Inc. Semiconductor package having increased solder joint strength
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US6677662B1 (en) 1999-10-15 2004-01-13 Amkor Technology, Inc. Clamp and heat block assembly for wire bonding a semiconductor package assembly
US6646339B1 (en) 1999-10-15 2003-11-11 Amkor Technology, Inc. Thin and heat radiant semiconductor package and method for manufacturing
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US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US6476478B1 (en) 1999-11-12 2002-11-05 Amkor Technology, Inc. Cavity semiconductor package with exposed leads and die pad
US8154111B2 (en) 1999-12-16 2012-04-10 Amkor Technology, Inc. Near chip size semiconductor package
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US6677663B1 (en) 1999-12-30 2004-01-13 Amkor Technology, Inc. End grid array semiconductor package
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US6803645B2 (en) 2000-12-29 2004-10-12 Amkor Technology, Inc. Semiconductor package including flip chip
US6927478B2 (en) 2001-01-15 2005-08-09 Amkor Technology, Inc. Reduced size semiconductor package with stacked dies
US6605865B2 (en) 2001-03-19 2003-08-12 Amkor Technology, Inc. Semiconductor package with optimized leadframe bonding strength
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US8263870B2 (en) 2005-09-27 2012-09-11 Panasonic Corporation Heat dissipating wiring board, method for manufacturing same, and electric device using heat dissipating wiring board
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US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
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US9631481B1 (en) 2011-01-27 2017-04-25 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands and method
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US9947623B1 (en) 2011-11-29 2018-04-17 Amkor Technology, Inc. Semiconductor device comprising a conductive pad on a protruding-through electrode
US10410967B1 (en) 2011-11-29 2019-09-10 Amkor Technology, Inc. Electronic device comprising a conductive pad on a protruding-through electrode
US11043458B2 (en) 2011-11-29 2021-06-22 Amkor Technology Singapore Holding Pte. Ltd. Method of manufacturing an electronic device comprising a conductive pad on a protruding-through electrode
US10090228B1 (en) 2012-03-06 2018-10-02 Amkor Technology, Inc. Semiconductor device with leadframe configured to facilitate reduced burr formation
US10014240B1 (en) 2012-03-29 2018-07-03 Amkor Technology, Inc. Embedded component package and fabrication method
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