CN1331221C - 芯片球栅阵列封装结构 - Google Patents

芯片球栅阵列封装结构 Download PDF

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Publication number
CN1331221C
CN1331221C CNB2003101095496A CN200310109549A CN1331221C CN 1331221 C CN1331221 C CN 1331221C CN B2003101095496 A CNB2003101095496 A CN B2003101095496A CN 200310109549 A CN200310109549 A CN 200310109549A CN 1331221 C CN1331221 C CN 1331221C
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chip
grid array
ball grid
fin
packaging structure
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CN1630073A (zh
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王涛
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ASE Assembly & Test (Shanghai) Limited
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WEIYU TECH TEST PACKING Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

本发明提供一种芯片球栅阵列封装结构。传统的芯片球栅阵列封装结构中，由于其中的散热片只与基板相接触，因此芯片产生的热无法直接传到散热片上，大大影响了散热效果。本发明提供的芯片球栅阵列封装结构包括基板、设置于基板上的芯片、散热片和封装所述基板、芯片和散热片的塑封体，所述散热片的一个表面通过粘合物与所述芯片的表面相粘接，所述粘合物为粘胶剂，且在所述粘胶剂中含有固体颗粒。本发明的这种改进大大提高了散热性能。

Description

芯片球栅阵列封装结构
技术领域
本发明涉及芯片的封装结构，尤其涉及芯片的球栅阵列封装结构，主要对封装结构作了改进，以提高这种封装结构的散热效果。
背景技术
芯片球栅阵列封装结构(BGA)在目前的芯片封装领域中得到了大量的应用。然而，散热问题阻碍了这种封装结构的进一步应用。目前的封装结构一般通过加装散热片的形式来实现散热，且散热片与基板相接触，并不与产生热量的芯片相接触。因此，芯片产生热无法直接传到散热片上，大大影响了散热效果。
发明内容
因此，本发明的目的在于对球栅阵列封装结构进行改进，以提供一种散热效果优于传统技术的芯片球栅阵列封装结构。
根据上述目的，本发明提供的芯片球栅阵列封装结构包括：
基板、设置于基板上的芯片、散热片和封装所述基板、芯片和散热片的塑封体，所述散热片的一个表面通过粘合物与所述芯片的表面相粘接，所述粘合物为粘胶剂，且在所述粘胶剂中含有固体颗粒。
在上述的芯片球栅阵列封装结构中，所述散热片另一表面暴露于所述塑封体之外。
在上述的芯片球栅阵列封装结构中，所述粘合物为胶带。
在上述的芯片球栅阵列封装结构中，所述散热片的另一面的面积大于所述散热片与所述芯片粘接的一面。
在如上所述的球栅阵列封装结构中，由于将散热片与芯片直接粘接，因此，芯片产生的热量直接传递给散热片，有效地提高了这种封装结构的散热效果，从而可以进一步拓展这种球栅阵列封装结构的应用。
下面将结合附图详细描述本发明的实施例。
附图说明
图1至图5示出了本发明的球栅阵列封装结构的5个实施例。
具体实施方式
如图1所示，图1示出了本发明的球栅阵列封装结构的示意图。图1中，芯片1以常规的方法通过粘接剂2A等粘接到基板2上。金线3将芯片1上的电路电连接到基板2下方的焊球4。本发明的改进点是将散热片5的一面通过粘合物6直接粘接到芯片1的表面上。然后再用塑封体7将上述各个部分封装在一起。
在图1的实施例中，散热片5的另一表面暴露于塑封体7之外。当然，也可以如图2所示的实施例，散热片5不暴露于塑封体7之外。
在图1和图2所示的实施例中，散热片5与芯片1之间的粘合物6采用粘接剂，然而，也可以如图3所示，在粘接剂6中混入一些固体颗粒8。这种颗粒8可以在封装结构进入烘烤之前，承受一定的变形，以保护芯片，避免芯片破裂。
图4示出了散热片5与芯片1之间的粘合物6采用胶带的实施例。
在图5所示的实施例中，从图中可以看出，散热片5的另一面的面积大于散热片5与芯片1粘接的一面。如此可以增大散热片的暴露部分，以更有利于散热能力的提高。

Claims (4)

1、一种芯片球栅阵列封装结构包括：
基板、设置于基板上的芯片、散热片和封装所述基板、芯片和散热片的塑封体，所述散热片的一个表面通过粘合物与所述芯片的表面相粘接，所述粘合物为粘胶剂，且在所述粘胶剂中含有固体颗粒。
2、如权利要求1所述的芯片球栅阵列封装结构，其特征在于，所述散热片另一表面暴露于所述塑封体之外。
3、如权利要求1或2所述的芯片球栅阵列封装结构，其特征在于，所述粘合物为胶带。
4、如权利要求1或2所述的芯片球栅阵列封装结构，其特征在于，所述散热片的另一面的面积大于所述散热片与所述芯片粘接的一面。
CNB2003101095496A 2003-12-19 2003-12-19 芯片球栅阵列封装结构 Expired - Fee Related CN1331221C (zh)

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